Kishon Vijay Abraham I | 26a84b3 | 2012-08-22 14:10:02 +0530 | [diff] [blame] | 1 | # |
| 2 | # Bus Devices |
| 3 | # |
| 4 | |
| 5 | menu "Bus devices" |
| 6 | |
Geert Uytterhoeven | 13fbf3c | 2015-02-05 11:11:24 +0100 | [diff] [blame] | 7 | config ARM_CCI |
Olof Johansson | 47f36e4 | 2015-04-03 13:38:43 -0700 | [diff] [blame] | 8 | bool |
| 9 | |
Suzuki K. Poulose | f4d5893 | 2015-05-26 10:53:14 +0100 | [diff] [blame] | 10 | config ARM_CCI_PMU |
| 11 | bool |
| 12 | select ARM_CCI |
| 13 | |
Olof Johansson | 47f36e4 | 2015-04-03 13:38:43 -0700 | [diff] [blame] | 14 | config ARM_CCI400_COMMON |
| 15 | bool |
| 16 | select ARM_CCI |
| 17 | |
| 18 | config ARM_CCI400_PMU |
| 19 | bool "ARM CCI400 PMU support" |
Suzuki K. Poulose | 85bbba7 | 2015-05-26 10:53:10 +0100 | [diff] [blame] | 20 | depends on (ARM && CPU_V7) || ARM64 |
| 21 | depends on PERF_EVENTS |
Olof Johansson | 47f36e4 | 2015-04-03 13:38:43 -0700 | [diff] [blame] | 22 | select ARM_CCI400_COMMON |
Suzuki K. Poulose | f4d5893 | 2015-05-26 10:53:14 +0100 | [diff] [blame] | 23 | select ARM_CCI_PMU |
Geert Uytterhoeven | 13fbf3c | 2015-02-05 11:11:24 +0100 | [diff] [blame] | 24 | help |
Suzuki K. Poulose | 85bbba7 | 2015-05-26 10:53:10 +0100 | [diff] [blame] | 25 | Support for PMU events monitoring on the ARM CCI-400 (cache coherent |
| 26 | interconnect). CCI-400 supports counting events related to the |
| 27 | connected slave/master interfaces. |
Olof Johansson | 47f36e4 | 2015-04-03 13:38:43 -0700 | [diff] [blame] | 28 | |
| 29 | config ARM_CCI400_PORT_CTRL |
| 30 | bool |
| 31 | depends on ARM && OF && CPU_V7 |
| 32 | select ARM_CCI400_COMMON |
| 33 | help |
| 34 | Low level power management driver for CCI400 cache coherent |
| 35 | interconnect for ARM platforms. |
Geert Uytterhoeven | 13fbf3c | 2015-02-05 11:11:24 +0100 | [diff] [blame] | 36 | |
Suzuki K Poulose | 3d2e870 | 2016-02-23 10:49:54 +0000 | [diff] [blame] | 37 | config ARM_CCI5xx_PMU |
Suzuki K Poulose | d7dd5fd | 2016-02-23 10:49:55 +0000 | [diff] [blame] | 38 | bool "ARM CCI-500/CCI-550 PMU support" |
Suzuki K. Poulose | a95791e | 2015-05-26 10:53:15 +0100 | [diff] [blame] | 39 | depends on (ARM && CPU_V7) || ARM64 |
| 40 | depends on PERF_EVENTS |
| 41 | select ARM_CCI_PMU |
| 42 | help |
Suzuki K Poulose | d7dd5fd | 2016-02-23 10:49:55 +0000 | [diff] [blame] | 43 | Support for PMU events monitoring on the ARM CCI-500/CCI-550 cache |
| 44 | coherent interconnects. Both of them provide 8 independent event counters, |
| 45 | which can count events pertaining to the slave/master interfaces as well |
Suzuki K. Poulose | a95791e | 2015-05-26 10:53:15 +0100 | [diff] [blame] | 46 | as the internal events to the CCI. |
| 47 | |
| 48 | If unsure, say Y |
| 49 | |
Geert Uytterhoeven | 13fbf3c | 2015-02-05 11:11:24 +0100 | [diff] [blame] | 50 | config ARM_CCN |
Suzuki K Poulose | 5420f9f | 2016-04-28 16:05:01 +0100 | [diff] [blame] | 51 | tristate "ARM CCN driver support" |
Geert Uytterhoeven | 13fbf3c | 2015-02-05 11:11:24 +0100 | [diff] [blame] | 52 | depends on ARM || ARM64 |
| 53 | depends on PERF_EVENTS |
| 54 | help |
| 55 | PMU (perf) driver supporting the ARM CCN (Cache Coherent Network) |
| 56 | interconnect. |
| 57 | |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 58 | config BRCMSTB_GISB_ARB |
| 59 | bool "Broadcom STB GISB bus arbiter" |
Kevin Cernekee | dd1d78a | 2014-11-25 16:49:49 -0800 | [diff] [blame] | 60 | depends on ARM || MIPS |
Florian Fainelli | b0ec633 | 2016-04-16 13:46:14 -0700 | [diff] [blame] | 61 | default ARCH_BRCMSTB || BMIPS_GENERIC |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 62 | help |
| 63 | Driver for the Broadcom Set Top Box System-on-a-chip internal bus |
| 64 | arbiter. This driver provides timeout and target abort error handling |
| 65 | and internal bus master decoding. |
| 66 | |
Huang Shijie | 85bf6d4 | 2013-05-28 14:20:07 +0800 | [diff] [blame] | 67 | config IMX_WEIM |
| 68 | bool "Freescale EIM DRIVER" |
| 69 | depends on ARCH_MXC |
| 70 | help |
Alexander Shiyan | 3f98b6b | 2013-06-29 08:27:54 +0400 | [diff] [blame] | 71 | Driver for i.MX WEIM controller. |
Huang Shijie | 85bf6d4 | 2013-05-28 14:20:07 +0800 | [diff] [blame] | 72 | The WEIM(Wireless External Interface Module) works like a bus. |
| 73 | You can attach many different devices on it, such as NOR, onenand. |
Huang Shijie | 85bf6d4 | 2013-05-28 14:20:07 +0800 | [diff] [blame] | 74 | |
James Hogan | 8286ae0 | 2015-03-25 15:39:50 +0000 | [diff] [blame] | 75 | config MIPS_CDMM |
| 76 | bool "MIPS Common Device Memory Map (CDMM) Driver" |
| 77 | depends on CPU_MIPSR2 |
| 78 | help |
| 79 | Driver needed for the MIPS Common Device Memory Map bus in MIPS |
| 80 | cores. This bus is for per-CPU tightly coupled devices such as the |
| 81 | Fast Debug Channel (FDC). |
| 82 | |
| 83 | For this to work, either your bootloader needs to enable the CDMM |
| 84 | region at an unused physical address on the boot CPU, or else your |
| 85 | platform code needs to implement mips_cdmm_phys_base() (see |
| 86 | asm/cdmm.h). |
| 87 | |
Thomas Petazzoni | fddddb5 | 2013-03-21 17:59:14 +0100 | [diff] [blame] | 88 | config MVEBU_MBUS |
| 89 | bool |
| 90 | depends on PLAT_ORION |
| 91 | help |
| 92 | Driver needed for the MBus configuration on Marvell EBU SoCs |
| 93 | (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP). |
| 94 | |
Geert Uytterhoeven | 13fbf3c | 2015-02-05 11:11:24 +0100 | [diff] [blame] | 95 | config OMAP_INTERCONNECT |
| 96 | tristate "OMAP INTERCONNECT DRIVER" |
| 97 | depends on ARCH_OMAP2PLUS |
| 98 | |
| 99 | help |
| 100 | Driver to enable OMAP interconnect error handling driver. |
| 101 | |
Kishon Vijay Abraham I | 26a84b3 | 2012-08-22 14:10:02 +0530 | [diff] [blame] | 102 | config OMAP_OCP2SCP |
| 103 | tristate "OMAP OCP2SCP DRIVER" |
Tony Lindgren | 770b6cb | 2012-12-16 12:28:46 -0800 | [diff] [blame] | 104 | depends on ARCH_OMAP2PLUS |
Kishon Vijay Abraham I | 26a84b3 | 2012-08-22 14:10:02 +0530 | [diff] [blame] | 105 | help |
| 106 | Driver to enable ocp2scp module which transforms ocp interface |
| 107 | protocol to scp protocol. In OMAP4, USB PHY is connected via |
| 108 | OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via |
| 109 | OCP2SCP. |
| 110 | |
Linus Walleij | 335a127 | 2016-07-08 00:11:02 +0200 | [diff] [blame] | 111 | config QCOM_EBI2 |
| 112 | bool "Qualcomm External Bus Interface 2 (EBI2)" |
Linus Walleij | d6db68b | 2016-10-02 23:53:59 +0200 | [diff] [blame] | 113 | depends on HAS_IOMEM |
Linus Walleij | 5fac7e8 | 2016-10-04 13:56:19 +0200 | [diff] [blame] | 114 | depends on ARCH_QCOM || COMPILE_TEST |
Linus Walleij | 335a127 | 2016-07-08 00:11:02 +0200 | [diff] [blame] | 115 | help |
| 116 | Say y here to enable support for the Qualcomm External Bus |
| 117 | Interface 2, which can be used to connect things like NAND Flash, |
| 118 | SRAM, ethernet adapters, FPGAs and LCD displays. |
| 119 | |
Geert Uytterhoeven | 89d463e | 2015-02-05 11:11:28 +0100 | [diff] [blame] | 120 | config SIMPLE_PM_BUS |
| 121 | bool "Simple Power-Managed Bus Driver" |
| 122 | depends on OF && PM |
Simon Horman | 41feae7 | 2016-03-03 10:39:58 +0900 | [diff] [blame] | 123 | depends on ARCH_RENESAS || COMPILE_TEST |
Santosh Shilimkar | 0ee7261 | 2012-09-14 14:50:34 +0530 | [diff] [blame] | 124 | help |
Geert Uytterhoeven | 89d463e | 2015-02-05 11:11:28 +0100 | [diff] [blame] | 125 | Driver for transparent busses that don't need a real driver, but |
| 126 | where the bus controller is part of a PM domain, or under the control |
| 127 | of a functional clock, and thus relies on runtime PM for managing |
| 128 | this PM domain and/or clock. |
| 129 | An example of such a bus controller is the Renesas Bus State |
| 130 | Controller (BSC, sometimes called "LBSC within Bus Bridge", or |
| 131 | "External Bus Interface") as found on several Renesas ARM SoCs. |
Pawel Moll | a33b0da | 2014-07-22 18:32:59 +0100 | [diff] [blame] | 132 | |
Chen-Yu Tsai | d787dcd | 2015-10-23 20:41:31 +0200 | [diff] [blame] | 133 | config SUNXI_RSB |
| 134 | tristate "Allwinner sunXi Reduced Serial Bus Driver" |
| 135 | default MACH_SUN8I || MACH_SUN9I |
| 136 | depends on ARCH_SUNXI |
| 137 | select REGMAP |
| 138 | help |
| 139 | Say y here to enable support for Allwinner's Reduced Serial Bus |
| 140 | (RSB) support. This controller is responsible for communicating |
| 141 | with various RSB based devices, such as AXP223, AXP8XX PMICs, |
| 142 | and AC100/AC200 ICs. |
| 143 | |
Jon Hunter | 46a8853 | 2016-06-17 13:40:32 +0100 | [diff] [blame] | 144 | config TEGRA_ACONNECT |
Thierry Reding | 2d301c0 | 2016-06-30 17:07:05 +0200 | [diff] [blame] | 145 | tristate "Tegra ACONNECT Bus Driver" |
Jon Hunter | 46a8853 | 2016-06-17 13:40:32 +0100 | [diff] [blame] | 146 | depends on ARCH_TEGRA_210_SOC |
| 147 | depends on OF && PM |
| 148 | select PM_CLK |
| 149 | help |
| 150 | Driver for the Tegra ACONNECT bus which is used to interface with |
| 151 | the devices inside the Audio Processing Engine (APE) for Tegra210. |
| 152 | |
Masahiro Yamada | 4b7f48d | 2015-12-09 15:52:59 +0900 | [diff] [blame] | 153 | config UNIPHIER_SYSTEM_BUS |
Masahiro Yamada | 047a555 | 2016-01-23 23:06:28 +0900 | [diff] [blame] | 154 | tristate "UniPhier System Bus driver" |
Masahiro Yamada | 4b7f48d | 2015-12-09 15:52:59 +0900 | [diff] [blame] | 155 | depends on ARCH_UNIPHIER && OF |
| 156 | default y |
| 157 | help |
| 158 | Support for UniPhier System Bus, a simple external bus. This is |
| 159 | needed to use on-board devices connected to UniPhier SoCs. |
| 160 | |
Pawel Moll | 3b9334a | 2014-04-30 16:46:29 +0100 | [diff] [blame] | 161 | config VEXPRESS_CONFIG |
| 162 | bool "Versatile Express configuration bus" |
| 163 | default y if ARCH_VEXPRESS |
| 164 | depends on ARM || ARM64 |
Arnd Bergmann | b33cdd2 | 2014-05-26 17:25:22 +0200 | [diff] [blame] | 165 | depends on OF |
Pawel Moll | 3b9334a | 2014-04-30 16:46:29 +0100 | [diff] [blame] | 166 | select REGMAP |
| 167 | help |
| 168 | Platform configuration infrastructure for the ARM Ltd. |
| 169 | Versatile Express. |
Kishon Vijay Abraham I | 26a84b3 | 2012-08-22 14:10:02 +0530 | [diff] [blame] | 170 | endmenu |