Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.19 / ae7a2a3fb6f8b784c2752863f4f1f20c656f76fb / . / arch / x86 / kvm / lapic.h
blob: 4af5405ae1e2f4e2822cde6bd844e73f0489e850 [file] [log] [blame]
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]1#ifndef __KVM_X86_LAPIC_H
2#define __KVM_X86_LAPIC_H
3
4#include "iodev.h"
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300[diff] [blame]5#include "kvm_timer.h"
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]6
7#include <linux/kvm_host.h>
8
9struct kvm_lapic {
10 unsigned long base_address;
11 struct kvm_io_device dev;
Marcelo Tosattid3c7b772009-02-23 10:57:41 -0300[diff] [blame]12 struct kvm_timer lapic_timer;
13 u32 divide_count;
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]14 struct kvm_vcpu *vcpu;
Gleb Natapov33e4c682009-06-11 11:06:51 +0300[diff] [blame]15 bool irr_pending;
Michael S. Tsirkin8680b942012-06-24 19:24:26 +0300[diff] [blame]16 /* Number of bits set in ISR. */
17 s16 isr_count;
18 /* The highest vector set in ISR; if -1 - invalid, must scan ISR. */
19 int highest_isr_cache;
Michael S. Tsirkin5eadf912012-06-24 19:24:19 +0300[diff] [blame]20 /**
21 * APIC register page. The layout matches the register layout seen by
22 * the guest 1:1, because it is accessed by the vmx microcode.
23 * Note: Only one register, the TPR, is used by the microcode.
24 */
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]25 void *regs;
Avi Kivityb93463a2007-10-25 16:52:32 +0200[diff] [blame]26 gpa_t vapic_addr;
27 struct page *vapic_page;
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]28};
29int kvm_create_lapic(struct kvm_vcpu *vcpu);
30void kvm_free_lapic(struct kvm_vcpu *vcpu);
31
32int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
33int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);
34int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu);
35void kvm_lapic_reset(struct kvm_vcpu *vcpu);
36u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);
37void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);
Kevin Tian58fbbf22011-08-30 13:56:17 +0300[diff] [blame]38void kvm_lapic_set_eoi(struct kvm_vcpu *vcpu);
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]39void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
Harvey Harrison8b2cf732008-04-27 12:14:13 -0700[diff] [blame]40u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu);
Gleb Natapovfc61b802009-07-05 17:39:35 +0300[diff] [blame]41void kvm_apic_set_version(struct kvm_vcpu *vcpu);
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]42
43int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest);
44int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda);
Gleb Natapov58c2dde2009-03-05 16:35:04 +0200[diff] [blame]45int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq);
Avi Kivity89342082011-11-10 14:57:21 +0200[diff] [blame]46int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type);
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]47
48u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
49void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data);
50void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu);
51int kvm_lapic_enabled(struct kvm_vcpu *vcpu);
Gleb Natapov343f94f2009-03-05 16:34:54 +0200[diff] [blame]52bool kvm_apic_present(struct kvm_vcpu *vcpu);
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]53int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]54
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +0800[diff] [blame]55u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);
56void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data);
57
Avi Kivityb93463a2007-10-25 16:52:32 +0200[diff] [blame]58void kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
59void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu);
60void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu);
61
Gleb Natapov0105d1a2009-07-05 17:39:36 +0300[diff] [blame]62int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
63int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
Gleb Natapov10388a02010-01-17 15:51:23 +0200[diff] [blame]64
65int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
66int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
67
68static inline bool kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu *vcpu)
69{
70 return vcpu->arch.hv_vapic & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE;
71}
Michael S. Tsirkinae7a2a32012-06-24 19:25:07 +0300[diff] [blame^]72
73int kvm_lapic_enable_pv_eoi(struct kvm_vcpu *vcpu, u64 data);
Zhang Xiantao82470192007-12-17 13:59:56 +0800[diff] [blame]74#endif