blob: 15aed8b7d981ab35747bd75327712ba963e80c18 [file] [log] [blame]
Mark Browna2342ae2009-07-29 21:21:49 +01001/*
2 * wm_hubs.c -- WM8993/4 common code
3 *
4 * Copyright 2009 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
Mark Brown79ef0ab2011-08-01 13:02:17 +090020#include <linux/mfd/wm8994/registers.h>
Mark Browna2342ae2009-07-29 21:21:49 +010021#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
Mark Browna2342ae2009-07-29 21:21:49 +010025#include <sound/initval.h>
26#include <sound/tlv.h>
27
28#include "wm8993.h"
29#include "wm_hubs.h"
30
31const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
32EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv);
33
34static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
35static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0);
36static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
37static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
38static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
39static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
40static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
41static const unsigned int spkboost_tlv[] = {
Clemens Ladisch028aa632011-11-20 15:15:31 +010042 TLV_DB_RANGE_HEAD(2),
Mark Browna2342ae2009-07-29 21:21:49 +010043 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
44 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
45};
46static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0);
47
48static const char *speaker_ref_text[] = {
49 "SPKVDD/2",
50 "VMID",
51};
52
53static const struct soc_enum speaker_ref =
54 SOC_ENUM_SINGLE(WM8993_SPEAKER_MIXER, 8, 2, speaker_ref_text);
55
56static const char *speaker_mode_text[] = {
57 "Class D",
58 "Class AB",
59};
60
61static const struct soc_enum speaker_mode =
62 SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text);
63
Mark Brown4dcc93d2010-03-29 17:18:41 +010064static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op)
Mark Browna2342ae2009-07-29 21:21:49 +010065{
Mark Brownd96ca3c2011-07-12 15:25:03 +090066 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Mark Browna2342ae2009-07-29 21:21:49 +010067 unsigned int reg;
68 int count = 0;
Mark Brown1479c3f2011-07-15 17:33:26 +090069 int timeout;
Mark Brown4dcc93d2010-03-29 17:18:41 +010070 unsigned int val;
71
72 val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1;
73
74 /* Trigger the command */
75 snd_soc_write(codec, WM8993_DC_SERVO_0, val);
Mark Browna2342ae2009-07-29 21:21:49 +010076
77 dev_dbg(codec->dev, "Waiting for DC servo...\n");
Mark Brown3ed70742010-01-20 17:39:45 +000078
Mark Brown1479c3f2011-07-15 17:33:26 +090079 if (hubs->dcs_done_irq)
80 timeout = 4;
81 else
82 timeout = 400;
83
84 do {
85 count++;
86
87 if (hubs->dcs_done_irq)
88 wait_for_completion_timeout(&hubs->dcs_done,
89 msecs_to_jiffies(250));
90 else
91 msleep(1);
Mark Brownd96ca3c2011-07-12 15:25:03 +090092
Mark Brown4dcc93d2010-03-29 17:18:41 +010093 reg = snd_soc_read(codec, WM8993_DC_SERVO_0);
Mark Brown1479c3f2011-07-15 17:33:26 +090094 dev_dbg(codec->dev, "DC servo: %x\n", reg);
95 } while (reg & op && count < timeout);
Mark Browna2342ae2009-07-29 21:21:49 +010096
Mark Brown4dcc93d2010-03-29 17:18:41 +010097 if (reg & op)
Mark Brown5a9f91c2011-02-17 12:05:46 -080098 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n",
99 op);
Mark Browna2342ae2009-07-29 21:21:49 +0100100}
101
Mark Brownd96ca3c2011-07-12 15:25:03 +0900102irqreturn_t wm_hubs_dcs_done(int irq, void *data)
103{
104 struct wm_hubs_data *hubs = data;
105
106 complete(&hubs->dcs_done);
107
108 return IRQ_HANDLED;
109}
110EXPORT_SYMBOL_GPL(wm_hubs_dcs_done);
111
Mark Brownaf31a222012-04-26 20:06:56 +0100112static bool wm_hubs_dac_hp_direct(struct snd_soc_codec *codec)
113{
114 int reg;
115
116 /* If we're going via the mixer we'll need to do additional checks */
117 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER1);
118 if (!(reg & WM8993_DACL_TO_HPOUT1L)) {
119 if (reg & ~WM8993_DACL_TO_MIXOUTL) {
120 dev_vdbg(codec->dev, "Analogue paths connected: %x\n",
121 reg & ~WM8993_DACL_TO_HPOUT1L);
122 return false;
123 } else {
124 dev_vdbg(codec->dev, "HPL connected to mixer\n");
125 return false;
126 }
127 } else {
128 dev_vdbg(codec->dev, "HPL connected to DAC\n");
129 }
130
131 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER2);
132 if (!(reg & WM8993_DACR_TO_HPOUT1R)) {
133 if (reg & ~WM8993_DACR_TO_MIXOUTR) {
134 dev_vdbg(codec->dev, "Analogue paths connected: %x\n",
135 reg & ~WM8993_DACR_TO_HPOUT1R);
136 return false;
137 } else {
138 dev_vdbg(codec->dev, "HPR connected to mixer\n");
139 return false;
140 }
141 } else {
142 dev_vdbg(codec->dev, "HPR connected to DAC\n");
143 }
144
145 return true;
146}
147
Mark Browna2342ae2009-07-29 21:21:49 +0100148/*
Mark Brown3ed70742010-01-20 17:39:45 +0000149 * Startup calibration of the DC servo
150 */
151static void calibrate_dc_servo(struct snd_soc_codec *codec)
152{
Mark Brownb2c812e2010-04-14 15:35:19 +0900153 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Mark Brown20a4e7f2011-01-21 12:47:33 +0000154 s8 offset;
Mark Brown79ef0ab2011-08-01 13:02:17 +0900155 u16 reg, reg_l, reg_r, dcs_cfg, dcs_reg;
156
157 switch (hubs->dcs_readback_mode) {
158 case 2:
159 dcs_reg = WM8994_DC_SERVO_4E;
160 break;
161 default:
162 dcs_reg = WM8993_DC_SERVO_3;
163 break;
164 }
Mark Brown3ed70742010-01-20 17:39:45 +0000165
Mark Brownfec6dd82010-10-27 13:48:36 -0700166 /* If we're using a digital only path and have a previously
167 * callibrated DC servo offset stored then use that. */
Mark Brownaf31a222012-04-26 20:06:56 +0100168 if (wm_hubs_dac_hp_direct(codec) && hubs->dac_hp_direct_dcs) {
Mark Brownfec6dd82010-10-27 13:48:36 -0700169 dev_dbg(codec->dev, "Using cached DC servo offset %x\n",
Mark Brownaf31a222012-04-26 20:06:56 +0100170 hubs->dac_hp_direct_dcs);
171 snd_soc_write(codec, dcs_reg, hubs->dac_hp_direct_dcs);
Mark Brownfec6dd82010-10-27 13:48:36 -0700172 wait_for_dc_servo(codec,
173 WM8993_DCS_TRIG_DAC_WR_0 |
174 WM8993_DCS_TRIG_DAC_WR_1);
175 return;
176 }
177
Mark Brownf9acf9f2011-06-07 23:23:52 +0100178 if (hubs->series_startup) {
Mark Brown11cef5f2010-11-26 17:23:44 +0000179 /* Set for 32 series updates */
180 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
181 WM8993_DCS_SERIES_NO_01_MASK,
182 32 << WM8993_DCS_SERIES_NO_01_SHIFT);
183 wait_for_dc_servo(codec,
184 WM8993_DCS_TRIG_SERIES_0 |
185 WM8993_DCS_TRIG_SERIES_1);
186 } else {
187 wait_for_dc_servo(codec,
188 WM8993_DCS_TRIG_STARTUP_0 |
189 WM8993_DCS_TRIG_STARTUP_1);
190 }
Mark Brown3ed70742010-01-20 17:39:45 +0000191
Mark Brownfec6dd82010-10-27 13:48:36 -0700192 /* Different chips in the family support different readback
193 * methods.
194 */
195 switch (hubs->dcs_readback_mode) {
196 case 0:
197 reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1)
Joe Perchesef995e32010-11-15 09:09:17 -0800198 & WM8993_DCS_INTEG_CHAN_0_MASK;
Mark Brownfec6dd82010-10-27 13:48:36 -0700199 reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2)
200 & WM8993_DCS_INTEG_CHAN_1_MASK;
201 break;
Mark Brown79ef0ab2011-08-01 13:02:17 +0900202 case 2:
Mark Brownfec6dd82010-10-27 13:48:36 -0700203 case 1:
Mark Brown79ef0ab2011-08-01 13:02:17 +0900204 reg = snd_soc_read(codec, dcs_reg);
Mark Brownd5b040c2011-06-07 23:28:45 +0100205 reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK)
Mark Brownfec6dd82010-10-27 13:48:36 -0700206 >> WM8993_DCS_DAC_WR_VAL_1_SHIFT;
Mark Brownd5b040c2011-06-07 23:28:45 +0100207 reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK;
Mark Brownfec6dd82010-10-27 13:48:36 -0700208 break;
209 default:
Mark Brown9e3be1e2010-11-02 09:58:49 -0400210 WARN(1, "Unknown DCS readback method\n");
Mark Browne778ba02012-02-29 15:39:56 +0000211 return;
Mark Brownfec6dd82010-10-27 13:48:36 -0700212 }
213
214 dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r);
215
Mark Brown3ed70742010-01-20 17:39:45 +0000216 /* Apply correction to DC servo result */
Mark Brown4537c4e2011-08-01 13:10:16 +0900217 if (hubs->dcs_codes_l || hubs->dcs_codes_r) {
218 dev_dbg(codec->dev,
219 "Applying %d/%d code DC servo correction\n",
220 hubs->dcs_codes_l, hubs->dcs_codes_r);
Mark Brown3ed70742010-01-20 17:39:45 +0000221
Mark Brownd5b040c2011-06-07 23:28:45 +0100222 /* HPOUT1R */
223 offset = reg_r;
Mark Brown4537c4e2011-08-01 13:10:16 +0900224 offset += hubs->dcs_codes_r;
Mark Brown20a4e7f2011-01-21 12:47:33 +0000225 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
Mark Brown3ed70742010-01-20 17:39:45 +0000226
Mark Brownd5b040c2011-06-07 23:28:45 +0100227 /* HPOUT1L */
228 offset = reg_l;
Mark Brown4537c4e2011-08-01 13:10:16 +0900229 offset += hubs->dcs_codes_l;
Mark Brown20a4e7f2011-01-21 12:47:33 +0000230 dcs_cfg |= (u8)offset;
Mark Brown3ed70742010-01-20 17:39:45 +0000231
Mark Brown3254d282010-05-10 14:56:03 +0100232 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg);
233
Mark Brown3ed70742010-01-20 17:39:45 +0000234 /* Do it */
Mark Brown79ef0ab2011-08-01 13:02:17 +0900235 snd_soc_write(codec, dcs_reg, dcs_cfg);
Mark Brown4dcc93d2010-03-29 17:18:41 +0100236 wait_for_dc_servo(codec,
237 WM8993_DCS_TRIG_DAC_WR_0 |
238 WM8993_DCS_TRIG_DAC_WR_1);
Mark Brownfec6dd82010-10-27 13:48:36 -0700239 } else {
Mark Brownd5b040c2011-06-07 23:28:45 +0100240 dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
241 dcs_cfg |= reg_l;
Mark Brown3ed70742010-01-20 17:39:45 +0000242 }
Mark Brownfec6dd82010-10-27 13:48:36 -0700243
244 /* Save the callibrated offset if we're in class W mode and
245 * therefore don't have any analogue signal mixed in. */
Mark Brownaf31a222012-04-26 20:06:56 +0100246 if (wm_hubs_dac_hp_direct(codec) && !hubs->no_cache_dac_hp_direct)
247 hubs->dac_hp_direct_dcs = dcs_cfg;
Mark Brown3ed70742010-01-20 17:39:45 +0000248}
249
250/*
Mark Browna2342ae2009-07-29 21:21:49 +0100251 * Update the DC servo calibration on gain changes
252 */
253static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol,
Mark Brown3ed70742010-01-20 17:39:45 +0000254 struct snd_ctl_elem_value *ucontrol)
Mark Browna2342ae2009-07-29 21:21:49 +0100255{
256 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
Mark Brownb2c812e2010-04-14 15:35:19 +0900257 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Mark Browna2342ae2009-07-29 21:21:49 +0100258 int ret;
259
Peter Ujfalusic4671a92011-10-06 09:59:12 +0300260 ret = snd_soc_put_volsw(kcontrol, ucontrol);
Mark Browna2342ae2009-07-29 21:21:49 +0100261
Mark Brownfec6dd82010-10-27 13:48:36 -0700262 /* Updating the analogue gains invalidates the DC servo cache */
Mark Brownaf31a222012-04-26 20:06:56 +0100263 hubs->dac_hp_direct_dcs = 0;
Mark Brownfec6dd82010-10-27 13:48:36 -0700264
Mark Brownae9d8602010-03-29 16:34:42 +0100265 /* If we're applying an offset correction then updating the
266 * callibration would be likely to introduce further offsets. */
Mark Brown4537c4e2011-08-01 13:10:16 +0900267 if (hubs->dcs_codes_l || hubs->dcs_codes_r || hubs->no_series_update)
Mark Brownae9d8602010-03-29 16:34:42 +0100268 return ret;
269
Mark Browna2342ae2009-07-29 21:21:49 +0100270 /* Only need to do this if the outputs are active */
271 if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1)
272 & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA))
273 snd_soc_update_bits(codec,
274 WM8993_DC_SERVO_0,
275 WM8993_DCS_TRIG_SINGLE_0 |
276 WM8993_DCS_TRIG_SINGLE_1,
277 WM8993_DCS_TRIG_SINGLE_0 |
278 WM8993_DCS_TRIG_SINGLE_1);
279
280 return ret;
281}
282
283static const struct snd_kcontrol_new analogue_snd_controls[] = {
284SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
285 inpga_tlv),
286SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
Mark Brownea02c632011-05-27 21:56:16 +0800287SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100288
289SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
290 inpga_tlv),
291SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
Mark Brownea02c632011-05-27 21:56:16 +0800292SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100293
294
295SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
296 inpga_tlv),
297SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
Mark Brownea02c632011-05-27 21:56:16 +0800298SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100299
300SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
301 inpga_tlv),
302SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
Mark Brownea02c632011-05-27 21:56:16 +0800303SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100304
305SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0,
306 inmix_sw_tlv),
307SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0,
308 inmix_sw_tlv),
309SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0,
310 inmix_tlv),
311SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv),
312SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0,
313 inmix_tlv),
314
315SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0,
316 inmix_sw_tlv),
317SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0,
318 inmix_sw_tlv),
319SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0,
320 inmix_tlv),
321SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv),
322SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0,
323 inmix_tlv),
324
325SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1,
326 outmix_tlv),
327SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1,
328 outmix_tlv),
329SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1,
330 outmix_tlv),
331SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1,
332 outmix_tlv),
333SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1,
334 outmix_tlv),
335SOC_SINGLE_TLV("Left Output Mixer Right Input Volume",
336 WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv),
337SOC_SINGLE_TLV("Left Output Mixer Left Input Volume",
338 WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv),
339SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1,
340 outmix_tlv),
341
342SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume",
343 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
344SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume",
345 WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv),
346SOC_SINGLE_TLV("Right Output Mixer IN1L Volume",
347 WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv),
348SOC_SINGLE_TLV("Right Output Mixer IN1R Volume",
349 WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv),
350SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume",
351 WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv),
352SOC_SINGLE_TLV("Right Output Mixer Left Input Volume",
353 WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv),
354SOC_SINGLE_TLV("Right Output Mixer Right Input Volume",
355 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
356SOC_SINGLE_TLV("Right Output Mixer DAC Volume",
357 WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv),
358
359SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME,
360 WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv),
361SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME,
362 WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0),
363SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME,
364 WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0),
365
366SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1),
367SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv),
368
369SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION,
370 5, 1, 1, wm_hubs_spkmix_tlv),
371SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION,
372 4, 1, 1, wm_hubs_spkmix_tlv),
373SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION,
374 3, 1, 1, wm_hubs_spkmix_tlv),
375
376SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION,
377 5, 1, 1, wm_hubs_spkmix_tlv),
378SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION,
379 4, 1, 1, wm_hubs_spkmix_tlv),
380SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION,
381 3, 1, 1, wm_hubs_spkmix_tlv),
382
383SOC_DOUBLE_R_TLV("Speaker Mixer Volume",
384 WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION,
385 0, 3, 1, spkmixout_tlv),
386SOC_DOUBLE_R_TLV("Speaker Volume",
387 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
388 0, 63, 0, outpga_tlv),
389SOC_DOUBLE_R("Speaker Switch",
390 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
391 6, 1, 0),
392SOC_DOUBLE_R("Speaker ZC Switch",
393 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
394 7, 1, 0),
Uk Kimed8cc472010-12-05 17:26:07 +0900395SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0,
Mark Browna2342ae2009-07-29 21:21:49 +0100396 spkboost_tlv),
397SOC_ENUM("Speaker Reference", speaker_ref),
398SOC_ENUM("Speaker Mode", speaker_mode),
399
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +0300400SOC_DOUBLE_R_EXT_TLV("Headphone Volume",
401 WM8993_LEFT_OUTPUT_VOLUME, WM8993_RIGHT_OUTPUT_VOLUME,
Peter Ujfalusic4671a92011-10-06 09:59:12 +0300402 0, 63, 0, snd_soc_get_volsw, wm8993_put_dc_servo,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +0300403 outpga_tlv),
404
Mark Browna2342ae2009-07-29 21:21:49 +0100405SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME,
406 WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0),
407SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME,
408 WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
409
410SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1),
411SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1),
412SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1,
413 line_tlv),
414
415SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1),
416SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1),
417SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1,
418 line_tlv),
419};
420
Mark Brown3ed70742010-01-20 17:39:45 +0000421static int hp_supply_event(struct snd_soc_dapm_widget *w,
422 struct snd_kcontrol *kcontrol, int event)
423{
424 struct snd_soc_codec *codec = w->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900425 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Mark Brown3ed70742010-01-20 17:39:45 +0000426
427 switch (event) {
428 case SND_SOC_DAPM_PRE_PMU:
429 switch (hubs->hp_startup_mode) {
430 case 0:
431 break;
432 case 1:
433 /* Enable the headphone amp */
434 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
435 WM8993_HPOUT1L_ENA |
436 WM8993_HPOUT1R_ENA,
437 WM8993_HPOUT1L_ENA |
438 WM8993_HPOUT1R_ENA);
439
440 /* Enable the second stage */
441 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
442 WM8993_HPOUT1L_DLY |
443 WM8993_HPOUT1R_DLY,
444 WM8993_HPOUT1L_DLY |
445 WM8993_HPOUT1R_DLY);
446 break;
447 default:
448 dev_err(codec->dev, "Unknown HP startup mode %d\n",
449 hubs->hp_startup_mode);
450 break;
451 }
452
453 case SND_SOC_DAPM_PRE_PMD:
454 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
455 WM8993_CP_ENA, 0);
456 break;
457 }
458
459 return 0;
460}
461
Mark Browna2342ae2009-07-29 21:21:49 +0100462static int hp_event(struct snd_soc_dapm_widget *w,
463 struct snd_kcontrol *kcontrol, int event)
464{
465 struct snd_soc_codec *codec = w->codec;
466 unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0);
467
468 switch (event) {
469 case SND_SOC_DAPM_POST_PMU:
470 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
471 WM8993_CP_ENA, WM8993_CP_ENA);
472
473 msleep(5);
474
475 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
476 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
477 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA);
478
479 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY;
480 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
481
Mark Brown3ed70742010-01-20 17:39:45 +0000482 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
Mark Brownf9925d42011-07-28 12:44:44 +0100483 WM8993_DCS_TIMER_PERIOD_01_MASK, 0);
Mark Brown3ed70742010-01-20 17:39:45 +0000484
485 calibrate_dc_servo(codec);
Mark Browna2342ae2009-07-29 21:21:49 +0100486
487 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT |
488 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT;
489 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
490 break;
491
492 case SND_SOC_DAPM_PRE_PMD:
Mark Brown3ed70742010-01-20 17:39:45 +0000493 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
Mark Brown6adb26b2010-05-10 16:13:11 +0100494 WM8993_HPOUT1L_OUTP |
495 WM8993_HPOUT1R_OUTP |
Mark Brown3ed70742010-01-20 17:39:45 +0000496 WM8993_HPOUT1L_RMV_SHORT |
497 WM8993_HPOUT1R_RMV_SHORT, 0);
Mark Browna2342ae2009-07-29 21:21:49 +0100498
Mark Brown3ed70742010-01-20 17:39:45 +0000499 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
Mark Brown6adb26b2010-05-10 16:13:11 +0100500 WM8993_HPOUT1L_DLY |
501 WM8993_HPOUT1R_DLY, 0);
Mark Browna2342ae2009-07-29 21:21:49 +0100502
Mark Brown395e4b72010-05-10 21:06:14 +0100503 snd_soc_write(codec, WM8993_DC_SERVO_0, 0);
504
Mark Browna2342ae2009-07-29 21:21:49 +0100505 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
506 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
507 0);
Mark Browna2342ae2009-07-29 21:21:49 +0100508 break;
509 }
510
511 return 0;
512}
513
514static int earpiece_event(struct snd_soc_dapm_widget *w,
515 struct snd_kcontrol *control, int event)
516{
517 struct snd_soc_codec *codec = w->codec;
518 u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA;
519
520 switch (event) {
521 case SND_SOC_DAPM_PRE_PMU:
522 reg |= WM8993_HPOUT2_IN_ENA;
523 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
524 udelay(50);
525 break;
526
527 case SND_SOC_DAPM_POST_PMD:
528 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
529 break;
530
531 default:
532 BUG();
533 break;
534 }
535
536 return 0;
537}
538
Mark Brown5f2f3892012-02-08 18:51:42 +0000539static int lineout_event(struct snd_soc_dapm_widget *w,
540 struct snd_kcontrol *control, int event)
541{
542 struct snd_soc_codec *codec = w->codec;
543 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
544 bool *flag;
545
546 switch (w->shift) {
547 case WM8993_LINEOUT1N_ENA_SHIFT:
548 flag = &hubs->lineout1n_ena;
549 break;
550 case WM8993_LINEOUT1P_ENA_SHIFT:
551 flag = &hubs->lineout1p_ena;
552 break;
553 case WM8993_LINEOUT2N_ENA_SHIFT:
554 flag = &hubs->lineout2n_ena;
555 break;
556 case WM8993_LINEOUT2P_ENA_SHIFT:
557 flag = &hubs->lineout2p_ena;
558 break;
559 default:
560 WARN(1, "Unknown line output");
561 return -EINVAL;
562 }
563
564 *flag = SND_SOC_DAPM_EVENT_ON(event);
565
566 return 0;
567}
568
Mark Browna2342ae2009-07-29 21:21:49 +0100569static const struct snd_kcontrol_new in1l_pga[] = {
570SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0),
571SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0),
572};
573
574static const struct snd_kcontrol_new in1r_pga[] = {
575SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0),
576SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0),
577};
578
579static const struct snd_kcontrol_new in2l_pga[] = {
580SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0),
581SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0),
582};
583
584static const struct snd_kcontrol_new in2r_pga[] = {
585SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0),
586SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0),
587};
588
589static const struct snd_kcontrol_new mixinl[] = {
590SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0),
591SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0),
592};
593
594static const struct snd_kcontrol_new mixinr[] = {
595SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0),
596SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0),
597};
598
599static const struct snd_kcontrol_new left_output_mixer[] = {
600SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0),
601SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0),
602SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0),
603SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0),
604SOC_DAPM_SINGLE("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0),
605SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0),
606SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0),
607SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0),
608};
609
610static const struct snd_kcontrol_new right_output_mixer[] = {
611SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0),
612SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0),
613SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0),
614SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0),
615SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0),
616SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0),
617SOC_DAPM_SINGLE("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0),
618SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0),
619};
620
621static const struct snd_kcontrol_new earpiece_mixer[] = {
622SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0),
623SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0),
624SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0),
625};
626
627static const struct snd_kcontrol_new left_speaker_boost[] = {
628SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0),
629SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0),
630SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0),
631};
632
633static const struct snd_kcontrol_new right_speaker_boost[] = {
634SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0),
635SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0),
636SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0),
637};
638
639static const struct snd_kcontrol_new line1_mix[] = {
640SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0),
641SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0),
642SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
643};
644
645static const struct snd_kcontrol_new line1n_mix[] = {
646SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0),
647SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0),
648};
649
650static const struct snd_kcontrol_new line1p_mix[] = {
651SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
652};
653
654static const struct snd_kcontrol_new line2_mix[] = {
Mark Brown43b6cec2012-02-01 23:46:58 +0000655SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER2, 2, 1, 0),
656SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER2, 1, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100657SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
658};
659
660static const struct snd_kcontrol_new line2n_mix[] = {
UK KIM114395c2012-01-28 01:52:22 +0900661SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 5, 1, 0),
662SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 6, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100663};
664
665static const struct snd_kcontrol_new line2p_mix[] = {
666SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
667};
668
669static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = {
670SND_SOC_DAPM_INPUT("IN1LN"),
671SND_SOC_DAPM_INPUT("IN1LP"),
672SND_SOC_DAPM_INPUT("IN2LN"),
Joonyoung Shim34825942009-12-04 15:12:10 +0900673SND_SOC_DAPM_INPUT("IN2LP:VXRN"),
Mark Browna2342ae2009-07-29 21:21:49 +0100674SND_SOC_DAPM_INPUT("IN1RN"),
675SND_SOC_DAPM_INPUT("IN1RP"),
676SND_SOC_DAPM_INPUT("IN2RN"),
Joonyoung Shim34825942009-12-04 15:12:10 +0900677SND_SOC_DAPM_INPUT("IN2RP:VXRP"),
Mark Browna2342ae2009-07-29 21:21:49 +0100678
Mark Brown91e20852011-12-02 16:01:41 +0000679SND_SOC_DAPM_SUPPLY("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0, NULL, 0),
680SND_SOC_DAPM_SUPPLY("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0, NULL, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100681
682SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0,
683 in1l_pga, ARRAY_SIZE(in1l_pga)),
684SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0,
685 in1r_pga, ARRAY_SIZE(in1r_pga)),
686
687SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0,
688 in2l_pga, ARRAY_SIZE(in2l_pga)),
689SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0,
690 in2r_pga, ARRAY_SIZE(in2r_pga)),
691
Mark Browna2342ae2009-07-29 21:21:49 +0100692SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0,
693 mixinl, ARRAY_SIZE(mixinl)),
694SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0,
695 mixinr, ARRAY_SIZE(mixinr)),
696
Mark Browna2342ae2009-07-29 21:21:49 +0100697SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0,
698 left_output_mixer, ARRAY_SIZE(left_output_mixer)),
699SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0,
700 right_output_mixer, ARRAY_SIZE(right_output_mixer)),
701
702SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0),
703SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0),
704
Mark Brown3ed70742010-01-20 17:39:45 +0000705SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event,
706 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
Mark Brown26422622012-02-21 09:36:49 +0000707SND_SOC_DAPM_OUT_DRV_E("Headphone PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
708 hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
Mark Browna2342ae2009-07-29 21:21:49 +0100709
710SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
711 earpiece_mixer, ARRAY_SIZE(earpiece_mixer)),
712SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0,
713 NULL, 0, earpiece_event,
714 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
715
716SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0,
717 left_speaker_boost, ARRAY_SIZE(left_speaker_boost)),
718SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0,
719 right_speaker_boost, ARRAY_SIZE(right_speaker_boost)),
720
Mark Brown03431972011-11-04 17:11:54 +0000721SND_SOC_DAPM_SUPPLY("TSHUT", WM8993_POWER_MANAGEMENT_2, 14, 0, NULL, 0),
Mark Browndc9c7452012-02-07 14:24:57 +0000722SND_SOC_DAPM_OUT_DRV("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0,
723 NULL, 0),
724SND_SOC_DAPM_OUT_DRV("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0,
725 NULL, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100726
727SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
728 line1_mix, ARRAY_SIZE(line1_mix)),
729SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
730 line2_mix, ARRAY_SIZE(line2_mix)),
731
732SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0,
733 line1n_mix, ARRAY_SIZE(line1n_mix)),
734SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0,
735 line1p_mix, ARRAY_SIZE(line1p_mix)),
736SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0,
737 line2n_mix, ARRAY_SIZE(line2n_mix)),
738SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0,
739 line2p_mix, ARRAY_SIZE(line2p_mix)),
740
Mark Brown5f2f3892012-02-08 18:51:42 +0000741SND_SOC_DAPM_OUT_DRV_E("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
742 NULL, 0, lineout_event,
743 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
744SND_SOC_DAPM_OUT_DRV_E("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
745 NULL, 0, lineout_event,
746 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
747SND_SOC_DAPM_OUT_DRV_E("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0,
748 NULL, 0, lineout_event,
749 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
750SND_SOC_DAPM_OUT_DRV_E("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0,
751 NULL, 0, lineout_event,
752 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
Mark Browna2342ae2009-07-29 21:21:49 +0100753
754SND_SOC_DAPM_OUTPUT("SPKOUTLP"),
755SND_SOC_DAPM_OUTPUT("SPKOUTLN"),
756SND_SOC_DAPM_OUTPUT("SPKOUTRP"),
757SND_SOC_DAPM_OUTPUT("SPKOUTRN"),
758SND_SOC_DAPM_OUTPUT("HPOUT1L"),
759SND_SOC_DAPM_OUTPUT("HPOUT1R"),
760SND_SOC_DAPM_OUTPUT("HPOUT2P"),
761SND_SOC_DAPM_OUTPUT("HPOUT2N"),
762SND_SOC_DAPM_OUTPUT("LINEOUT1P"),
763SND_SOC_DAPM_OUTPUT("LINEOUT1N"),
764SND_SOC_DAPM_OUTPUT("LINEOUT2P"),
765SND_SOC_DAPM_OUTPUT("LINEOUT2N"),
766};
767
768static const struct snd_soc_dapm_route analogue_routes[] = {
Mark Brown4baafdd2011-02-18 15:05:53 -0800769 { "MICBIAS1", NULL, "CLK_SYS" },
770 { "MICBIAS2", NULL, "CLK_SYS" },
771
Mark Browna2342ae2009-07-29 21:21:49 +0100772 { "IN1L PGA", "IN1LP Switch", "IN1LP" },
773 { "IN1L PGA", "IN1LN Switch", "IN1LN" },
774
Mark Brown4e04ada2011-07-15 15:12:31 +0900775 { "IN1L PGA", NULL, "VMID" },
776 { "IN1R PGA", NULL, "VMID" },
777 { "IN2L PGA", NULL, "VMID" },
778 { "IN2R PGA", NULL, "VMID" },
779
Mark Browna2342ae2009-07-29 21:21:49 +0100780 { "IN1R PGA", "IN1RP Switch", "IN1RP" },
781 { "IN1R PGA", "IN1RN Switch", "IN1RN" },
782
Joonyoung Shim34825942009-12-04 15:12:10 +0900783 { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" },
Mark Browna2342ae2009-07-29 21:21:49 +0100784 { "IN2L PGA", "IN2LN Switch", "IN2LN" },
785
Joonyoung Shim34825942009-12-04 15:12:10 +0900786 { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" },
Mark Browna2342ae2009-07-29 21:21:49 +0100787 { "IN2R PGA", "IN2RN Switch", "IN2RN" },
788
Joonyoung Shim34825942009-12-04 15:12:10 +0900789 { "Direct Voice", NULL, "IN2LP:VXRN" },
790 { "Direct Voice", NULL, "IN2RP:VXRP" },
Mark Browna2342ae2009-07-29 21:21:49 +0100791
792 { "MIXINL", "IN1L Switch", "IN1L PGA" },
793 { "MIXINL", "IN2L Switch", "IN2L PGA" },
794 { "MIXINL", NULL, "Direct Voice" },
795 { "MIXINL", NULL, "IN1LP" },
796 { "MIXINL", NULL, "Left Output Mixer" },
Mark Brown4e04ada2011-07-15 15:12:31 +0900797 { "MIXINL", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +0100798
799 { "MIXINR", "IN1R Switch", "IN1R PGA" },
800 { "MIXINR", "IN2R Switch", "IN2R PGA" },
801 { "MIXINR", NULL, "Direct Voice" },
802 { "MIXINR", NULL, "IN1RP" },
803 { "MIXINR", NULL, "Right Output Mixer" },
Mark Brown4e04ada2011-07-15 15:12:31 +0900804 { "MIXINR", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +0100805
806 { "ADCL", NULL, "MIXINL" },
807 { "ADCR", NULL, "MIXINR" },
808
809 { "Left Output Mixer", "Left Input Switch", "MIXINL" },
810 { "Left Output Mixer", "Right Input Switch", "MIXINR" },
811 { "Left Output Mixer", "IN2RN Switch", "IN2RN" },
812 { "Left Output Mixer", "IN2LN Switch", "IN2LN" },
Joonyoung Shim34825942009-12-04 15:12:10 +0900813 { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" },
Mark Browna2342ae2009-07-29 21:21:49 +0100814 { "Left Output Mixer", "IN1L Switch", "IN1L PGA" },
815 { "Left Output Mixer", "IN1R Switch", "IN1R PGA" },
816
817 { "Right Output Mixer", "Left Input Switch", "MIXINL" },
818 { "Right Output Mixer", "Right Input Switch", "MIXINR" },
819 { "Right Output Mixer", "IN2LN Switch", "IN2LN" },
820 { "Right Output Mixer", "IN2RN Switch", "IN2RN" },
Joonyoung Shim34825942009-12-04 15:12:10 +0900821 { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" },
Mark Browna2342ae2009-07-29 21:21:49 +0100822 { "Right Output Mixer", "IN1L Switch", "IN1L PGA" },
823 { "Right Output Mixer", "IN1R Switch", "IN1R PGA" },
824
825 { "Left Output PGA", NULL, "Left Output Mixer" },
826 { "Left Output PGA", NULL, "TOCLK" },
827
828 { "Right Output PGA", NULL, "Right Output Mixer" },
829 { "Right Output PGA", NULL, "TOCLK" },
830
831 { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" },
832 { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" },
833 { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" },
834
Mark Brown4e04ada2011-07-15 15:12:31 +0900835 { "Earpiece Driver", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +0100836 { "Earpiece Driver", NULL, "Earpiece Mixer" },
837 { "HPOUT2N", NULL, "Earpiece Driver" },
838 { "HPOUT2P", NULL, "Earpiece Driver" },
839
840 { "SPKL", "Input Switch", "MIXINL" },
841 { "SPKL", "IN1LP Switch", "IN1LP" },
Mark Brown39cca162011-04-08 16:32:16 +0900842 { "SPKL", "Output Switch", "Left Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100843 { "SPKL", NULL, "TOCLK" },
844
845 { "SPKR", "Input Switch", "MIXINR" },
846 { "SPKR", "IN1RP Switch", "IN1RP" },
Mark Brown39cca162011-04-08 16:32:16 +0900847 { "SPKR", "Output Switch", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100848 { "SPKR", NULL, "TOCLK" },
849
850 { "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
851 { "SPKL Boost", "SPKL Switch", "SPKL" },
852 { "SPKL Boost", "SPKR Switch", "SPKR" },
853
854 { "SPKR Boost", "Direct Voice Switch", "Direct Voice" },
855 { "SPKR Boost", "SPKR Switch", "SPKR" },
856 { "SPKR Boost", "SPKL Switch", "SPKL" },
857
Mark Brown4e04ada2011-07-15 15:12:31 +0900858 { "SPKL Driver", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +0100859 { "SPKL Driver", NULL, "SPKL Boost" },
860 { "SPKL Driver", NULL, "CLK_SYS" },
Mark Brown03431972011-11-04 17:11:54 +0000861 { "SPKL Driver", NULL, "TSHUT" },
Mark Browna2342ae2009-07-29 21:21:49 +0100862
Mark Brown4e04ada2011-07-15 15:12:31 +0900863 { "SPKR Driver", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +0100864 { "SPKR Driver", NULL, "SPKR Boost" },
865 { "SPKR Driver", NULL, "CLK_SYS" },
Mark Brown03431972011-11-04 17:11:54 +0000866 { "SPKR Driver", NULL, "TSHUT" },
Mark Browna2342ae2009-07-29 21:21:49 +0100867
868 { "SPKOUTLP", NULL, "SPKL Driver" },
869 { "SPKOUTLN", NULL, "SPKL Driver" },
870 { "SPKOUTRP", NULL, "SPKR Driver" },
871 { "SPKOUTRN", NULL, "SPKR Driver" },
872
Mark Brown39cca162011-04-08 16:32:16 +0900873 { "Left Headphone Mux", "Mixer", "Left Output PGA" },
874 { "Right Headphone Mux", "Mixer", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100875
876 { "Headphone PGA", NULL, "Left Headphone Mux" },
877 { "Headphone PGA", NULL, "Right Headphone Mux" },
Mark Brown4e04ada2011-07-15 15:12:31 +0900878 { "Headphone PGA", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +0100879 { "Headphone PGA", NULL, "CLK_SYS" },
Mark Brown3ed70742010-01-20 17:39:45 +0000880 { "Headphone PGA", NULL, "Headphone Supply" },
Mark Browna2342ae2009-07-29 21:21:49 +0100881
882 { "HPOUT1L", NULL, "Headphone PGA" },
883 { "HPOUT1R", NULL, "Headphone PGA" },
884
Mark Brown4e04ada2011-07-15 15:12:31 +0900885 { "LINEOUT1N Driver", NULL, "VMID" },
886 { "LINEOUT1P Driver", NULL, "VMID" },
887 { "LINEOUT2N Driver", NULL, "VMID" },
888 { "LINEOUT2P Driver", NULL, "VMID" },
889
Mark Browna2342ae2009-07-29 21:21:49 +0100890 { "LINEOUT1N", NULL, "LINEOUT1N Driver" },
891 { "LINEOUT1P", NULL, "LINEOUT1P Driver" },
892 { "LINEOUT2N", NULL, "LINEOUT2N Driver" },
893 { "LINEOUT2P", NULL, "LINEOUT2P Driver" },
894};
895
896static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
897 { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
898 { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
Mark Brownd0b48af2011-05-14 17:21:28 -0700899 { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100900
901 { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
902 { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
903};
904
905static const struct snd_soc_dapm_route lineout1_se_routes[] = {
Mark Brownd0b48af2011-05-14 17:21:28 -0700906 { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" },
907 { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100908
Mark Brownd0b48af2011-05-14 17:21:28 -0700909 { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100910
911 { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
912 { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
913};
914
915static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
Mark Brownee767442012-01-31 11:55:32 +0000916 { "LINEOUT2 Mixer", "IN1L Switch", "IN1L PGA" },
917 { "LINEOUT2 Mixer", "IN1R Switch", "IN1R PGA" },
Mark Brownd0b48af2011-05-14 17:21:28 -0700918 { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100919
920 { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
921 { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
922};
923
924static const struct snd_soc_dapm_route lineout2_se_routes[] = {
Mark Brownd0b48af2011-05-14 17:21:28 -0700925 { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" },
926 { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100927
Mark Brownd0b48af2011-05-14 17:21:28 -0700928 { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100929
930 { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
931 { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
932};
933
934int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec)
935{
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200936 struct snd_soc_dapm_context *dapm = &codec->dapm;
937
Mark Browna2342ae2009-07-29 21:21:49 +0100938 /* Latch volume update bits & default ZC on */
939 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME,
940 WM8993_IN1_VU, WM8993_IN1_VU);
941 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME,
942 WM8993_IN1_VU, WM8993_IN1_VU);
943 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME,
944 WM8993_IN2_VU, WM8993_IN2_VU);
945 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
946 WM8993_IN2_VU, WM8993_IN2_VU);
947
Mark Brownfb5af532011-05-15 12:18:38 -0700948 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT,
949 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
Mark Browna2342ae2009-07-29 21:21:49 +0100950 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
951 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
952
953 snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
Mark Brownfb5af532011-05-15 12:18:38 -0700954 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC,
955 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC);
Mark Browna2342ae2009-07-29 21:21:49 +0100956 snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
957 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
958 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
959
960 snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
Mark Brownfb5af532011-05-15 12:18:38 -0700961 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU,
962 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU);
Mark Browna2342ae2009-07-29 21:21:49 +0100963 snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
964 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
965 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
966
Liam Girdwood022658b2012-02-03 17:43:09 +0000967 snd_soc_add_codec_controls(codec, analogue_snd_controls,
Mark Browna2342ae2009-07-29 21:21:49 +0100968 ARRAY_SIZE(analogue_snd_controls));
969
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200970 snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets,
Mark Browna2342ae2009-07-29 21:21:49 +0100971 ARRAY_SIZE(analogue_dapm_widgets));
972 return 0;
973}
974EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls);
975
976int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec,
977 int lineout1_diff, int lineout2_diff)
978{
Mark Brownd96ca3c2011-07-12 15:25:03 +0900979 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200980 struct snd_soc_dapm_context *dapm = &codec->dapm;
981
Mark Brownd96ca3c2011-07-12 15:25:03 +0900982 init_completion(&hubs->dcs_done);
983
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200984 snd_soc_dapm_add_routes(dapm, analogue_routes,
Mark Browna2342ae2009-07-29 21:21:49 +0100985 ARRAY_SIZE(analogue_routes));
986
987 if (lineout1_diff)
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200988 snd_soc_dapm_add_routes(dapm,
Mark Browna2342ae2009-07-29 21:21:49 +0100989 lineout1_diff_routes,
990 ARRAY_SIZE(lineout1_diff_routes));
991 else
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200992 snd_soc_dapm_add_routes(dapm,
Mark Browna2342ae2009-07-29 21:21:49 +0100993 lineout1_se_routes,
994 ARRAY_SIZE(lineout1_se_routes));
995
996 if (lineout2_diff)
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200997 snd_soc_dapm_add_routes(dapm,
Mark Browna2342ae2009-07-29 21:21:49 +0100998 lineout2_diff_routes,
999 ARRAY_SIZE(lineout2_diff_routes));
1000 else
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001001 snd_soc_dapm_add_routes(dapm,
Mark Browna2342ae2009-07-29 21:21:49 +01001002 lineout2_se_routes,
1003 ARRAY_SIZE(lineout2_se_routes));
1004
1005 return 0;
1006}
1007EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes);
1008
Mark Brownaa983d92009-09-30 14:16:11 +01001009int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec,
1010 int lineout1_diff, int lineout2_diff,
1011 int lineout1fb, int lineout2fb,
1012 int jd_scthr, int jd_thr, int micbias1_lvl,
1013 int micbias2_lvl)
1014{
Mark Brown5f2f3892012-02-08 18:51:42 +00001015 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
1016
1017 hubs->lineout1_se = !lineout1_diff;
1018 hubs->lineout2_se = !lineout2_diff;
1019
Mark Brownaa983d92009-09-30 14:16:11 +01001020 if (!lineout1_diff)
1021 snd_soc_update_bits(codec, WM8993_LINE_MIXER1,
1022 WM8993_LINEOUT1_MODE,
1023 WM8993_LINEOUT1_MODE);
1024 if (!lineout2_diff)
1025 snd_soc_update_bits(codec, WM8993_LINE_MIXER2,
1026 WM8993_LINEOUT2_MODE,
1027 WM8993_LINEOUT2_MODE);
1028
Mark Brown5472bbc2012-03-19 17:31:56 +00001029 if (!lineout1_diff && !lineout2_diff)
1030 snd_soc_update_bits(codec, WM8993_ANTIPOP1,
1031 WM8993_LINEOUT_VMID_BUF_ENA,
1032 WM8993_LINEOUT_VMID_BUF_ENA);
1033
Mark Brownaa983d92009-09-30 14:16:11 +01001034 if (lineout1fb)
1035 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
1036 WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB);
1037
1038 if (lineout2fb)
1039 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
1040 WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB);
1041
1042 snd_soc_update_bits(codec, WM8993_MICBIAS,
1043 WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK |
1044 WM8993_MICB1_LVL | WM8993_MICB2_LVL,
1045 jd_scthr << WM8993_JD_SCTHR_SHIFT |
1046 jd_thr << WM8993_JD_THR_SHIFT |
1047 micbias1_lvl |
1048 micbias2_lvl << WM8993_MICB2_LVL_SHIFT);
1049
1050 return 0;
1051}
1052EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata);
1053
Mark Brown5f2f3892012-02-08 18:51:42 +00001054void wm_hubs_vmid_ena(struct snd_soc_codec *codec)
1055{
1056 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
1057 int val = 0;
1058
1059 if (hubs->lineout1_se)
1060 val |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA;
1061
1062 if (hubs->lineout2_se)
1063 val |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA;
1064
1065 /* Enable the line outputs while we power up */
1066 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3, val, val);
1067}
1068EXPORT_SYMBOL_GPL(wm_hubs_vmid_ena);
1069
1070void wm_hubs_set_bias_level(struct snd_soc_codec *codec,
1071 enum snd_soc_bias_level level)
1072{
1073 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
1074 int val;
1075
1076 switch (level) {
Mark Brownd60d6c32012-02-10 18:09:42 +00001077 case SND_SOC_BIAS_STANDBY:
1078 /* Clamp the inputs to VMID while we ramp to charge caps */
1079 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG,
1080 WM8993_INPUTS_CLAMP, WM8993_INPUTS_CLAMP);
1081 break;
1082
Mark Brown5f2f3892012-02-08 18:51:42 +00001083 case SND_SOC_BIAS_ON:
1084 /* Turn off any unneded single ended outputs */
1085 val = 0;
1086
1087 if (hubs->lineout1_se && hubs->lineout1n_ena)
1088 val |= WM8993_LINEOUT1N_ENA;
1089
1090 if (hubs->lineout1_se && hubs->lineout1p_ena)
1091 val |= WM8993_LINEOUT1P_ENA;
1092
1093 if (hubs->lineout2_se && hubs->lineout2n_ena)
1094 val |= WM8993_LINEOUT2N_ENA;
1095
1096 if (hubs->lineout2_se && hubs->lineout2p_ena)
1097 val |= WM8993_LINEOUT2P_ENA;
1098
1099 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3,
1100 WM8993_LINEOUT1N_ENA |
1101 WM8993_LINEOUT1P_ENA |
1102 WM8993_LINEOUT2N_ENA |
1103 WM8993_LINEOUT2P_ENA,
1104 val);
1105
Mark Brownd60d6c32012-02-10 18:09:42 +00001106 /* Remove the input clamps */
1107 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG,
1108 WM8993_INPUTS_CLAMP, 0);
Mark Brown5f2f3892012-02-08 18:51:42 +00001109 break;
1110
1111 default:
1112 break;
1113 }
1114}
1115EXPORT_SYMBOL_GPL(wm_hubs_set_bias_level);
1116
Mark Browna2342ae2009-07-29 21:21:49 +01001117MODULE_DESCRIPTION("Shared support for Wolfson hubs products");
1118MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1119MODULE_LICENSE("GPL");