blob: 5258ac870e6aab3880c460ebe8e1ce49b7368be1 [file] [log] [blame]
Eli Cohene126ba92013-07-07 17:25:49 +03001/*
Saeed Mahameed6cf0a152015-04-02 17:07:30 +03002 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
Eli Cohene126ba92013-07-07 17:25:49 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33
34#include <linux/kref.h>
35#include <linux/random.h>
36#include <linux/debugfs.h>
37#include <linux/export.h>
Eli Cohen746b5582013-10-23 09:53:14 +030038#include <linux/delay.h>
Eli Cohene126ba92013-07-07 17:25:49 +030039#include <rdma/ib_umem.h>
Haggai Eranb4cfe442014-12-11 17:04:26 +020040#include <rdma/ib_umem_odp.h>
Haggai Eran968e78d2014-12-11 17:04:11 +020041#include <rdma/ib_verbs.h>
Eli Cohene126ba92013-07-07 17:25:49 +030042#include "mlx5_ib.h"
43
44enum {
Eli Cohen746b5582013-10-23 09:53:14 +030045 MAX_PENDING_REG_MR = 8,
Eli Cohene126ba92013-07-07 17:25:49 +030046};
47
Haggai Eran832a6b02014-12-11 17:04:22 +020048#define MLX5_UMR_ALIGN 2048
49#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
50static __be64 mlx5_ib_update_mtt_emergency_buffer[
51 MLX5_UMR_MTT_MIN_CHUNK_SIZE/sizeof(__be64)]
52 __aligned(MLX5_UMR_ALIGN);
53static DEFINE_MUTEX(mlx5_ib_update_mtt_emergency_buffer_mutex);
54#endif
Eli Cohenfe45f822013-09-11 16:35:35 +030055
Haggai Eran6aec21f2014-12-11 17:04:23 +020056static int clean_mr(struct mlx5_ib_mr *mr);
57
Haggai Eranb4cfe442014-12-11 17:04:26 +020058static int destroy_mkey(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)
59{
Matan Baraka606b0f2016-02-29 18:05:28 +020060 int err = mlx5_core_destroy_mkey(dev->mdev, &mr->mmkey);
Haggai Eranb4cfe442014-12-11 17:04:26 +020061
62#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
63 /* Wait until all page fault handlers using the mr complete. */
64 synchronize_srcu(&dev->mr_srcu);
65#endif
66
67 return err;
68}
69
Eli Cohene126ba92013-07-07 17:25:49 +030070static int order2idx(struct mlx5_ib_dev *dev, int order)
71{
72 struct mlx5_mr_cache *cache = &dev->cache;
73
74 if (order < cache->ent[0].order)
75 return 0;
76 else
77 return order - cache->ent[0].order;
78}
79
Noa Osherovich56e11d62016-02-29 16:46:51 +020080static bool use_umr_mtt_update(struct mlx5_ib_mr *mr, u64 start, u64 length)
81{
82 return ((u64)1 << mr->order) * MLX5_ADAPTER_PAGE_SIZE >=
83 length + (start & (MLX5_ADAPTER_PAGE_SIZE - 1));
84}
85
Noa Osherovich395a8e42016-02-29 16:46:50 +020086#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
87static void update_odp_mr(struct mlx5_ib_mr *mr)
88{
89 if (mr->umem->odp_data) {
90 /*
91 * This barrier prevents the compiler from moving the
92 * setting of umem->odp_data->private to point to our
93 * MR, before reg_umr finished, to ensure that the MR
94 * initialization have finished before starting to
95 * handle invalidations.
96 */
97 smp_wmb();
98 mr->umem->odp_data->private = mr;
99 /*
100 * Make sure we will see the new
101 * umem->odp_data->private value in the invalidation
102 * routines, before we can get page faults on the
103 * MR. Page faults can happen once we put the MR in
104 * the tree, below this line. Without the barrier,
105 * there can be a fault handling and an invalidation
106 * before umem->odp_data->private == mr is visible to
107 * the invalidation handler.
108 */
109 smp_wmb();
110 }
111}
112#endif
113
Eli Cohen746b5582013-10-23 09:53:14 +0300114static void reg_mr_callback(int status, void *context)
115{
116 struct mlx5_ib_mr *mr = context;
117 struct mlx5_ib_dev *dev = mr->dev;
118 struct mlx5_mr_cache *cache = &dev->cache;
119 int c = order2idx(dev, mr->order);
120 struct mlx5_cache_ent *ent = &cache->ent[c];
121 u8 key;
Eli Cohen746b5582013-10-23 09:53:14 +0300122 unsigned long flags;
Matan Baraka606b0f2016-02-29 18:05:28 +0200123 struct mlx5_mkey_table *table = &dev->mdev->priv.mkey_table;
Haggai Eran86059332014-05-22 14:50:09 +0300124 int err;
Eli Cohen746b5582013-10-23 09:53:14 +0300125
Eli Cohen746b5582013-10-23 09:53:14 +0300126 spin_lock_irqsave(&ent->lock, flags);
127 ent->pending--;
128 spin_unlock_irqrestore(&ent->lock, flags);
129 if (status) {
130 mlx5_ib_warn(dev, "async reg mr failed. status %d\n", status);
131 kfree(mr);
132 dev->fill_delay = 1;
133 mod_timer(&dev->delay_timer, jiffies + HZ);
134 return;
135 }
136
Jack Morgenstein9603b612014-07-28 23:30:22 +0300137 spin_lock_irqsave(&dev->mdev->priv.mkey_lock, flags);
138 key = dev->mdev->priv.mkey_key++;
139 spin_unlock_irqrestore(&dev->mdev->priv.mkey_lock, flags);
Saeed Mahameedec22eb52016-07-16 06:28:36 +0300140 mr->mmkey.key = mlx5_idx_to_mkey(MLX5_GET(create_mkey_out, mr->out, mkey_index)) | key;
Eli Cohen746b5582013-10-23 09:53:14 +0300141
142 cache->last_add = jiffies;
143
144 spin_lock_irqsave(&ent->lock, flags);
145 list_add_tail(&mr->list, &ent->head);
146 ent->cur++;
147 ent->size++;
148 spin_unlock_irqrestore(&ent->lock, flags);
Haggai Eran86059332014-05-22 14:50:09 +0300149
150 write_lock_irqsave(&table->lock, flags);
Matan Baraka606b0f2016-02-29 18:05:28 +0200151 err = radix_tree_insert(&table->tree, mlx5_base_mkey(mr->mmkey.key),
152 &mr->mmkey);
Haggai Eran86059332014-05-22 14:50:09 +0300153 if (err)
Matan Baraka606b0f2016-02-29 18:05:28 +0200154 pr_err("Error inserting to mkey tree. 0x%x\n", -err);
Haggai Eran86059332014-05-22 14:50:09 +0300155 write_unlock_irqrestore(&table->lock, flags);
Eli Cohen746b5582013-10-23 09:53:14 +0300156}
157
Eli Cohene126ba92013-07-07 17:25:49 +0300158static int add_keys(struct mlx5_ib_dev *dev, int c, int num)
159{
Eli Cohene126ba92013-07-07 17:25:49 +0300160 struct mlx5_mr_cache *cache = &dev->cache;
161 struct mlx5_cache_ent *ent = &cache->ent[c];
Saeed Mahameedec22eb52016-07-16 06:28:36 +0300162 int inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
Eli Cohene126ba92013-07-07 17:25:49 +0300163 struct mlx5_ib_mr *mr;
164 int npages = 1 << ent->order;
Saeed Mahameedec22eb52016-07-16 06:28:36 +0300165 void *mkc;
166 u32 *in;
Eli Cohene126ba92013-07-07 17:25:49 +0300167 int err = 0;
168 int i;
169
Saeed Mahameedec22eb52016-07-16 06:28:36 +0300170 in = kzalloc(inlen, GFP_KERNEL);
Eli Cohene126ba92013-07-07 17:25:49 +0300171 if (!in)
172 return -ENOMEM;
173
Saeed Mahameedec22eb52016-07-16 06:28:36 +0300174 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
Eli Cohene126ba92013-07-07 17:25:49 +0300175 for (i = 0; i < num; i++) {
Eli Cohen746b5582013-10-23 09:53:14 +0300176 if (ent->pending >= MAX_PENDING_REG_MR) {
177 err = -EAGAIN;
178 break;
179 }
180
Eli Cohene126ba92013-07-07 17:25:49 +0300181 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
182 if (!mr) {
183 err = -ENOMEM;
Eli Cohen746b5582013-10-23 09:53:14 +0300184 break;
Eli Cohene126ba92013-07-07 17:25:49 +0300185 }
186 mr->order = ent->order;
187 mr->umred = 1;
Eli Cohen746b5582013-10-23 09:53:14 +0300188 mr->dev = dev;
Saeed Mahameedec22eb52016-07-16 06:28:36 +0300189
190 MLX5_SET(mkc, mkc, free, 1);
191 MLX5_SET(mkc, mkc, umr_en, 1);
192 MLX5_SET(mkc, mkc, access_mode, MLX5_MKC_ACCESS_MODE_MTT);
193
194 MLX5_SET(mkc, mkc, qpn, 0xffffff);
195 MLX5_SET(mkc, mkc, translations_octword_size, (npages + 1) / 2);
196 MLX5_SET(mkc, mkc, log_page_size, 12);
Eli Cohene126ba92013-07-07 17:25:49 +0300197
Eli Cohen746b5582013-10-23 09:53:14 +0300198 spin_lock_irq(&ent->lock);
199 ent->pending++;
200 spin_unlock_irq(&ent->lock);
Saeed Mahameedec22eb52016-07-16 06:28:36 +0300201 err = mlx5_core_create_mkey_cb(dev->mdev, &mr->mmkey,
202 in, inlen,
203 mr->out, sizeof(mr->out),
204 reg_mr_callback, mr);
Eli Cohene126ba92013-07-07 17:25:49 +0300205 if (err) {
Eli Cohend14e7112014-12-02 12:26:19 +0200206 spin_lock_irq(&ent->lock);
207 ent->pending--;
208 spin_unlock_irq(&ent->lock);
Eli Cohene126ba92013-07-07 17:25:49 +0300209 mlx5_ib_warn(dev, "create mkey failed %d\n", err);
Eli Cohene126ba92013-07-07 17:25:49 +0300210 kfree(mr);
Eli Cohen746b5582013-10-23 09:53:14 +0300211 break;
Eli Cohene126ba92013-07-07 17:25:49 +0300212 }
Eli Cohene126ba92013-07-07 17:25:49 +0300213 }
214
Eli Cohene126ba92013-07-07 17:25:49 +0300215 kfree(in);
216 return err;
217}
218
219static void remove_keys(struct mlx5_ib_dev *dev, int c, int num)
220{
Eli Cohene126ba92013-07-07 17:25:49 +0300221 struct mlx5_mr_cache *cache = &dev->cache;
222 struct mlx5_cache_ent *ent = &cache->ent[c];
223 struct mlx5_ib_mr *mr;
Eli Cohene126ba92013-07-07 17:25:49 +0300224 int err;
225 int i;
226
227 for (i = 0; i < num; i++) {
Eli Cohen746b5582013-10-23 09:53:14 +0300228 spin_lock_irq(&ent->lock);
Eli Cohene126ba92013-07-07 17:25:49 +0300229 if (list_empty(&ent->head)) {
Eli Cohen746b5582013-10-23 09:53:14 +0300230 spin_unlock_irq(&ent->lock);
Eli Cohene126ba92013-07-07 17:25:49 +0300231 return;
232 }
233 mr = list_first_entry(&ent->head, struct mlx5_ib_mr, list);
234 list_del(&mr->list);
235 ent->cur--;
236 ent->size--;
Eli Cohen746b5582013-10-23 09:53:14 +0300237 spin_unlock_irq(&ent->lock);
Haggai Eranb4cfe442014-12-11 17:04:26 +0200238 err = destroy_mkey(dev, mr);
Eli Cohen203099f2013-09-11 16:35:26 +0300239 if (err)
Eli Cohene126ba92013-07-07 17:25:49 +0300240 mlx5_ib_warn(dev, "failed destroy mkey\n");
Eli Cohen203099f2013-09-11 16:35:26 +0300241 else
Eli Cohene126ba92013-07-07 17:25:49 +0300242 kfree(mr);
Eli Cohene126ba92013-07-07 17:25:49 +0300243 }
244}
245
246static ssize_t size_write(struct file *filp, const char __user *buf,
247 size_t count, loff_t *pos)
248{
249 struct mlx5_cache_ent *ent = filp->private_data;
250 struct mlx5_ib_dev *dev = ent->dev;
251 char lbuf[20];
252 u32 var;
253 int err;
254 int c;
255
256 if (copy_from_user(lbuf, buf, sizeof(lbuf)))
Dan Carpenter5e631a02013-07-10 13:58:59 +0300257 return -EFAULT;
Eli Cohene126ba92013-07-07 17:25:49 +0300258
259 c = order2idx(dev, ent->order);
260 lbuf[sizeof(lbuf) - 1] = 0;
261
262 if (sscanf(lbuf, "%u", &var) != 1)
263 return -EINVAL;
264
265 if (var < ent->limit)
266 return -EINVAL;
267
268 if (var > ent->size) {
Eli Cohen746b5582013-10-23 09:53:14 +0300269 do {
270 err = add_keys(dev, c, var - ent->size);
271 if (err && err != -EAGAIN)
272 return err;
273
274 usleep_range(3000, 5000);
275 } while (err);
Eli Cohene126ba92013-07-07 17:25:49 +0300276 } else if (var < ent->size) {
277 remove_keys(dev, c, ent->size - var);
278 }
279
280 return count;
281}
282
283static ssize_t size_read(struct file *filp, char __user *buf, size_t count,
284 loff_t *pos)
285{
286 struct mlx5_cache_ent *ent = filp->private_data;
287 char lbuf[20];
288 int err;
289
290 if (*pos)
291 return 0;
292
293 err = snprintf(lbuf, sizeof(lbuf), "%d\n", ent->size);
294 if (err < 0)
295 return err;
296
297 if (copy_to_user(buf, lbuf, err))
Dan Carpenter5e631a02013-07-10 13:58:59 +0300298 return -EFAULT;
Eli Cohene126ba92013-07-07 17:25:49 +0300299
300 *pos += err;
301
302 return err;
303}
304
305static const struct file_operations size_fops = {
306 .owner = THIS_MODULE,
307 .open = simple_open,
308 .write = size_write,
309 .read = size_read,
310};
311
312static ssize_t limit_write(struct file *filp, const char __user *buf,
313 size_t count, loff_t *pos)
314{
315 struct mlx5_cache_ent *ent = filp->private_data;
316 struct mlx5_ib_dev *dev = ent->dev;
317 char lbuf[20];
318 u32 var;
319 int err;
320 int c;
321
322 if (copy_from_user(lbuf, buf, sizeof(lbuf)))
Dan Carpenter5e631a02013-07-10 13:58:59 +0300323 return -EFAULT;
Eli Cohene126ba92013-07-07 17:25:49 +0300324
325 c = order2idx(dev, ent->order);
326 lbuf[sizeof(lbuf) - 1] = 0;
327
328 if (sscanf(lbuf, "%u", &var) != 1)
329 return -EINVAL;
330
331 if (var > ent->size)
332 return -EINVAL;
333
334 ent->limit = var;
335
336 if (ent->cur < ent->limit) {
337 err = add_keys(dev, c, 2 * ent->limit - ent->cur);
338 if (err)
339 return err;
340 }
341
342 return count;
343}
344
345static ssize_t limit_read(struct file *filp, char __user *buf, size_t count,
346 loff_t *pos)
347{
348 struct mlx5_cache_ent *ent = filp->private_data;
349 char lbuf[20];
350 int err;
351
352 if (*pos)
353 return 0;
354
355 err = snprintf(lbuf, sizeof(lbuf), "%d\n", ent->limit);
356 if (err < 0)
357 return err;
358
359 if (copy_to_user(buf, lbuf, err))
Dan Carpenter5e631a02013-07-10 13:58:59 +0300360 return -EFAULT;
Eli Cohene126ba92013-07-07 17:25:49 +0300361
362 *pos += err;
363
364 return err;
365}
366
367static const struct file_operations limit_fops = {
368 .owner = THIS_MODULE,
369 .open = simple_open,
370 .write = limit_write,
371 .read = limit_read,
372};
373
374static int someone_adding(struct mlx5_mr_cache *cache)
375{
376 int i;
377
378 for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++) {
379 if (cache->ent[i].cur < cache->ent[i].limit)
380 return 1;
381 }
382
383 return 0;
384}
385
386static void __cache_work_func(struct mlx5_cache_ent *ent)
387{
388 struct mlx5_ib_dev *dev = ent->dev;
389 struct mlx5_mr_cache *cache = &dev->cache;
390 int i = order2idx(dev, ent->order);
Eli Cohen746b5582013-10-23 09:53:14 +0300391 int err;
Eli Cohene126ba92013-07-07 17:25:49 +0300392
393 if (cache->stopped)
394 return;
395
396 ent = &dev->cache.ent[i];
Eli Cohen746b5582013-10-23 09:53:14 +0300397 if (ent->cur < 2 * ent->limit && !dev->fill_delay) {
398 err = add_keys(dev, i, 1);
399 if (ent->cur < 2 * ent->limit) {
400 if (err == -EAGAIN) {
401 mlx5_ib_dbg(dev, "returned eagain, order %d\n",
402 i + 2);
403 queue_delayed_work(cache->wq, &ent->dwork,
404 msecs_to_jiffies(3));
405 } else if (err) {
406 mlx5_ib_warn(dev, "command failed order %d, err %d\n",
407 i + 2, err);
408 queue_delayed_work(cache->wq, &ent->dwork,
409 msecs_to_jiffies(1000));
410 } else {
411 queue_work(cache->wq, &ent->work);
412 }
413 }
Eli Cohene126ba92013-07-07 17:25:49 +0300414 } else if (ent->cur > 2 * ent->limit) {
Leon Romanovskyab5cdc32015-10-21 09:21:17 +0300415 /*
416 * The remove_keys() logic is performed as garbage collection
417 * task. Such task is intended to be run when no other active
418 * processes are running.
419 *
420 * The need_resched() will return TRUE if there are user tasks
421 * to be activated in near future.
422 *
423 * In such case, we don't execute remove_keys() and postpone
424 * the garbage collection work to try to run in next cycle,
425 * in order to free CPU resources to other tasks.
426 */
427 if (!need_resched() && !someone_adding(cache) &&
Eli Cohen746b5582013-10-23 09:53:14 +0300428 time_after(jiffies, cache->last_add + 300 * HZ)) {
Eli Cohene126ba92013-07-07 17:25:49 +0300429 remove_keys(dev, i, 1);
430 if (ent->cur > ent->limit)
431 queue_work(cache->wq, &ent->work);
432 } else {
Eli Cohen746b5582013-10-23 09:53:14 +0300433 queue_delayed_work(cache->wq, &ent->dwork, 300 * HZ);
Eli Cohene126ba92013-07-07 17:25:49 +0300434 }
435 }
436}
437
438static void delayed_cache_work_func(struct work_struct *work)
439{
440 struct mlx5_cache_ent *ent;
441
442 ent = container_of(work, struct mlx5_cache_ent, dwork.work);
443 __cache_work_func(ent);
444}
445
446static void cache_work_func(struct work_struct *work)
447{
448 struct mlx5_cache_ent *ent;
449
450 ent = container_of(work, struct mlx5_cache_ent, work);
451 __cache_work_func(ent);
452}
453
454static struct mlx5_ib_mr *alloc_cached_mr(struct mlx5_ib_dev *dev, int order)
455{
456 struct mlx5_mr_cache *cache = &dev->cache;
457 struct mlx5_ib_mr *mr = NULL;
458 struct mlx5_cache_ent *ent;
459 int c;
460 int i;
461
462 c = order2idx(dev, order);
463 if (c < 0 || c >= MAX_MR_CACHE_ENTRIES) {
464 mlx5_ib_warn(dev, "order %d, cache index %d\n", order, c);
465 return NULL;
466 }
467
468 for (i = c; i < MAX_MR_CACHE_ENTRIES; i++) {
469 ent = &cache->ent[i];
470
471 mlx5_ib_dbg(dev, "order %d, cache index %d\n", ent->order, i);
472
Eli Cohen746b5582013-10-23 09:53:14 +0300473 spin_lock_irq(&ent->lock);
Eli Cohene126ba92013-07-07 17:25:49 +0300474 if (!list_empty(&ent->head)) {
475 mr = list_first_entry(&ent->head, struct mlx5_ib_mr,
476 list);
477 list_del(&mr->list);
478 ent->cur--;
Eli Cohen746b5582013-10-23 09:53:14 +0300479 spin_unlock_irq(&ent->lock);
Eli Cohene126ba92013-07-07 17:25:49 +0300480 if (ent->cur < ent->limit)
481 queue_work(cache->wq, &ent->work);
482 break;
483 }
Eli Cohen746b5582013-10-23 09:53:14 +0300484 spin_unlock_irq(&ent->lock);
Eli Cohene126ba92013-07-07 17:25:49 +0300485
486 queue_work(cache->wq, &ent->work);
Eli Cohene126ba92013-07-07 17:25:49 +0300487 }
488
489 if (!mr)
490 cache->ent[c].miss++;
491
492 return mr;
493}
494
495static void free_cached_mr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)
496{
497 struct mlx5_mr_cache *cache = &dev->cache;
498 struct mlx5_cache_ent *ent;
499 int shrink = 0;
500 int c;
501
502 c = order2idx(dev, mr->order);
503 if (c < 0 || c >= MAX_MR_CACHE_ENTRIES) {
504 mlx5_ib_warn(dev, "order %d, cache index %d\n", mr->order, c);
505 return;
506 }
507 ent = &cache->ent[c];
Eli Cohen746b5582013-10-23 09:53:14 +0300508 spin_lock_irq(&ent->lock);
Eli Cohene126ba92013-07-07 17:25:49 +0300509 list_add_tail(&mr->list, &ent->head);
510 ent->cur++;
511 if (ent->cur > 2 * ent->limit)
512 shrink = 1;
Eli Cohen746b5582013-10-23 09:53:14 +0300513 spin_unlock_irq(&ent->lock);
Eli Cohene126ba92013-07-07 17:25:49 +0300514
515 if (shrink)
516 queue_work(cache->wq, &ent->work);
517}
518
519static void clean_keys(struct mlx5_ib_dev *dev, int c)
520{
Eli Cohene126ba92013-07-07 17:25:49 +0300521 struct mlx5_mr_cache *cache = &dev->cache;
522 struct mlx5_cache_ent *ent = &cache->ent[c];
523 struct mlx5_ib_mr *mr;
Eli Cohene126ba92013-07-07 17:25:49 +0300524 int err;
525
Moshe Lazer3c461912013-09-11 16:35:23 +0300526 cancel_delayed_work(&ent->dwork);
Eli Cohene126ba92013-07-07 17:25:49 +0300527 while (1) {
Eli Cohen746b5582013-10-23 09:53:14 +0300528 spin_lock_irq(&ent->lock);
Eli Cohene126ba92013-07-07 17:25:49 +0300529 if (list_empty(&ent->head)) {
Eli Cohen746b5582013-10-23 09:53:14 +0300530 spin_unlock_irq(&ent->lock);
Eli Cohene126ba92013-07-07 17:25:49 +0300531 return;
532 }
533 mr = list_first_entry(&ent->head, struct mlx5_ib_mr, list);
534 list_del(&mr->list);
535 ent->cur--;
536 ent->size--;
Eli Cohen746b5582013-10-23 09:53:14 +0300537 spin_unlock_irq(&ent->lock);
Haggai Eranb4cfe442014-12-11 17:04:26 +0200538 err = destroy_mkey(dev, mr);
Eli Cohen203099f2013-09-11 16:35:26 +0300539 if (err)
Eli Cohene126ba92013-07-07 17:25:49 +0300540 mlx5_ib_warn(dev, "failed destroy mkey\n");
Eli Cohen203099f2013-09-11 16:35:26 +0300541 else
Eli Cohene126ba92013-07-07 17:25:49 +0300542 kfree(mr);
Eli Cohene126ba92013-07-07 17:25:49 +0300543 }
544}
545
546static int mlx5_mr_cache_debugfs_init(struct mlx5_ib_dev *dev)
547{
548 struct mlx5_mr_cache *cache = &dev->cache;
549 struct mlx5_cache_ent *ent;
550 int i;
551
552 if (!mlx5_debugfs_root)
553 return 0;
554
Jack Morgenstein9603b612014-07-28 23:30:22 +0300555 cache->root = debugfs_create_dir("mr_cache", dev->mdev->priv.dbg_root);
Eli Cohene126ba92013-07-07 17:25:49 +0300556 if (!cache->root)
557 return -ENOMEM;
558
559 for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++) {
560 ent = &cache->ent[i];
561 sprintf(ent->name, "%d", ent->order);
562 ent->dir = debugfs_create_dir(ent->name, cache->root);
563 if (!ent->dir)
564 return -ENOMEM;
565
566 ent->fsize = debugfs_create_file("size", 0600, ent->dir, ent,
567 &size_fops);
568 if (!ent->fsize)
569 return -ENOMEM;
570
571 ent->flimit = debugfs_create_file("limit", 0600, ent->dir, ent,
572 &limit_fops);
573 if (!ent->flimit)
574 return -ENOMEM;
575
576 ent->fcur = debugfs_create_u32("cur", 0400, ent->dir,
577 &ent->cur);
578 if (!ent->fcur)
579 return -ENOMEM;
580
581 ent->fmiss = debugfs_create_u32("miss", 0600, ent->dir,
582 &ent->miss);
583 if (!ent->fmiss)
584 return -ENOMEM;
585 }
586
587 return 0;
588}
589
590static void mlx5_mr_cache_debugfs_cleanup(struct mlx5_ib_dev *dev)
591{
592 if (!mlx5_debugfs_root)
593 return;
594
595 debugfs_remove_recursive(dev->cache.root);
596}
597
Eli Cohen746b5582013-10-23 09:53:14 +0300598static void delay_time_func(unsigned long ctx)
599{
600 struct mlx5_ib_dev *dev = (struct mlx5_ib_dev *)ctx;
601
602 dev->fill_delay = 0;
603}
604
Eli Cohene126ba92013-07-07 17:25:49 +0300605int mlx5_mr_cache_init(struct mlx5_ib_dev *dev)
606{
607 struct mlx5_mr_cache *cache = &dev->cache;
608 struct mlx5_cache_ent *ent;
609 int limit;
Eli Cohene126ba92013-07-07 17:25:49 +0300610 int err;
611 int i;
612
Bhaktipriya Shridhar3c856c82016-08-15 23:41:18 +0530613 cache->wq = alloc_ordered_workqueue("mkey_cache", WQ_MEM_RECLAIM);
Eli Cohene126ba92013-07-07 17:25:49 +0300614 if (!cache->wq) {
615 mlx5_ib_warn(dev, "failed to create work queue\n");
616 return -ENOMEM;
617 }
618
Eli Cohen746b5582013-10-23 09:53:14 +0300619 setup_timer(&dev->delay_timer, delay_time_func, (unsigned long)dev);
Eli Cohene126ba92013-07-07 17:25:49 +0300620 for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++) {
621 INIT_LIST_HEAD(&cache->ent[i].head);
622 spin_lock_init(&cache->ent[i].lock);
623
624 ent = &cache->ent[i];
625 INIT_LIST_HEAD(&ent->head);
626 spin_lock_init(&ent->lock);
627 ent->order = i + 2;
628 ent->dev = dev;
629
Eli Cohenafd02cd2016-11-27 15:18:21 +0200630 if ((dev->mdev->profile->mask & MLX5_PROF_MASK_MR_CACHE) &&
631 (mlx5_core_is_pf(dev->mdev)))
Jack Morgenstein9603b612014-07-28 23:30:22 +0300632 limit = dev->mdev->profile->mr_cache[i].limit;
Eli Cohen2d036fa2013-10-24 12:01:00 +0300633 else
Eli Cohene126ba92013-07-07 17:25:49 +0300634 limit = 0;
Eli Cohen2d036fa2013-10-24 12:01:00 +0300635
Eli Cohene126ba92013-07-07 17:25:49 +0300636 INIT_WORK(&ent->work, cache_work_func);
637 INIT_DELAYED_WORK(&ent->dwork, delayed_cache_work_func);
638 ent->limit = limit;
639 queue_work(cache->wq, &ent->work);
640 }
641
642 err = mlx5_mr_cache_debugfs_init(dev);
643 if (err)
644 mlx5_ib_warn(dev, "cache debugfs failure\n");
645
646 return 0;
647}
648
Eli Cohenacbda522016-10-27 16:36:43 +0300649static void wait_for_async_commands(struct mlx5_ib_dev *dev)
650{
651 struct mlx5_mr_cache *cache = &dev->cache;
652 struct mlx5_cache_ent *ent;
653 int total = 0;
654 int i;
655 int j;
656
657 for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++) {
658 ent = &cache->ent[i];
659 for (j = 0 ; j < 1000; j++) {
660 if (!ent->pending)
661 break;
662 msleep(50);
663 }
664 }
665 for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++) {
666 ent = &cache->ent[i];
667 total += ent->pending;
668 }
669
670 if (total)
671 mlx5_ib_warn(dev, "aborted while there are %d pending mr requests\n", total);
672 else
673 mlx5_ib_warn(dev, "done with all pending requests\n");
674}
675
Eli Cohene126ba92013-07-07 17:25:49 +0300676int mlx5_mr_cache_cleanup(struct mlx5_ib_dev *dev)
677{
678 int i;
679
680 dev->cache.stopped = 1;
Moshe Lazer3c461912013-09-11 16:35:23 +0300681 flush_workqueue(dev->cache.wq);
Eli Cohene126ba92013-07-07 17:25:49 +0300682
683 mlx5_mr_cache_debugfs_cleanup(dev);
684
685 for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++)
686 clean_keys(dev, i);
687
Moshe Lazer3c461912013-09-11 16:35:23 +0300688 destroy_workqueue(dev->cache.wq);
Eli Cohenacbda522016-10-27 16:36:43 +0300689 wait_for_async_commands(dev);
Eli Cohen746b5582013-10-23 09:53:14 +0300690 del_timer_sync(&dev->delay_timer);
Moshe Lazer3c461912013-09-11 16:35:23 +0300691
Eli Cohene126ba92013-07-07 17:25:49 +0300692 return 0;
693}
694
695struct ib_mr *mlx5_ib_get_dma_mr(struct ib_pd *pd, int acc)
696{
697 struct mlx5_ib_dev *dev = to_mdev(pd->device);
Saeed Mahameedec22eb52016-07-16 06:28:36 +0300698 int inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
Jack Morgenstein9603b612014-07-28 23:30:22 +0300699 struct mlx5_core_dev *mdev = dev->mdev;
Eli Cohene126ba92013-07-07 17:25:49 +0300700 struct mlx5_ib_mr *mr;
Saeed Mahameedec22eb52016-07-16 06:28:36 +0300701 void *mkc;
702 u32 *in;
Eli Cohene126ba92013-07-07 17:25:49 +0300703 int err;
704
705 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
706 if (!mr)
707 return ERR_PTR(-ENOMEM);
708
Saeed Mahameedec22eb52016-07-16 06:28:36 +0300709 in = kzalloc(inlen, GFP_KERNEL);
Eli Cohene126ba92013-07-07 17:25:49 +0300710 if (!in) {
711 err = -ENOMEM;
712 goto err_free;
713 }
714
Saeed Mahameedec22eb52016-07-16 06:28:36 +0300715 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
Eli Cohene126ba92013-07-07 17:25:49 +0300716
Saeed Mahameedec22eb52016-07-16 06:28:36 +0300717 MLX5_SET(mkc, mkc, access_mode, MLX5_MKC_ACCESS_MODE_PA);
718 MLX5_SET(mkc, mkc, a, !!(acc & IB_ACCESS_REMOTE_ATOMIC));
719 MLX5_SET(mkc, mkc, rw, !!(acc & IB_ACCESS_REMOTE_WRITE));
720 MLX5_SET(mkc, mkc, rr, !!(acc & IB_ACCESS_REMOTE_READ));
721 MLX5_SET(mkc, mkc, lw, !!(acc & IB_ACCESS_LOCAL_WRITE));
722 MLX5_SET(mkc, mkc, lr, 1);
723
724 MLX5_SET(mkc, mkc, length64, 1);
725 MLX5_SET(mkc, mkc, pd, to_mpd(pd)->pdn);
726 MLX5_SET(mkc, mkc, qpn, 0xffffff);
727 MLX5_SET64(mkc, mkc, start_addr, 0);
728
729 err = mlx5_core_create_mkey(mdev, &mr->mmkey, in, inlen);
Eli Cohene126ba92013-07-07 17:25:49 +0300730 if (err)
731 goto err_in;
732
733 kfree(in);
Matan Baraka606b0f2016-02-29 18:05:28 +0200734 mr->ibmr.lkey = mr->mmkey.key;
735 mr->ibmr.rkey = mr->mmkey.key;
Eli Cohene126ba92013-07-07 17:25:49 +0300736 mr->umem = NULL;
737
738 return &mr->ibmr;
739
740err_in:
741 kfree(in);
742
743err_free:
744 kfree(mr);
745
746 return ERR_PTR(err);
747}
748
749static int get_octo_len(u64 addr, u64 len, int page_size)
750{
751 u64 offset;
752 int npages;
753
754 offset = addr & (page_size - 1);
755 npages = ALIGN(len + offset, page_size) >> ilog2(page_size);
756 return (npages + 1) / 2;
757}
758
759static int use_umr(int order)
760{
Haggai Erancc149f752014-12-11 17:04:21 +0200761 return order <= MLX5_MAX_UMR_SHIFT;
Eli Cohene126ba92013-07-07 17:25:49 +0300762}
763
Noa Osherovich395a8e42016-02-29 16:46:50 +0200764static int dma_map_mr_pas(struct mlx5_ib_dev *dev, struct ib_umem *umem,
765 int npages, int page_shift, int *size,
766 __be64 **mr_pas, dma_addr_t *dma)
767{
768 __be64 *pas;
769 struct device *ddev = dev->ib_dev.dma_device;
770
771 /*
772 * UMR copies MTTs in units of MLX5_UMR_MTT_ALIGNMENT bytes.
773 * To avoid copying garbage after the pas array, we allocate
774 * a little more.
775 */
776 *size = ALIGN(sizeof(u64) * npages, MLX5_UMR_MTT_ALIGNMENT);
777 *mr_pas = kmalloc(*size + MLX5_UMR_ALIGN - 1, GFP_KERNEL);
778 if (!(*mr_pas))
779 return -ENOMEM;
780
781 pas = PTR_ALIGN(*mr_pas, MLX5_UMR_ALIGN);
782 mlx5_ib_populate_pas(dev, umem, page_shift, pas, MLX5_IB_MTT_PRESENT);
783 /* Clear padding after the actual pages. */
784 memset(pas + npages, 0, *size - npages * sizeof(u64));
785
786 *dma = dma_map_single(ddev, pas, *size, DMA_TO_DEVICE);
787 if (dma_mapping_error(ddev, *dma)) {
788 kfree(*mr_pas);
789 return -ENOMEM;
790 }
791
792 return 0;
793}
794
795static void prep_umr_wqe_common(struct ib_pd *pd, struct ib_send_wr *wr,
796 struct ib_sge *sg, u64 dma, int n, u32 key,
797 int page_shift)
Eli Cohene126ba92013-07-07 17:25:49 +0300798{
799 struct mlx5_ib_dev *dev = to_mdev(pd->device);
Christoph Hellwige622f2f2015-10-08 09:16:33 +0100800 struct mlx5_umr_wr *umrwr = umr_wr(wr);
Eli Cohene126ba92013-07-07 17:25:49 +0300801
802 sg->addr = dma;
803 sg->length = ALIGN(sizeof(u64) * n, 64);
Jason Gunthorpeb37c7882015-07-30 17:22:19 -0600804 sg->lkey = dev->umrc.pd->local_dma_lkey;
Eli Cohene126ba92013-07-07 17:25:49 +0300805
806 wr->next = NULL;
Eli Cohene126ba92013-07-07 17:25:49 +0300807 wr->sg_list = sg;
808 if (n)
809 wr->num_sge = 1;
810 else
811 wr->num_sge = 0;
812
813 wr->opcode = MLX5_IB_WR_UMR;
Haggai Eran968e78d2014-12-11 17:04:11 +0200814
815 umrwr->npages = n;
816 umrwr->page_shift = page_shift;
817 umrwr->mkey = key;
Noa Osherovich395a8e42016-02-29 16:46:50 +0200818}
819
820static void prep_umr_reg_wqe(struct ib_pd *pd, struct ib_send_wr *wr,
821 struct ib_sge *sg, u64 dma, int n, u32 key,
822 int page_shift, u64 virt_addr, u64 len,
823 int access_flags)
824{
825 struct mlx5_umr_wr *umrwr = umr_wr(wr);
826
827 prep_umr_wqe_common(pd, wr, sg, dma, n, key, page_shift);
828
829 wr->send_flags = 0;
830
Haggai Eran968e78d2014-12-11 17:04:11 +0200831 umrwr->target.virt_addr = virt_addr;
832 umrwr->length = len;
833 umrwr->access_flags = access_flags;
834 umrwr->pd = pd;
Eli Cohene126ba92013-07-07 17:25:49 +0300835}
836
837static void prep_umr_unreg_wqe(struct mlx5_ib_dev *dev,
838 struct ib_send_wr *wr, u32 key)
839{
Christoph Hellwige622f2f2015-10-08 09:16:33 +0100840 struct mlx5_umr_wr *umrwr = umr_wr(wr);
Haggai Eran968e78d2014-12-11 17:04:11 +0200841
842 wr->send_flags = MLX5_IB_SEND_UMR_UNREG | MLX5_IB_SEND_UMR_FAIL_IF_FREE;
Eli Cohene126ba92013-07-07 17:25:49 +0300843 wr->opcode = MLX5_IB_WR_UMR;
Haggai Eran968e78d2014-12-11 17:04:11 +0200844 umrwr->mkey = key;
Eli Cohene126ba92013-07-07 17:25:49 +0300845}
846
Noa Osherovich395a8e42016-02-29 16:46:50 +0200847static struct ib_umem *mr_umem_get(struct ib_pd *pd, u64 start, u64 length,
848 int access_flags, int *npages,
849 int *page_shift, int *ncont, int *order)
850{
851 struct mlx5_ib_dev *dev = to_mdev(pd->device);
852 struct ib_umem *umem = ib_umem_get(pd->uobject->context, start, length,
853 access_flags, 0);
854 if (IS_ERR(umem)) {
855 mlx5_ib_err(dev, "umem get failed (%ld)\n", PTR_ERR(umem));
856 return (void *)umem;
857 }
858
Majd Dibbiny762f8992016-10-27 16:36:47 +0300859 mlx5_ib_cont_pages(umem, start, MLX5_MKEY_PAGE_SHIFT_MASK, npages,
860 page_shift, ncont, order);
Noa Osherovich395a8e42016-02-29 16:46:50 +0200861 if (!*npages) {
862 mlx5_ib_warn(dev, "avoid zero region\n");
863 ib_umem_release(umem);
864 return ERR_PTR(-EINVAL);
865 }
866
867 mlx5_ib_dbg(dev, "npages %d, ncont %d, order %d, page_shift %d\n",
868 *npages, *ncont, *order, *page_shift);
869
870 return umem;
871}
872
Christoph Hellwigadd08d72016-03-03 09:38:22 +0100873static void mlx5_ib_umr_done(struct ib_cq *cq, struct ib_wc *wc)
Eli Cohene126ba92013-07-07 17:25:49 +0300874{
Christoph Hellwigadd08d72016-03-03 09:38:22 +0100875 struct mlx5_ib_umr_context *context =
876 container_of(wc->wr_cqe, struct mlx5_ib_umr_context, cqe);
Eli Cohene126ba92013-07-07 17:25:49 +0300877
Christoph Hellwigadd08d72016-03-03 09:38:22 +0100878 context->status = wc->status;
879 complete(&context->done);
880}
Eli Cohene126ba92013-07-07 17:25:49 +0300881
Christoph Hellwigadd08d72016-03-03 09:38:22 +0100882static inline void mlx5_ib_init_umr_context(struct mlx5_ib_umr_context *context)
883{
884 context->cqe.done = mlx5_ib_umr_done;
885 context->status = -1;
886 init_completion(&context->done);
Eli Cohene126ba92013-07-07 17:25:49 +0300887}
888
889static struct mlx5_ib_mr *reg_umr(struct ib_pd *pd, struct ib_umem *umem,
890 u64 virt_addr, u64 len, int npages,
891 int page_shift, int order, int access_flags)
892{
893 struct mlx5_ib_dev *dev = to_mdev(pd->device);
Eli Cohen203099f2013-09-11 16:35:26 +0300894 struct device *ddev = dev->ib_dev.dma_device;
Eli Cohene126ba92013-07-07 17:25:49 +0300895 struct umr_common *umrc = &dev->umrc;
Shachar Raindela74d2412014-05-22 14:50:12 +0300896 struct mlx5_ib_umr_context umr_context;
Doug Ledford0025b0b2016-03-03 11:23:37 -0500897 struct mlx5_umr_wr umrwr = {};
Christoph Hellwige622f2f2015-10-08 09:16:33 +0100898 struct ib_send_wr *bad;
Eli Cohene126ba92013-07-07 17:25:49 +0300899 struct mlx5_ib_mr *mr;
900 struct ib_sge sg;
Haggai Erancc149f752014-12-11 17:04:21 +0200901 int size;
Haggai Eran21af2c32014-12-11 17:04:10 +0200902 __be64 *mr_pas;
903 dma_addr_t dma;
Haggai Eran096f7e72014-05-22 14:50:08 +0300904 int err = 0;
Eli Cohene126ba92013-07-07 17:25:49 +0300905 int i;
906
Eli Cohen746b5582013-10-23 09:53:14 +0300907 for (i = 0; i < 1; i++) {
Eli Cohene126ba92013-07-07 17:25:49 +0300908 mr = alloc_cached_mr(dev, order);
909 if (mr)
910 break;
911
912 err = add_keys(dev, order2idx(dev, order), 1);
Eli Cohen746b5582013-10-23 09:53:14 +0300913 if (err && err != -EAGAIN) {
914 mlx5_ib_warn(dev, "add_keys failed, err %d\n", err);
Eli Cohene126ba92013-07-07 17:25:49 +0300915 break;
916 }
917 }
918
919 if (!mr)
920 return ERR_PTR(-EAGAIN);
921
Noa Osherovich395a8e42016-02-29 16:46:50 +0200922 err = dma_map_mr_pas(dev, umem, npages, page_shift, &size, &mr_pas,
923 &dma);
924 if (err)
Haggai Eran096f7e72014-05-22 14:50:08 +0300925 goto free_mr;
Eli Cohen203099f2013-09-11 16:35:26 +0300926
Christoph Hellwigadd08d72016-03-03 09:38:22 +0100927 mlx5_ib_init_umr_context(&umr_context);
928
Christoph Hellwigadd08d72016-03-03 09:38:22 +0100929 umrwr.wr.wr_cqe = &umr_context.cqe;
Matan Baraka606b0f2016-02-29 18:05:28 +0200930 prep_umr_reg_wqe(pd, &umrwr.wr, &sg, dma, npages, mr->mmkey.key,
Christoph Hellwige622f2f2015-10-08 09:16:33 +0100931 page_shift, virt_addr, len, access_flags);
Eli Cohene126ba92013-07-07 17:25:49 +0300932
Eli Cohene126ba92013-07-07 17:25:49 +0300933 down(&umrc->sem);
Christoph Hellwige622f2f2015-10-08 09:16:33 +0100934 err = ib_post_send(umrc->qp, &umrwr.wr, &bad);
Eli Cohene126ba92013-07-07 17:25:49 +0300935 if (err) {
936 mlx5_ib_warn(dev, "post send failed, err %d\n", err);
Haggai Eran096f7e72014-05-22 14:50:08 +0300937 goto unmap_dma;
Shachar Raindela74d2412014-05-22 14:50:12 +0300938 } else {
939 wait_for_completion(&umr_context.done);
940 if (umr_context.status != IB_WC_SUCCESS) {
941 mlx5_ib_warn(dev, "reg umr failed\n");
942 err = -EFAULT;
943 }
Haggai Eran096f7e72014-05-22 14:50:08 +0300944 }
945
Matan Baraka606b0f2016-02-29 18:05:28 +0200946 mr->mmkey.iova = virt_addr;
947 mr->mmkey.size = len;
948 mr->mmkey.pd = to_mpd(pd)->pdn;
Haggai Eranb4755982014-05-22 14:50:10 +0300949
Haggai Eranb4cfe442014-12-11 17:04:26 +0200950 mr->live = 1;
951
Haggai Eran096f7e72014-05-22 14:50:08 +0300952unmap_dma:
953 up(&umrc->sem);
Haggai Eran21af2c32014-12-11 17:04:10 +0200954 dma_unmap_single(ddev, dma, size, DMA_TO_DEVICE);
Haggai Eran096f7e72014-05-22 14:50:08 +0300955
Haggai Eran21af2c32014-12-11 17:04:10 +0200956 kfree(mr_pas);
Haggai Eran096f7e72014-05-22 14:50:08 +0300957
958free_mr:
959 if (err) {
960 free_cached_mr(dev, mr);
961 return ERR_PTR(err);
Eli Cohene126ba92013-07-07 17:25:49 +0300962 }
963
964 return mr;
Eli Cohene126ba92013-07-07 17:25:49 +0300965}
966
Haggai Eran832a6b02014-12-11 17:04:22 +0200967#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
968int mlx5_ib_update_mtt(struct mlx5_ib_mr *mr, u64 start_page_index, int npages,
969 int zap)
970{
971 struct mlx5_ib_dev *dev = mr->dev;
972 struct device *ddev = dev->ib_dev.dma_device;
973 struct umr_common *umrc = &dev->umrc;
974 struct mlx5_ib_umr_context umr_context;
975 struct ib_umem *umem = mr->umem;
976 int size;
977 __be64 *pas;
978 dma_addr_t dma;
Christoph Hellwige622f2f2015-10-08 09:16:33 +0100979 struct ib_send_wr *bad;
980 struct mlx5_umr_wr wr;
Haggai Eran832a6b02014-12-11 17:04:22 +0200981 struct ib_sge sg;
982 int err = 0;
983 const int page_index_alignment = MLX5_UMR_MTT_ALIGNMENT / sizeof(u64);
984 const int page_index_mask = page_index_alignment - 1;
985 size_t pages_mapped = 0;
986 size_t pages_to_map = 0;
987 size_t pages_iter = 0;
988 int use_emergency_buf = 0;
989
990 /* UMR copies MTTs in units of MLX5_UMR_MTT_ALIGNMENT bytes,
991 * so we need to align the offset and length accordingly */
992 if (start_page_index & page_index_mask) {
993 npages += start_page_index & page_index_mask;
994 start_page_index &= ~page_index_mask;
995 }
996
997 pages_to_map = ALIGN(npages, page_index_alignment);
998
999 if (start_page_index + pages_to_map > MLX5_MAX_UMR_PAGES)
1000 return -EINVAL;
1001
1002 size = sizeof(u64) * pages_to_map;
1003 size = min_t(int, PAGE_SIZE, size);
1004 /* We allocate with GFP_ATOMIC to avoid recursion into page-reclaim
1005 * code, when we are called from an invalidation. The pas buffer must
1006 * be 2k-aligned for Connect-IB. */
1007 pas = (__be64 *)get_zeroed_page(GFP_ATOMIC);
1008 if (!pas) {
1009 mlx5_ib_warn(dev, "unable to allocate memory during MTT update, falling back to slower chunked mechanism.\n");
1010 pas = mlx5_ib_update_mtt_emergency_buffer;
1011 size = MLX5_UMR_MTT_MIN_CHUNK_SIZE;
1012 use_emergency_buf = 1;
1013 mutex_lock(&mlx5_ib_update_mtt_emergency_buffer_mutex);
1014 memset(pas, 0, size);
1015 }
1016 pages_iter = size / sizeof(u64);
1017 dma = dma_map_single(ddev, pas, size, DMA_TO_DEVICE);
1018 if (dma_mapping_error(ddev, dma)) {
1019 mlx5_ib_err(dev, "unable to map DMA during MTT update.\n");
1020 err = -ENOMEM;
1021 goto free_pas;
1022 }
1023
1024 for (pages_mapped = 0;
1025 pages_mapped < pages_to_map && !err;
1026 pages_mapped += pages_iter, start_page_index += pages_iter) {
1027 dma_sync_single_for_cpu(ddev, dma, size, DMA_TO_DEVICE);
1028
1029 npages = min_t(size_t,
1030 pages_iter,
1031 ib_umem_num_pages(umem) - start_page_index);
1032
1033 if (!zap) {
1034 __mlx5_ib_populate_pas(dev, umem, PAGE_SHIFT,
1035 start_page_index, npages, pas,
1036 MLX5_IB_MTT_PRESENT);
1037 /* Clear padding after the pages brought from the
1038 * umem. */
1039 memset(pas + npages, 0, size - npages * sizeof(u64));
1040 }
1041
1042 dma_sync_single_for_device(ddev, dma, size, DMA_TO_DEVICE);
1043
Christoph Hellwigadd08d72016-03-03 09:38:22 +01001044 mlx5_ib_init_umr_context(&umr_context);
1045
Haggai Eran832a6b02014-12-11 17:04:22 +02001046 memset(&wr, 0, sizeof(wr));
Christoph Hellwigadd08d72016-03-03 09:38:22 +01001047 wr.wr.wr_cqe = &umr_context.cqe;
Haggai Eran832a6b02014-12-11 17:04:22 +02001048
1049 sg.addr = dma;
1050 sg.length = ALIGN(npages * sizeof(u64),
1051 MLX5_UMR_MTT_ALIGNMENT);
Jason Gunthorpeb37c7882015-07-30 17:22:19 -06001052 sg.lkey = dev->umrc.pd->local_dma_lkey;
Haggai Eran832a6b02014-12-11 17:04:22 +02001053
Christoph Hellwige622f2f2015-10-08 09:16:33 +01001054 wr.wr.send_flags = MLX5_IB_SEND_UMR_FAIL_IF_FREE |
Haggai Eran832a6b02014-12-11 17:04:22 +02001055 MLX5_IB_SEND_UMR_UPDATE_MTT;
Christoph Hellwige622f2f2015-10-08 09:16:33 +01001056 wr.wr.sg_list = &sg;
1057 wr.wr.num_sge = 1;
1058 wr.wr.opcode = MLX5_IB_WR_UMR;
1059 wr.npages = sg.length / sizeof(u64);
1060 wr.page_shift = PAGE_SHIFT;
Matan Baraka606b0f2016-02-29 18:05:28 +02001061 wr.mkey = mr->mmkey.key;
Christoph Hellwige622f2f2015-10-08 09:16:33 +01001062 wr.target.offset = start_page_index;
Haggai Eran832a6b02014-12-11 17:04:22 +02001063
Haggai Eran832a6b02014-12-11 17:04:22 +02001064 down(&umrc->sem);
Christoph Hellwige622f2f2015-10-08 09:16:33 +01001065 err = ib_post_send(umrc->qp, &wr.wr, &bad);
Haggai Eran832a6b02014-12-11 17:04:22 +02001066 if (err) {
1067 mlx5_ib_err(dev, "UMR post send failed, err %d\n", err);
1068 } else {
1069 wait_for_completion(&umr_context.done);
1070 if (umr_context.status != IB_WC_SUCCESS) {
1071 mlx5_ib_err(dev, "UMR completion failed, code %d\n",
1072 umr_context.status);
1073 err = -EFAULT;
1074 }
1075 }
1076 up(&umrc->sem);
1077 }
1078 dma_unmap_single(ddev, dma, size, DMA_TO_DEVICE);
1079
1080free_pas:
1081 if (!use_emergency_buf)
1082 free_page((unsigned long)pas);
1083 else
1084 mutex_unlock(&mlx5_ib_update_mtt_emergency_buffer_mutex);
1085
1086 return err;
1087}
1088#endif
1089
Noa Osherovich395a8e42016-02-29 16:46:50 +02001090/*
1091 * If ibmr is NULL it will be allocated by reg_create.
1092 * Else, the given ibmr will be used.
1093 */
1094static struct mlx5_ib_mr *reg_create(struct ib_mr *ibmr, struct ib_pd *pd,
1095 u64 virt_addr, u64 length,
1096 struct ib_umem *umem, int npages,
1097 int page_shift, int access_flags)
Eli Cohene126ba92013-07-07 17:25:49 +03001098{
1099 struct mlx5_ib_dev *dev = to_mdev(pd->device);
Eli Cohene126ba92013-07-07 17:25:49 +03001100 struct mlx5_ib_mr *mr;
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001101 __be64 *pas;
1102 void *mkc;
Eli Cohene126ba92013-07-07 17:25:49 +03001103 int inlen;
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001104 u32 *in;
Eli Cohene126ba92013-07-07 17:25:49 +03001105 int err;
Saeed Mahameed938fe832015-05-28 22:28:41 +03001106 bool pg_cap = !!(MLX5_CAP_GEN(dev->mdev, pg));
Eli Cohene126ba92013-07-07 17:25:49 +03001107
Noa Osherovich395a8e42016-02-29 16:46:50 +02001108 mr = ibmr ? to_mmr(ibmr) : kzalloc(sizeof(*mr), GFP_KERNEL);
Eli Cohene126ba92013-07-07 17:25:49 +03001109 if (!mr)
1110 return ERR_PTR(-ENOMEM);
1111
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001112 inlen = MLX5_ST_SZ_BYTES(create_mkey_in) +
1113 sizeof(*pas) * ((npages + 1) / 2) * 2;
Eli Cohene126ba92013-07-07 17:25:49 +03001114 in = mlx5_vzalloc(inlen);
1115 if (!in) {
1116 err = -ENOMEM;
1117 goto err_1;
1118 }
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001119 pas = (__be64 *)MLX5_ADDR_OF(create_mkey_in, in, klm_pas_mtt);
1120 mlx5_ib_populate_pas(dev, umem, page_shift, pas,
Haggai Erancc149f752014-12-11 17:04:21 +02001121 pg_cap ? MLX5_IB_MTT_PRESENT : 0);
Eli Cohene126ba92013-07-07 17:25:49 +03001122
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001123 /* The pg_access bit allows setting the access flags
Haggai Erancc149f752014-12-11 17:04:21 +02001124 * in the page list submitted with the command. */
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001125 MLX5_SET(create_mkey_in, in, pg_access, !!(pg_cap));
1126
1127 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1128 MLX5_SET(mkc, mkc, access_mode, MLX5_MKC_ACCESS_MODE_MTT);
1129 MLX5_SET(mkc, mkc, a, !!(access_flags & IB_ACCESS_REMOTE_ATOMIC));
1130 MLX5_SET(mkc, mkc, rw, !!(access_flags & IB_ACCESS_REMOTE_WRITE));
1131 MLX5_SET(mkc, mkc, rr, !!(access_flags & IB_ACCESS_REMOTE_READ));
1132 MLX5_SET(mkc, mkc, lw, !!(access_flags & IB_ACCESS_LOCAL_WRITE));
1133 MLX5_SET(mkc, mkc, lr, 1);
1134
1135 MLX5_SET64(mkc, mkc, start_addr, virt_addr);
1136 MLX5_SET64(mkc, mkc, len, length);
1137 MLX5_SET(mkc, mkc, pd, to_mpd(pd)->pdn);
1138 MLX5_SET(mkc, mkc, bsf_octword_size, 0);
1139 MLX5_SET(mkc, mkc, translations_octword_size,
1140 get_octo_len(virt_addr, length, 1 << page_shift));
1141 MLX5_SET(mkc, mkc, log_page_size, page_shift);
1142 MLX5_SET(mkc, mkc, qpn, 0xffffff);
1143 MLX5_SET(create_mkey_in, in, translations_octword_actual_size,
1144 get_octo_len(virt_addr, length, 1 << page_shift));
1145
1146 err = mlx5_core_create_mkey(dev->mdev, &mr->mmkey, in, inlen);
Eli Cohene126ba92013-07-07 17:25:49 +03001147 if (err) {
1148 mlx5_ib_warn(dev, "create mkey failed\n");
1149 goto err_2;
1150 }
1151 mr->umem = umem;
Majd Dibbiny7eae20d2015-01-06 13:56:01 +02001152 mr->dev = dev;
Haggai Eranb4cfe442014-12-11 17:04:26 +02001153 mr->live = 1;
Al Viro479163f2014-11-20 08:13:57 +00001154 kvfree(in);
Eli Cohene126ba92013-07-07 17:25:49 +03001155
Matan Baraka606b0f2016-02-29 18:05:28 +02001156 mlx5_ib_dbg(dev, "mkey = 0x%x\n", mr->mmkey.key);
Eli Cohene126ba92013-07-07 17:25:49 +03001157
1158 return mr;
1159
1160err_2:
Al Viro479163f2014-11-20 08:13:57 +00001161 kvfree(in);
Eli Cohene126ba92013-07-07 17:25:49 +03001162
1163err_1:
Noa Osherovich395a8e42016-02-29 16:46:50 +02001164 if (!ibmr)
1165 kfree(mr);
Eli Cohene126ba92013-07-07 17:25:49 +03001166
1167 return ERR_PTR(err);
1168}
1169
Noa Osherovich395a8e42016-02-29 16:46:50 +02001170static void set_mr_fileds(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr,
1171 int npages, u64 length, int access_flags)
1172{
1173 mr->npages = npages;
1174 atomic_add(npages, &dev->mdev->priv.reg_pages);
Matan Baraka606b0f2016-02-29 18:05:28 +02001175 mr->ibmr.lkey = mr->mmkey.key;
1176 mr->ibmr.rkey = mr->mmkey.key;
Noa Osherovich395a8e42016-02-29 16:46:50 +02001177 mr->ibmr.length = length;
Noa Osherovich56e11d62016-02-29 16:46:51 +02001178 mr->access_flags = access_flags;
Noa Osherovich395a8e42016-02-29 16:46:50 +02001179}
1180
Eli Cohene126ba92013-07-07 17:25:49 +03001181struct ib_mr *mlx5_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
1182 u64 virt_addr, int access_flags,
1183 struct ib_udata *udata)
1184{
1185 struct mlx5_ib_dev *dev = to_mdev(pd->device);
1186 struct mlx5_ib_mr *mr = NULL;
1187 struct ib_umem *umem;
1188 int page_shift;
1189 int npages;
1190 int ncont;
1191 int order;
1192 int err;
1193
Eli Cohen900a6d72014-09-14 16:47:51 +03001194 mlx5_ib_dbg(dev, "start 0x%llx, virt_addr 0x%llx, length 0x%llx, access_flags 0x%x\n",
1195 start, virt_addr, length, access_flags);
Noa Osherovich395a8e42016-02-29 16:46:50 +02001196 umem = mr_umem_get(pd, start, length, access_flags, &npages,
1197 &page_shift, &ncont, &order);
1198
1199 if (IS_ERR(umem))
Eli Cohene126ba92013-07-07 17:25:49 +03001200 return (void *)umem;
Eli Cohene126ba92013-07-07 17:25:49 +03001201
1202 if (use_umr(order)) {
1203 mr = reg_umr(pd, umem, virt_addr, length, ncont, page_shift,
1204 order, access_flags);
1205 if (PTR_ERR(mr) == -EAGAIN) {
1206 mlx5_ib_dbg(dev, "cache empty for order %d", order);
1207 mr = NULL;
1208 }
Haggai Eran6aec21f2014-12-11 17:04:23 +02001209 } else if (access_flags & IB_ACCESS_ON_DEMAND) {
1210 err = -EINVAL;
1211 pr_err("Got MR registration for ODP MR > 512MB, not supported for Connect-IB");
1212 goto error;
Eli Cohene126ba92013-07-07 17:25:49 +03001213 }
1214
1215 if (!mr)
Noa Osherovich395a8e42016-02-29 16:46:50 +02001216 mr = reg_create(NULL, pd, virt_addr, length, umem, ncont,
1217 page_shift, access_flags);
Eli Cohene126ba92013-07-07 17:25:49 +03001218
1219 if (IS_ERR(mr)) {
1220 err = PTR_ERR(mr);
1221 goto error;
1222 }
1223
Matan Baraka606b0f2016-02-29 18:05:28 +02001224 mlx5_ib_dbg(dev, "mkey 0x%x\n", mr->mmkey.key);
Eli Cohene126ba92013-07-07 17:25:49 +03001225
1226 mr->umem = umem;
Noa Osherovich395a8e42016-02-29 16:46:50 +02001227 set_mr_fileds(dev, mr, npages, length, access_flags);
Eli Cohene126ba92013-07-07 17:25:49 +03001228
Haggai Eranb4cfe442014-12-11 17:04:26 +02001229#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
Noa Osherovich395a8e42016-02-29 16:46:50 +02001230 update_odp_mr(mr);
Haggai Eranb4cfe442014-12-11 17:04:26 +02001231#endif
1232
Eli Cohene126ba92013-07-07 17:25:49 +03001233 return &mr->ibmr;
1234
1235error:
1236 ib_umem_release(umem);
1237 return ERR_PTR(err);
1238}
1239
1240static int unreg_umr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)
1241{
Maor Gottlieb89ea94a72016-06-17 15:01:38 +03001242 struct mlx5_core_dev *mdev = dev->mdev;
Eli Cohene126ba92013-07-07 17:25:49 +03001243 struct umr_common *umrc = &dev->umrc;
Shachar Raindela74d2412014-05-22 14:50:12 +03001244 struct mlx5_ib_umr_context umr_context;
Doug Ledford0025b0b2016-03-03 11:23:37 -05001245 struct mlx5_umr_wr umrwr = {};
Christoph Hellwige622f2f2015-10-08 09:16:33 +01001246 struct ib_send_wr *bad;
Eli Cohene126ba92013-07-07 17:25:49 +03001247 int err;
1248
Maor Gottlieb89ea94a72016-06-17 15:01:38 +03001249 if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR)
1250 return 0;
1251
Christoph Hellwigadd08d72016-03-03 09:38:22 +01001252 mlx5_ib_init_umr_context(&umr_context);
1253
Christoph Hellwigadd08d72016-03-03 09:38:22 +01001254 umrwr.wr.wr_cqe = &umr_context.cqe;
Matan Baraka606b0f2016-02-29 18:05:28 +02001255 prep_umr_unreg_wqe(dev, &umrwr.wr, mr->mmkey.key);
Eli Cohene126ba92013-07-07 17:25:49 +03001256
1257 down(&umrc->sem);
Christoph Hellwige622f2f2015-10-08 09:16:33 +01001258 err = ib_post_send(umrc->qp, &umrwr.wr, &bad);
Eli Cohene126ba92013-07-07 17:25:49 +03001259 if (err) {
1260 up(&umrc->sem);
1261 mlx5_ib_dbg(dev, "err %d\n", err);
1262 goto error;
Shachar Raindela74d2412014-05-22 14:50:12 +03001263 } else {
1264 wait_for_completion(&umr_context.done);
1265 up(&umrc->sem);
Eli Cohene126ba92013-07-07 17:25:49 +03001266 }
Shachar Raindela74d2412014-05-22 14:50:12 +03001267 if (umr_context.status != IB_WC_SUCCESS) {
Eli Cohene126ba92013-07-07 17:25:49 +03001268 mlx5_ib_warn(dev, "unreg umr failed\n");
1269 err = -EFAULT;
1270 goto error;
1271 }
1272 return 0;
1273
1274error:
1275 return err;
1276}
1277
Noa Osherovich56e11d62016-02-29 16:46:51 +02001278static int rereg_umr(struct ib_pd *pd, struct mlx5_ib_mr *mr, u64 virt_addr,
1279 u64 length, int npages, int page_shift, int order,
1280 int access_flags, int flags)
1281{
1282 struct mlx5_ib_dev *dev = to_mdev(pd->device);
1283 struct device *ddev = dev->ib_dev.dma_device;
1284 struct mlx5_ib_umr_context umr_context;
1285 struct ib_send_wr *bad;
1286 struct mlx5_umr_wr umrwr = {};
1287 struct ib_sge sg;
1288 struct umr_common *umrc = &dev->umrc;
1289 dma_addr_t dma = 0;
1290 __be64 *mr_pas = NULL;
1291 int size;
1292 int err;
1293
Christoph Hellwigadd08d72016-03-03 09:38:22 +01001294 mlx5_ib_init_umr_context(&umr_context);
1295
1296 umrwr.wr.wr_cqe = &umr_context.cqe;
Noa Osherovich56e11d62016-02-29 16:46:51 +02001297 umrwr.wr.send_flags = MLX5_IB_SEND_UMR_FAIL_IF_FREE;
1298
1299 if (flags & IB_MR_REREG_TRANS) {
1300 err = dma_map_mr_pas(dev, mr->umem, npages, page_shift, &size,
1301 &mr_pas, &dma);
1302 if (err)
1303 return err;
1304
1305 umrwr.target.virt_addr = virt_addr;
1306 umrwr.length = length;
1307 umrwr.wr.send_flags |= MLX5_IB_SEND_UMR_UPDATE_TRANSLATION;
1308 }
1309
Matan Baraka606b0f2016-02-29 18:05:28 +02001310 prep_umr_wqe_common(pd, &umrwr.wr, &sg, dma, npages, mr->mmkey.key,
Noa Osherovich56e11d62016-02-29 16:46:51 +02001311 page_shift);
1312
1313 if (flags & IB_MR_REREG_PD) {
1314 umrwr.pd = pd;
1315 umrwr.wr.send_flags |= MLX5_IB_SEND_UMR_UPDATE_PD;
1316 }
1317
1318 if (flags & IB_MR_REREG_ACCESS) {
1319 umrwr.access_flags = access_flags;
1320 umrwr.wr.send_flags |= MLX5_IB_SEND_UMR_UPDATE_ACCESS;
1321 }
1322
Noa Osherovich56e11d62016-02-29 16:46:51 +02001323 /* post send request to UMR QP */
1324 down(&umrc->sem);
1325 err = ib_post_send(umrc->qp, &umrwr.wr, &bad);
1326
1327 if (err) {
1328 mlx5_ib_warn(dev, "post send failed, err %d\n", err);
1329 } else {
1330 wait_for_completion(&umr_context.done);
1331 if (umr_context.status != IB_WC_SUCCESS) {
1332 mlx5_ib_warn(dev, "reg umr failed (%u)\n",
1333 umr_context.status);
1334 err = -EFAULT;
1335 }
1336 }
1337
1338 up(&umrc->sem);
1339 if (flags & IB_MR_REREG_TRANS) {
1340 dma_unmap_single(ddev, dma, size, DMA_TO_DEVICE);
1341 kfree(mr_pas);
1342 }
1343 return err;
1344}
1345
1346int mlx5_ib_rereg_user_mr(struct ib_mr *ib_mr, int flags, u64 start,
1347 u64 length, u64 virt_addr, int new_access_flags,
1348 struct ib_pd *new_pd, struct ib_udata *udata)
1349{
1350 struct mlx5_ib_dev *dev = to_mdev(ib_mr->device);
1351 struct mlx5_ib_mr *mr = to_mmr(ib_mr);
1352 struct ib_pd *pd = (flags & IB_MR_REREG_PD) ? new_pd : ib_mr->pd;
1353 int access_flags = flags & IB_MR_REREG_ACCESS ?
1354 new_access_flags :
1355 mr->access_flags;
1356 u64 addr = (flags & IB_MR_REREG_TRANS) ? virt_addr : mr->umem->address;
1357 u64 len = (flags & IB_MR_REREG_TRANS) ? length : mr->umem->length;
1358 int page_shift = 0;
1359 int npages = 0;
1360 int ncont = 0;
1361 int order = 0;
1362 int err;
1363
1364 mlx5_ib_dbg(dev, "start 0x%llx, virt_addr 0x%llx, length 0x%llx, access_flags 0x%x\n",
1365 start, virt_addr, length, access_flags);
1366
1367 if (flags != IB_MR_REREG_PD) {
1368 /*
1369 * Replace umem. This needs to be done whether or not UMR is
1370 * used.
1371 */
1372 flags |= IB_MR_REREG_TRANS;
1373 ib_umem_release(mr->umem);
1374 mr->umem = mr_umem_get(pd, addr, len, access_flags, &npages,
1375 &page_shift, &ncont, &order);
1376 if (IS_ERR(mr->umem)) {
1377 err = PTR_ERR(mr->umem);
1378 mr->umem = NULL;
1379 return err;
1380 }
1381 }
1382
1383 if (flags & IB_MR_REREG_TRANS && !use_umr_mtt_update(mr, addr, len)) {
1384 /*
1385 * UMR can't be used - MKey needs to be replaced.
1386 */
1387 if (mr->umred) {
1388 err = unreg_umr(dev, mr);
1389 if (err)
1390 mlx5_ib_warn(dev, "Failed to unregister MR\n");
1391 } else {
1392 err = destroy_mkey(dev, mr);
1393 if (err)
1394 mlx5_ib_warn(dev, "Failed to destroy MKey\n");
1395 }
1396 if (err)
1397 return err;
1398
1399 mr = reg_create(ib_mr, pd, addr, len, mr->umem, ncont,
1400 page_shift, access_flags);
1401
1402 if (IS_ERR(mr))
1403 return PTR_ERR(mr);
1404
1405 mr->umred = 0;
1406 } else {
1407 /*
1408 * Send a UMR WQE
1409 */
1410 err = rereg_umr(pd, mr, addr, len, npages, page_shift,
1411 order, access_flags, flags);
1412 if (err) {
1413 mlx5_ib_warn(dev, "Failed to rereg UMR\n");
1414 return err;
1415 }
1416 }
1417
1418 if (flags & IB_MR_REREG_PD) {
1419 ib_mr->pd = pd;
Matan Baraka606b0f2016-02-29 18:05:28 +02001420 mr->mmkey.pd = to_mpd(pd)->pdn;
Noa Osherovich56e11d62016-02-29 16:46:51 +02001421 }
1422
1423 if (flags & IB_MR_REREG_ACCESS)
1424 mr->access_flags = access_flags;
1425
1426 if (flags & IB_MR_REREG_TRANS) {
1427 atomic_sub(mr->npages, &dev->mdev->priv.reg_pages);
1428 set_mr_fileds(dev, mr, npages, len, access_flags);
Matan Baraka606b0f2016-02-29 18:05:28 +02001429 mr->mmkey.iova = addr;
1430 mr->mmkey.size = len;
Noa Osherovich56e11d62016-02-29 16:46:51 +02001431 }
1432#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
1433 update_odp_mr(mr);
1434#endif
1435
1436 return 0;
1437}
1438
Sagi Grimberg8a187ee2015-10-13 19:11:26 +03001439static int
1440mlx5_alloc_priv_descs(struct ib_device *device,
1441 struct mlx5_ib_mr *mr,
1442 int ndescs,
1443 int desc_size)
1444{
1445 int size = ndescs * desc_size;
1446 int add_size;
1447 int ret;
1448
1449 add_size = max_t(int, MLX5_UMR_ALIGN - ARCH_KMALLOC_MINALIGN, 0);
1450
1451 mr->descs_alloc = kzalloc(size + add_size, GFP_KERNEL);
1452 if (!mr->descs_alloc)
1453 return -ENOMEM;
1454
1455 mr->descs = PTR_ALIGN(mr->descs_alloc, MLX5_UMR_ALIGN);
1456
1457 mr->desc_map = dma_map_single(device->dma_device, mr->descs,
1458 size, DMA_TO_DEVICE);
1459 if (dma_mapping_error(device->dma_device, mr->desc_map)) {
1460 ret = -ENOMEM;
1461 goto err;
1462 }
1463
1464 return 0;
1465err:
1466 kfree(mr->descs_alloc);
1467
1468 return ret;
1469}
1470
1471static void
1472mlx5_free_priv_descs(struct mlx5_ib_mr *mr)
1473{
1474 if (mr->descs) {
1475 struct ib_device *device = mr->ibmr.device;
1476 int size = mr->max_descs * mr->desc_size;
1477
1478 dma_unmap_single(device->dma_device, mr->desc_map,
1479 size, DMA_TO_DEVICE);
1480 kfree(mr->descs_alloc);
1481 mr->descs = NULL;
1482 }
1483}
1484
Haggai Eran6aec21f2014-12-11 17:04:23 +02001485static int clean_mr(struct mlx5_ib_mr *mr)
Eli Cohene126ba92013-07-07 17:25:49 +03001486{
Haggai Eran6aec21f2014-12-11 17:04:23 +02001487 struct mlx5_ib_dev *dev = to_mdev(mr->ibmr.device);
Eli Cohene126ba92013-07-07 17:25:49 +03001488 int umred = mr->umred;
1489 int err;
1490
Sagi Grimberg8b91ffc2015-07-30 10:32:34 +03001491 if (mr->sig) {
1492 if (mlx5_core_destroy_psv(dev->mdev,
1493 mr->sig->psv_memory.psv_idx))
1494 mlx5_ib_warn(dev, "failed to destroy mem psv %d\n",
1495 mr->sig->psv_memory.psv_idx);
1496 if (mlx5_core_destroy_psv(dev->mdev,
1497 mr->sig->psv_wire.psv_idx))
1498 mlx5_ib_warn(dev, "failed to destroy wire psv %d\n",
1499 mr->sig->psv_wire.psv_idx);
1500 kfree(mr->sig);
1501 mr->sig = NULL;
1502 }
1503
Sagi Grimberg8a187ee2015-10-13 19:11:26 +03001504 mlx5_free_priv_descs(mr);
1505
Eli Cohene126ba92013-07-07 17:25:49 +03001506 if (!umred) {
Haggai Eranb4cfe442014-12-11 17:04:26 +02001507 err = destroy_mkey(dev, mr);
Eli Cohene126ba92013-07-07 17:25:49 +03001508 if (err) {
1509 mlx5_ib_warn(dev, "failed to destroy mkey 0x%x (%d)\n",
Matan Baraka606b0f2016-02-29 18:05:28 +02001510 mr->mmkey.key, err);
Eli Cohene126ba92013-07-07 17:25:49 +03001511 return err;
1512 }
1513 } else {
1514 err = unreg_umr(dev, mr);
1515 if (err) {
1516 mlx5_ib_warn(dev, "failed unregister\n");
1517 return err;
1518 }
1519 free_cached_mr(dev, mr);
1520 }
1521
Eli Cohene126ba92013-07-07 17:25:49 +03001522 if (!umred)
1523 kfree(mr);
1524
1525 return 0;
1526}
1527
Haggai Eran6aec21f2014-12-11 17:04:23 +02001528int mlx5_ib_dereg_mr(struct ib_mr *ibmr)
1529{
1530 struct mlx5_ib_dev *dev = to_mdev(ibmr->device);
1531 struct mlx5_ib_mr *mr = to_mmr(ibmr);
1532 int npages = mr->npages;
1533 struct ib_umem *umem = mr->umem;
1534
1535#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
Haggai Eranb4cfe442014-12-11 17:04:26 +02001536 if (umem && umem->odp_data) {
1537 /* Prevent new page faults from succeeding */
1538 mr->live = 0;
Haggai Eran6aec21f2014-12-11 17:04:23 +02001539 /* Wait for all running page-fault handlers to finish. */
1540 synchronize_srcu(&dev->mr_srcu);
Haggai Eranb4cfe442014-12-11 17:04:26 +02001541 /* Destroy all page mappings */
1542 mlx5_ib_invalidate_range(umem, ib_umem_start(umem),
1543 ib_umem_end(umem));
1544 /*
1545 * We kill the umem before the MR for ODP,
1546 * so that there will not be any invalidations in
1547 * flight, looking at the *mr struct.
1548 */
1549 ib_umem_release(umem);
1550 atomic_sub(npages, &dev->mdev->priv.reg_pages);
1551
1552 /* Avoid double-freeing the umem. */
1553 umem = NULL;
1554 }
Haggai Eran6aec21f2014-12-11 17:04:23 +02001555#endif
1556
1557 clean_mr(mr);
1558
1559 if (umem) {
1560 ib_umem_release(umem);
1561 atomic_sub(npages, &dev->mdev->priv.reg_pages);
1562 }
1563
1564 return 0;
1565}
1566
Sagi Grimberg9bee1782015-07-30 10:32:35 +03001567struct ib_mr *mlx5_ib_alloc_mr(struct ib_pd *pd,
1568 enum ib_mr_type mr_type,
1569 u32 max_num_sg)
Sagi Grimberg3121e3c2014-02-23 14:19:06 +02001570{
1571 struct mlx5_ib_dev *dev = to_mdev(pd->device);
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001572 int inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
Sagi Grimbergb005d312016-02-29 19:07:33 +02001573 int ndescs = ALIGN(max_num_sg, 4);
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001574 struct mlx5_ib_mr *mr;
1575 void *mkc;
1576 u32 *in;
Sagi Grimbergb005d312016-02-29 19:07:33 +02001577 int err;
Sagi Grimberg3121e3c2014-02-23 14:19:06 +02001578
1579 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
1580 if (!mr)
1581 return ERR_PTR(-ENOMEM);
1582
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001583 in = kzalloc(inlen, GFP_KERNEL);
Sagi Grimberg3121e3c2014-02-23 14:19:06 +02001584 if (!in) {
1585 err = -ENOMEM;
1586 goto err_free;
1587 }
1588
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001589 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1590 MLX5_SET(mkc, mkc, free, 1);
1591 MLX5_SET(mkc, mkc, translations_octword_size, ndescs);
1592 MLX5_SET(mkc, mkc, qpn, 0xffffff);
1593 MLX5_SET(mkc, mkc, pd, to_mpd(pd)->pdn);
Sagi Grimberg3121e3c2014-02-23 14:19:06 +02001594
Sagi Grimberg9bee1782015-07-30 10:32:35 +03001595 if (mr_type == IB_MR_TYPE_MEM_REG) {
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001596 mr->access_mode = MLX5_MKC_ACCESS_MODE_MTT;
1597 MLX5_SET(mkc, mkc, log_page_size, PAGE_SHIFT);
Sagi Grimberg8a187ee2015-10-13 19:11:26 +03001598 err = mlx5_alloc_priv_descs(pd->device, mr,
1599 ndescs, sizeof(u64));
1600 if (err)
1601 goto err_free_in;
1602
1603 mr->desc_size = sizeof(u64);
1604 mr->max_descs = ndescs;
Sagi Grimbergb005d312016-02-29 19:07:33 +02001605 } else if (mr_type == IB_MR_TYPE_SG_GAPS) {
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001606 mr->access_mode = MLX5_MKC_ACCESS_MODE_KLMS;
Sagi Grimbergb005d312016-02-29 19:07:33 +02001607
1608 err = mlx5_alloc_priv_descs(pd->device, mr,
1609 ndescs, sizeof(struct mlx5_klm));
1610 if (err)
1611 goto err_free_in;
1612 mr->desc_size = sizeof(struct mlx5_klm);
1613 mr->max_descs = ndescs;
Sagi Grimberg9bee1782015-07-30 10:32:35 +03001614 } else if (mr_type == IB_MR_TYPE_SIGNATURE) {
Sagi Grimberg3121e3c2014-02-23 14:19:06 +02001615 u32 psv_index[2];
1616
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001617 MLX5_SET(mkc, mkc, bsf_en, 1);
1618 MLX5_SET(mkc, mkc, bsf_octword_size, MLX5_MKEY_BSF_OCTO_SIZE);
Sagi Grimberg3121e3c2014-02-23 14:19:06 +02001619 mr->sig = kzalloc(sizeof(*mr->sig), GFP_KERNEL);
1620 if (!mr->sig) {
1621 err = -ENOMEM;
1622 goto err_free_in;
1623 }
1624
1625 /* create mem & wire PSVs */
Jack Morgenstein9603b612014-07-28 23:30:22 +03001626 err = mlx5_core_create_psv(dev->mdev, to_mpd(pd)->pdn,
Sagi Grimberg3121e3c2014-02-23 14:19:06 +02001627 2, psv_index);
1628 if (err)
1629 goto err_free_sig;
1630
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001631 mr->access_mode = MLX5_MKC_ACCESS_MODE_KLMS;
Sagi Grimberg3121e3c2014-02-23 14:19:06 +02001632 mr->sig->psv_memory.psv_idx = psv_index[0];
1633 mr->sig->psv_wire.psv_idx = psv_index[1];
Sagi Grimbergd5436ba2014-02-23 14:19:12 +02001634
1635 mr->sig->sig_status_checked = true;
1636 mr->sig->sig_err_exists = false;
1637 /* Next UMR, Arm SIGERR */
1638 ++mr->sig->sigerr_count;
Sagi Grimberg9bee1782015-07-30 10:32:35 +03001639 } else {
1640 mlx5_ib_warn(dev, "Invalid mr type %d\n", mr_type);
1641 err = -EINVAL;
1642 goto err_free_in;
Sagi Grimberg3121e3c2014-02-23 14:19:06 +02001643 }
1644
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001645 MLX5_SET(mkc, mkc, access_mode, mr->access_mode);
1646 MLX5_SET(mkc, mkc, umr_en, 1);
1647
1648 err = mlx5_core_create_mkey(dev->mdev, &mr->mmkey, in, inlen);
Sagi Grimberg3121e3c2014-02-23 14:19:06 +02001649 if (err)
1650 goto err_destroy_psv;
1651
Matan Baraka606b0f2016-02-29 18:05:28 +02001652 mr->ibmr.lkey = mr->mmkey.key;
1653 mr->ibmr.rkey = mr->mmkey.key;
Sagi Grimberg3121e3c2014-02-23 14:19:06 +02001654 mr->umem = NULL;
1655 kfree(in);
1656
1657 return &mr->ibmr;
1658
1659err_destroy_psv:
1660 if (mr->sig) {
Jack Morgenstein9603b612014-07-28 23:30:22 +03001661 if (mlx5_core_destroy_psv(dev->mdev,
Sagi Grimberg3121e3c2014-02-23 14:19:06 +02001662 mr->sig->psv_memory.psv_idx))
1663 mlx5_ib_warn(dev, "failed to destroy mem psv %d\n",
1664 mr->sig->psv_memory.psv_idx);
Jack Morgenstein9603b612014-07-28 23:30:22 +03001665 if (mlx5_core_destroy_psv(dev->mdev,
Sagi Grimberg3121e3c2014-02-23 14:19:06 +02001666 mr->sig->psv_wire.psv_idx))
1667 mlx5_ib_warn(dev, "failed to destroy wire psv %d\n",
1668 mr->sig->psv_wire.psv_idx);
1669 }
Sagi Grimberg8a187ee2015-10-13 19:11:26 +03001670 mlx5_free_priv_descs(mr);
Sagi Grimberg3121e3c2014-02-23 14:19:06 +02001671err_free_sig:
1672 kfree(mr->sig);
1673err_free_in:
1674 kfree(in);
1675err_free:
1676 kfree(mr);
1677 return ERR_PTR(err);
1678}
1679
Matan Barakd2370e02016-02-29 18:05:30 +02001680struct ib_mw *mlx5_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type,
1681 struct ib_udata *udata)
1682{
1683 struct mlx5_ib_dev *dev = to_mdev(pd->device);
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001684 int inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
Matan Barakd2370e02016-02-29 18:05:30 +02001685 struct mlx5_ib_mw *mw = NULL;
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001686 u32 *in = NULL;
1687 void *mkc;
Matan Barakd2370e02016-02-29 18:05:30 +02001688 int ndescs;
1689 int err;
1690 struct mlx5_ib_alloc_mw req = {};
1691 struct {
1692 __u32 comp_mask;
1693 __u32 response_length;
1694 } resp = {};
1695
1696 err = ib_copy_from_udata(&req, udata, min(udata->inlen, sizeof(req)));
1697 if (err)
1698 return ERR_PTR(err);
1699
1700 if (req.comp_mask || req.reserved1 || req.reserved2)
1701 return ERR_PTR(-EOPNOTSUPP);
1702
1703 if (udata->inlen > sizeof(req) &&
1704 !ib_is_udata_cleared(udata, sizeof(req),
1705 udata->inlen - sizeof(req)))
1706 return ERR_PTR(-EOPNOTSUPP);
1707
1708 ndescs = req.num_klms ? roundup(req.num_klms, 4) : roundup(1, 4);
1709
1710 mw = kzalloc(sizeof(*mw), GFP_KERNEL);
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001711 in = kzalloc(inlen, GFP_KERNEL);
Matan Barakd2370e02016-02-29 18:05:30 +02001712 if (!mw || !in) {
1713 err = -ENOMEM;
1714 goto free;
1715 }
1716
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001717 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
Matan Barakd2370e02016-02-29 18:05:30 +02001718
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001719 MLX5_SET(mkc, mkc, free, 1);
1720 MLX5_SET(mkc, mkc, translations_octword_size, ndescs);
1721 MLX5_SET(mkc, mkc, pd, to_mpd(pd)->pdn);
1722 MLX5_SET(mkc, mkc, umr_en, 1);
1723 MLX5_SET(mkc, mkc, lr, 1);
1724 MLX5_SET(mkc, mkc, access_mode, MLX5_MKC_ACCESS_MODE_KLMS);
1725 MLX5_SET(mkc, mkc, en_rinval, !!((type == IB_MW_TYPE_2)));
1726 MLX5_SET(mkc, mkc, qpn, 0xffffff);
1727
1728 err = mlx5_core_create_mkey(dev->mdev, &mw->mmkey, in, inlen);
Matan Barakd2370e02016-02-29 18:05:30 +02001729 if (err)
1730 goto free;
1731
1732 mw->ibmw.rkey = mw->mmkey.key;
1733
1734 resp.response_length = min(offsetof(typeof(resp), response_length) +
1735 sizeof(resp.response_length), udata->outlen);
1736 if (resp.response_length) {
1737 err = ib_copy_to_udata(udata, &resp, resp.response_length);
1738 if (err) {
1739 mlx5_core_destroy_mkey(dev->mdev, &mw->mmkey);
1740 goto free;
1741 }
1742 }
1743
1744 kfree(in);
1745 return &mw->ibmw;
1746
1747free:
1748 kfree(mw);
1749 kfree(in);
1750 return ERR_PTR(err);
1751}
1752
1753int mlx5_ib_dealloc_mw(struct ib_mw *mw)
1754{
1755 struct mlx5_ib_mw *mmw = to_mmw(mw);
1756 int err;
1757
1758 err = mlx5_core_destroy_mkey((to_mdev(mw->device))->mdev,
1759 &mmw->mmkey);
1760 if (!err)
1761 kfree(mmw);
1762 return err;
1763}
1764
Sagi Grimbergd5436ba2014-02-23 14:19:12 +02001765int mlx5_ib_check_mr_status(struct ib_mr *ibmr, u32 check_mask,
1766 struct ib_mr_status *mr_status)
1767{
1768 struct mlx5_ib_mr *mmr = to_mmr(ibmr);
1769 int ret = 0;
1770
1771 if (check_mask & ~IB_MR_CHECK_SIG_STATUS) {
1772 pr_err("Invalid status check mask\n");
1773 ret = -EINVAL;
1774 goto done;
1775 }
1776
1777 mr_status->fail_status = 0;
1778 if (check_mask & IB_MR_CHECK_SIG_STATUS) {
1779 if (!mmr->sig) {
1780 ret = -EINVAL;
1781 pr_err("signature status check requested on a non-signature enabled MR\n");
1782 goto done;
1783 }
1784
1785 mmr->sig->sig_status_checked = true;
1786 if (!mmr->sig->sig_err_exists)
1787 goto done;
1788
1789 if (ibmr->lkey == mmr->sig->err_item.key)
1790 memcpy(&mr_status->sig_err, &mmr->sig->err_item,
1791 sizeof(mr_status->sig_err));
1792 else {
1793 mr_status->sig_err.err_type = IB_SIG_BAD_GUARD;
1794 mr_status->sig_err.sig_err_offset = 0;
1795 mr_status->sig_err.key = mmr->sig->err_item.key;
1796 }
1797
1798 mmr->sig->sig_err_exists = false;
1799 mr_status->fail_status |= IB_MR_CHECK_SIG_STATUS;
1800 }
1801
1802done:
1803 return ret;
1804}
Sagi Grimberg8a187ee2015-10-13 19:11:26 +03001805
Sagi Grimbergb005d312016-02-29 19:07:33 +02001806static int
1807mlx5_ib_sg_to_klms(struct mlx5_ib_mr *mr,
1808 struct scatterlist *sgl,
Christoph Hellwigff2ba992016-05-03 18:01:04 +02001809 unsigned short sg_nents,
Bart Van Assche9aa8b322016-05-12 10:49:15 -07001810 unsigned int *sg_offset_p)
Sagi Grimbergb005d312016-02-29 19:07:33 +02001811{
1812 struct scatterlist *sg = sgl;
1813 struct mlx5_klm *klms = mr->descs;
Bart Van Assche9aa8b322016-05-12 10:49:15 -07001814 unsigned int sg_offset = sg_offset_p ? *sg_offset_p : 0;
Sagi Grimbergb005d312016-02-29 19:07:33 +02001815 u32 lkey = mr->ibmr.pd->local_dma_lkey;
1816 int i;
1817
Christoph Hellwigff2ba992016-05-03 18:01:04 +02001818 mr->ibmr.iova = sg_dma_address(sg) + sg_offset;
Sagi Grimbergb005d312016-02-29 19:07:33 +02001819 mr->ibmr.length = 0;
1820 mr->ndescs = sg_nents;
1821
1822 for_each_sg(sgl, sg, sg_nents, i) {
1823 if (unlikely(i > mr->max_descs))
1824 break;
Christoph Hellwigff2ba992016-05-03 18:01:04 +02001825 klms[i].va = cpu_to_be64(sg_dma_address(sg) + sg_offset);
1826 klms[i].bcount = cpu_to_be32(sg_dma_len(sg) - sg_offset);
Sagi Grimbergb005d312016-02-29 19:07:33 +02001827 klms[i].key = cpu_to_be32(lkey);
1828 mr->ibmr.length += sg_dma_len(sg);
Christoph Hellwigff2ba992016-05-03 18:01:04 +02001829
1830 sg_offset = 0;
Sagi Grimbergb005d312016-02-29 19:07:33 +02001831 }
1832
Bart Van Assche9aa8b322016-05-12 10:49:15 -07001833 if (sg_offset_p)
1834 *sg_offset_p = sg_offset;
1835
Sagi Grimbergb005d312016-02-29 19:07:33 +02001836 return i;
1837}
1838
Sagi Grimberg8a187ee2015-10-13 19:11:26 +03001839static int mlx5_set_page(struct ib_mr *ibmr, u64 addr)
1840{
1841 struct mlx5_ib_mr *mr = to_mmr(ibmr);
1842 __be64 *descs;
1843
1844 if (unlikely(mr->ndescs == mr->max_descs))
1845 return -ENOMEM;
1846
1847 descs = mr->descs;
1848 descs[mr->ndescs++] = cpu_to_be64(addr | MLX5_EN_RD | MLX5_EN_WR);
1849
1850 return 0;
1851}
1852
Christoph Hellwigff2ba992016-05-03 18:01:04 +02001853int mlx5_ib_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
Bart Van Assche9aa8b322016-05-12 10:49:15 -07001854 unsigned int *sg_offset)
Sagi Grimberg8a187ee2015-10-13 19:11:26 +03001855{
1856 struct mlx5_ib_mr *mr = to_mmr(ibmr);
1857 int n;
1858
1859 mr->ndescs = 0;
1860
1861 ib_dma_sync_single_for_cpu(ibmr->device, mr->desc_map,
1862 mr->desc_size * mr->max_descs,
1863 DMA_TO_DEVICE);
1864
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001865 if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS)
Christoph Hellwigff2ba992016-05-03 18:01:04 +02001866 n = mlx5_ib_sg_to_klms(mr, sg, sg_nents, sg_offset);
Sagi Grimbergb005d312016-02-29 19:07:33 +02001867 else
Christoph Hellwigff2ba992016-05-03 18:01:04 +02001868 n = ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset,
1869 mlx5_set_page);
Sagi Grimberg8a187ee2015-10-13 19:11:26 +03001870
1871 ib_dma_sync_single_for_device(ibmr->device, mr->desc_map,
1872 mr->desc_size * mr->max_descs,
1873 DMA_TO_DEVICE);
1874
1875 return n;
1876}