blob: f4c2417a8730bcf0ae99c37fe1bfcc76a685cb51 [file] [log] [blame]
Wan ZongShun1082e272010-05-18 13:41:46 +08001/*
2 * Copyright (c) 2009-2010 Nuvoton technology corporation.
3 *
4 * Wan ZongShun <mcuos.com@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation;version 2 of the License.
9 *
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/slab.h>
15#include <linux/device.h>
16#include <linux/delay.h>
17#include <linux/mutex.h>
18#include <linux/suspend.h>
19#include <sound/core.h>
20#include <sound/pcm.h>
21#include <sound/initval.h>
22#include <sound/soc.h>
Wan ZongShun1082e272010-05-18 13:41:46 +080023#include <linux/clk.h>
24
25#include <mach/mfp.h>
26
Wan ZongShun0dc3b442010-06-02 14:05:14 +080027#include "nuc900-audio.h"
Wan ZongShun1082e272010-05-18 13:41:46 +080028
29static DEFINE_MUTEX(ac97_mutex);
30struct nuc900_audio *nuc900_ac97_data;
31
32static int nuc900_checkready(void)
33{
34 struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
35
36 if (!(AUDIO_READ(nuc900_audio->mmio + ACTL_ACIS0) & CODEC_READY))
37 return -EPERM;
38
39 return 0;
40}
41
42/* AC97 controller reads codec register */
43static unsigned short nuc900_ac97_read(struct snd_ac97 *ac97,
44 unsigned short reg)
45{
46 struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
47 unsigned long timeout = 0x10000, val;
48
49 mutex_lock(&ac97_mutex);
50
51 val = nuc900_checkready();
Axel Lin3f90e502010-11-29 17:43:39 +080052 if (val) {
Wan ZongShun1082e272010-05-18 13:41:46 +080053 dev_err(nuc900_audio->dev, "AC97 codec is not ready\n");
54 goto out;
55 }
56
57 /* set the R_WB bit and write register index */
58 AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS1, R_WB | reg);
59
60 /* set the valid frame bit and valid slots */
61 val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0);
62 val |= (VALID_FRAME | SLOT1_VALID);
63 AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, val);
64
65 udelay(100);
66
67 /* polling the AC_R_FINISH */
Wan ZongShun8dfb0c72010-06-02 14:02:33 +080068 while (!(AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON) & AC_R_FINISH)
69 && timeout--)
Wan ZongShun1082e272010-05-18 13:41:46 +080070 mdelay(1);
71
72 if (!timeout) {
73 dev_err(nuc900_audio->dev, "AC97 read register time out !\n");
74 val = -EPERM;
75 goto out;
76 }
77
78 val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0) ;
79 val &= ~SLOT1_VALID;
80 AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, val);
81
82 if (AUDIO_READ(nuc900_audio->mmio + ACTL_ACIS1) >> 2 != reg) {
83 dev_err(nuc900_audio->dev,
84 "R_INDEX of REG_ACTL_ACIS1 not match!\n");
85 }
86
87 udelay(100);
88 val = (AUDIO_READ(nuc900_audio->mmio + ACTL_ACIS2) & 0xFFFF);
89
90out:
91 mutex_unlock(&ac97_mutex);
92 return val;
93}
94
95/* AC97 controller writes to codec register */
96static void nuc900_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
97 unsigned short val)
98{
99 struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
100 unsigned long tmp, timeout = 0x10000;
101
102 mutex_lock(&ac97_mutex);
103
104 tmp = nuc900_checkready();
Axel Lin3f90e502010-11-29 17:43:39 +0800105 if (tmp)
Wan ZongShun1082e272010-05-18 13:41:46 +0800106 dev_err(nuc900_audio->dev, "AC97 codec is not ready\n");
107
108 /* clear the R_WB bit and write register index */
109 AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS1, reg);
110
111 /* write register value */
112 AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS2, val);
113
114 /* set the valid frame bit and valid slots */
115 tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0);
116 tmp |= SLOT1_VALID | SLOT2_VALID | VALID_FRAME;
117 AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, tmp);
118
119 udelay(100);
120
121 /* polling the AC_W_FINISH */
Wan ZongShun8dfb0c72010-06-02 14:02:33 +0800122 while ((AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON) & AC_W_FINISH)
123 && timeout--)
Wan ZongShun1082e272010-05-18 13:41:46 +0800124 mdelay(1);
125
126 if (!timeout)
127 dev_err(nuc900_audio->dev, "AC97 write register time out !\n");
128
129 tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0);
130 tmp &= ~(SLOT1_VALID | SLOT2_VALID);
131 AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, tmp);
132
133 mutex_unlock(&ac97_mutex);
134
135}
136
137static void nuc900_ac97_warm_reset(struct snd_ac97 *ac97)
138{
139 struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
140 unsigned long val;
141
142 mutex_lock(&ac97_mutex);
143
144 /* warm reset AC 97 */
145 val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON);
146 val |= AC_W_RES;
147 AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACCON, val);
148
Wan ZongShun08a0b712010-06-02 13:57:01 +0800149 udelay(100);
Wan ZongShun1082e272010-05-18 13:41:46 +0800150
151 val = nuc900_checkready();
Axel Lin3f90e502010-11-29 17:43:39 +0800152 if (val)
Wan ZongShun1082e272010-05-18 13:41:46 +0800153 dev_err(nuc900_audio->dev, "AC97 codec is not ready\n");
154
155 mutex_unlock(&ac97_mutex);
156}
157
158static void nuc900_ac97_cold_reset(struct snd_ac97 *ac97)
159{
160 struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
161 unsigned long val;
162
163 mutex_lock(&ac97_mutex);
164
165 /* reset Audio Controller */
166 val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
167 val |= ACTL_RESET_BIT;
168 AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
169
Wan ZongShun1082e272010-05-18 13:41:46 +0800170 val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
171 val &= (~ACTL_RESET_BIT);
172 AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
173
Wan ZongShun1082e272010-05-18 13:41:46 +0800174 /* reset AC-link interface */
175
176 val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
177 val |= AC_RESET;
178 AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
179
Wan ZongShun1082e272010-05-18 13:41:46 +0800180 val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
181 val &= ~AC_RESET;
182 AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
183
Wan ZongShun1082e272010-05-18 13:41:46 +0800184 /* cold reset AC 97 */
185 val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON);
186 val |= AC_C_RES;
187 AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACCON, val);
188
Wan ZongShun1082e272010-05-18 13:41:46 +0800189 val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON);
190 val &= (~AC_C_RES);
191 AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACCON, val);
192
Wan ZongShun08a0b712010-06-02 13:57:01 +0800193 udelay(100);
Wan ZongShun1082e272010-05-18 13:41:46 +0800194
195 mutex_unlock(&ac97_mutex);
196
197}
198
199/* AC97 controller operations */
Mark Brownb047e1c2013-06-26 12:45:59 +0100200static struct snd_ac97_bus_ops nuc900_ac97_ops = {
Wan ZongShun1082e272010-05-18 13:41:46 +0800201 .read = nuc900_ac97_read,
202 .write = nuc900_ac97_write,
203 .reset = nuc900_ac97_cold_reset,
204 .warm_reset = nuc900_ac97_warm_reset,
Mark Brownb047e1c2013-06-26 12:45:59 +0100205};
Wan ZongShun1082e272010-05-18 13:41:46 +0800206
207static int nuc900_ac97_trigger(struct snd_pcm_substream *substream,
208 int cmd, struct snd_soc_dai *dai)
209{
210 struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
Wan ZongShun018334c2010-06-02 13:54:25 +0800211 int ret;
Wan ZongShun1082e272010-05-18 13:41:46 +0800212 unsigned long val, tmp;
213
214 ret = 0;
215
216 switch (cmd) {
217 case SNDRV_PCM_TRIGGER_START:
218 case SNDRV_PCM_TRIGGER_RESUME:
219 val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
Wan ZongShun018334c2010-06-02 13:54:25 +0800220 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
Wan ZongShun1082e272010-05-18 13:41:46 +0800221 tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0);
222 tmp |= (SLOT3_VALID | SLOT4_VALID | VALID_FRAME);
223 AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, tmp);
224
225 tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_PSR);
226 tmp |= (P_DMA_END_IRQ | P_DMA_MIDDLE_IRQ);
227 AUDIO_WRITE(nuc900_audio->mmio + ACTL_PSR, tmp);
228 val |= AC_PLAY;
229 } else {
230 tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_RSR);
231 tmp |= (R_DMA_END_IRQ | R_DMA_MIDDLE_IRQ);
232
233 AUDIO_WRITE(nuc900_audio->mmio + ACTL_RSR, tmp);
234 val |= AC_RECORD;
235 }
236
237 AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
238
239 break;
240 case SNDRV_PCM_TRIGGER_STOP:
241 case SNDRV_PCM_TRIGGER_SUSPEND:
242 val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
Wan ZongShun018334c2010-06-02 13:54:25 +0800243 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
Wan ZongShun1082e272010-05-18 13:41:46 +0800244 tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0);
245 tmp &= ~(SLOT3_VALID | SLOT4_VALID);
246 AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, tmp);
247
248 AUDIO_WRITE(nuc900_audio->mmio + ACTL_PSR, RESET_PRSR);
249 val &= ~AC_PLAY;
250 } else {
251 AUDIO_WRITE(nuc900_audio->mmio + ACTL_RSR, RESET_PRSR);
252 val &= ~AC_RECORD;
253 }
254
255 AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
256
257 break;
258 default:
259 ret = -EINVAL;
260 }
261
262 return ret;
263}
264
Axel Line3edefb2010-11-29 17:40:05 +0800265static int nuc900_ac97_probe(struct snd_soc_dai *dai)
Wan ZongShun1082e272010-05-18 13:41:46 +0800266{
267 struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
268 unsigned long val;
269
270 mutex_lock(&ac97_mutex);
271
272 /* enable unit clock */
273 clk_enable(nuc900_audio->clk);
274
275 /* enable audio controller and AC-link interface */
276 val = AUDIO_READ(nuc900_audio->mmio + ACTL_CON);
277 val |= (IIS_AC_PIN_SEL | ACLINK_EN);
278 AUDIO_WRITE(nuc900_audio->mmio + ACTL_CON, val);
279
280 mutex_unlock(&ac97_mutex);
281
282 return 0;
283}
284
Axel Line3edefb2010-11-29 17:40:05 +0800285static int nuc900_ac97_remove(struct snd_soc_dai *dai)
Wan ZongShun1082e272010-05-18 13:41:46 +0800286{
287 struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
288
289 clk_disable(nuc900_audio->clk);
Axel Line3edefb2010-11-29 17:40:05 +0800290 return 0;
Wan ZongShun1082e272010-05-18 13:41:46 +0800291}
292
Lars-Peter Clausen85e76522011-11-23 11:40:40 +0100293static const struct snd_soc_dai_ops nuc900_ac97_dai_ops = {
Wan ZongShun1082e272010-05-18 13:41:46 +0800294 .trigger = nuc900_ac97_trigger,
295};
296
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000297static struct snd_soc_dai_driver nuc900_ac97_dai = {
Wan ZongShun1082e272010-05-18 13:41:46 +0800298 .probe = nuc900_ac97_probe,
299 .remove = nuc900_ac97_remove,
300 .ac97_control = 1,
301 .playback = {
302 .rates = SNDRV_PCM_RATE_8000_48000,
303 .formats = SNDRV_PCM_FMTBIT_S16_LE,
304 .channels_min = 1,
305 .channels_max = 2,
306 },
307 .capture = {
308 .rates = SNDRV_PCM_RATE_8000_48000,
309 .formats = SNDRV_PCM_FMTBIT_S16_LE,
310 .channels_min = 1,
311 .channels_max = 2,
312 },
313 .ops = &nuc900_ac97_dai_ops,
Axel Lin5a8f1d42010-11-29 17:39:10 +0800314};
Wan ZongShun1082e272010-05-18 13:41:46 +0800315
Kuninori Morimoto7fc34cc2013-03-21 03:33:13 -0700316static const struct snd_soc_component_driver nuc900_ac97_component = {
317 .name = "nuc900-ac97",
318};
319
Bill Pembertonce69ace2012-12-07 09:26:28 -0500320static int nuc900_ac97_drvprobe(struct platform_device *pdev)
Wan ZongShun1082e272010-05-18 13:41:46 +0800321{
322 struct nuc900_audio *nuc900_audio;
323 int ret;
324
325 if (nuc900_ac97_data)
326 return -EBUSY;
327
Mark Brownad3ae472013-06-26 12:11:33 +0100328 nuc900_audio = devm_kzalloc(&pdev->dev, sizeof(struct nuc900_audio),
329 GFP_KERNEL);
Wan ZongShun1082e272010-05-18 13:41:46 +0800330 if (!nuc900_audio)
331 return -ENOMEM;
332
333 spin_lock_init(&nuc900_audio->lock);
334
335 nuc900_audio->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Mark Brownad3ae472013-06-26 12:11:33 +0100336 if (!nuc900_audio->res)
337 return ret;
Wan ZongShun1082e272010-05-18 13:41:46 +0800338
Mark Brownad3ae472013-06-26 12:11:33 +0100339 nuc900_audio->mmio = devm_ioremap_resource(&pdev->dev,
340 nuc900_audio->res);
341 if (IS_ERR(nuc900_audio->mmio))
342 return PTR_ERR(nuc900_audio->mmio);
Wan ZongShun1082e272010-05-18 13:41:46 +0800343
Mark Brownad3ae472013-06-26 12:11:33 +0100344 nuc900_audio->clk = devm_clk_get(&pdev->dev, NULL);
Wan ZongShun1082e272010-05-18 13:41:46 +0800345 if (IS_ERR(nuc900_audio->clk)) {
346 ret = PTR_ERR(nuc900_audio->clk);
Mark Brownad3ae472013-06-26 12:11:33 +0100347 goto out;
Wan ZongShun1082e272010-05-18 13:41:46 +0800348 }
349
350 nuc900_audio->irq_num = platform_get_irq(pdev, 0);
351 if (!nuc900_audio->irq_num) {
352 ret = -EBUSY;
Mark Brownad3ae472013-06-26 12:11:33 +0100353 goto out;
Wan ZongShun1082e272010-05-18 13:41:46 +0800354 }
355
356 nuc900_ac97_data = nuc900_audio;
357
Mark Brownb047e1c2013-06-26 12:45:59 +0100358 ret = snd_soc_set_ac97_ops(&nuc900_ac97_ops);
359 if (ret)
360 goto out;
361
Kuninori Morimoto7fc34cc2013-03-21 03:33:13 -0700362 ret = snd_soc_register_component(&pdev->dev, &nuc900_ac97_component,
363 &nuc900_ac97_dai, 1);
Wan ZongShun1082e272010-05-18 13:41:46 +0800364 if (ret)
Mark Brownad3ae472013-06-26 12:11:33 +0100365 goto out;
Wan ZongShun1082e272010-05-18 13:41:46 +0800366
Axel Lin97371fa2011-11-25 00:23:28 +0100367 /* enbale ac97 multifunction pin */
Axel Line37051d2012-01-09 10:54:59 +0100368 mfp_set_groupg(nuc900_audio->dev, NULL);
Wan ZongShun1082e272010-05-18 13:41:46 +0800369
370 return 0;
371
Mark Brownad3ae472013-06-26 12:11:33 +0100372out:
Mark Brownb047e1c2013-06-26 12:45:59 +0100373 snd_soc_set_ac97_ops(NULL);
Wan ZongShun1082e272010-05-18 13:41:46 +0800374 return ret;
375}
376
Bill Pembertonce69ace2012-12-07 09:26:28 -0500377static int nuc900_ac97_drvremove(struct platform_device *pdev)
Wan ZongShun1082e272010-05-18 13:41:46 +0800378{
Kuninori Morimoto7fc34cc2013-03-21 03:33:13 -0700379 snd_soc_unregister_component(&pdev->dev);
Wan ZongShun1082e272010-05-18 13:41:46 +0800380
Wan ZongShun1082e272010-05-18 13:41:46 +0800381 nuc900_ac97_data = NULL;
Mark Brownb047e1c2013-06-26 12:45:59 +0100382 snd_soc_set_ac97_ops(NULL);
Wan ZongShun1082e272010-05-18 13:41:46 +0800383
384 return 0;
385}
386
387static struct platform_driver nuc900_ac97_driver = {
388 .driver = {
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000389 .name = "nuc900-ac97",
Wan ZongShun1082e272010-05-18 13:41:46 +0800390 .owner = THIS_MODULE,
391 },
392 .probe = nuc900_ac97_drvprobe,
Bill Pembertonce69ace2012-12-07 09:26:28 -0500393 .remove = nuc900_ac97_drvremove,
Wan ZongShun1082e272010-05-18 13:41:46 +0800394};
395
Axel Lind0efa6a2011-11-24 10:45:32 +0800396module_platform_driver(nuc900_ac97_driver);
Wan ZongShun1082e272010-05-18 13:41:46 +0800397
398MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
399MODULE_DESCRIPTION("NUC900 AC97 SoC driver!");
400MODULE_LICENSE("GPL");
401MODULE_ALIAS("platform:nuc900-ac97");