Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2006 Dave Airlie <airlied@linux.ie> |
| 3 | * Copyright © 2006-2009 Intel Corporation |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: |
| 25 | * Eric Anholt <eric@anholt.net> |
| 26 | * Jesse Barnes <jesse.barnes@intel.com> |
| 27 | */ |
| 28 | |
| 29 | #include <linux/i2c.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 30 | #include <linux/slab.h> |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 31 | #include <linux/delay.h> |
| 32 | #include "drmP.h" |
| 33 | #include "drm.h" |
| 34 | #include "drm_crtc.h" |
Keith Packard | aa93d63 | 2009-05-05 09:52:46 -0700 | [diff] [blame] | 35 | #include "drm_edid.h" |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 36 | #include "intel_drv.h" |
| 37 | #include "i915_drm.h" |
| 38 | #include "i915_drv.h" |
| 39 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 40 | struct intel_hdmi { |
| 41 | struct intel_encoder base; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 42 | u32 sdvox_reg; |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 43 | int ddc_bus; |
Chris Wilson | e953fd7 | 2011-02-21 22:23:52 +0000 | [diff] [blame] | 44 | uint32_t color_range; |
Ma Ling | 9dff6af | 2009-04-02 13:13:26 +0800 | [diff] [blame] | 45 | bool has_hdmi_sink; |
Zhenyu Wang | 2e3d600 | 2010-09-10 10:39:40 +0800 | [diff] [blame] | 46 | bool has_audio; |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 47 | int force_audio; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 48 | }; |
| 49 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 50 | static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder) |
| 51 | { |
Chris Wilson | 4ef69c7 | 2010-09-09 15:14:28 +0100 | [diff] [blame] | 52 | return container_of(encoder, struct intel_hdmi, base.base); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 53 | } |
| 54 | |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 55 | static struct intel_hdmi *intel_attached_hdmi(struct drm_connector *connector) |
| 56 | { |
| 57 | return container_of(intel_attached_encoder(connector), |
| 58 | struct intel_hdmi, base); |
| 59 | } |
| 60 | |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 61 | void intel_dip_infoframe_csum(struct dip_infoframe *avi_if) |
| 62 | { |
| 63 | uint8_t *data = (uint8_t *)avi_if; |
| 64 | uint8_t sum = 0; |
| 65 | unsigned i; |
| 66 | |
| 67 | avi_if->checksum = 0; |
| 68 | avi_if->ecc = 0; |
| 69 | |
| 70 | for (i = 0; i < sizeof(*avi_if); i++) |
| 71 | sum += data[i]; |
| 72 | |
| 73 | avi_if->checksum = 0x100 - sum; |
| 74 | } |
| 75 | |
| 76 | static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder) |
| 77 | { |
| 78 | struct dip_infoframe avi_if = { |
| 79 | .type = DIP_TYPE_AVI, |
| 80 | .ver = DIP_VERSION_AVI, |
| 81 | .len = DIP_LEN_AVI, |
| 82 | }; |
| 83 | uint32_t *data = (uint32_t *)&avi_if; |
| 84 | struct drm_device *dev = encoder->dev; |
| 85 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 86 | struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); |
| 87 | u32 port; |
| 88 | unsigned i; |
| 89 | |
| 90 | if (!intel_hdmi->has_hdmi_sink) |
| 91 | return; |
| 92 | |
| 93 | /* XXX first guess at handling video port, is this corrent? */ |
| 94 | if (intel_hdmi->sdvox_reg == SDVOB) |
| 95 | port = VIDEO_DIP_PORT_B; |
| 96 | else if (intel_hdmi->sdvox_reg == SDVOC) |
| 97 | port = VIDEO_DIP_PORT_C; |
| 98 | else |
| 99 | return; |
| 100 | |
| 101 | I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | port | |
| 102 | VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC); |
| 103 | |
| 104 | intel_dip_infoframe_csum(&avi_if); |
| 105 | for (i = 0; i < sizeof(avi_if); i += 4) { |
| 106 | I915_WRITE(VIDEO_DIP_DATA, *data); |
| 107 | data++; |
| 108 | } |
| 109 | |
| 110 | I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | port | |
| 111 | VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC | |
| 112 | VIDEO_DIP_ENABLE_AVI); |
| 113 | } |
| 114 | |
Jesse Barnes | b055c8f | 2011-07-08 11:31:57 -0700 | [diff] [blame^] | 115 | static void intel_ironlake_hdmi_set_avi_infoframe(struct drm_encoder *encoder) |
| 116 | { |
| 117 | struct dip_infoframe avi_if = { |
| 118 | .type = DIP_TYPE_AVI, |
| 119 | .ver = DIP_VERSION_AVI, |
| 120 | .len = DIP_LEN_AVI, |
| 121 | }; |
| 122 | uint32_t *data = (uint32_t *)&avi_if; |
| 123 | struct drm_device *dev = encoder->dev; |
| 124 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 125 | struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); |
| 126 | struct drm_crtc *crtc = encoder->crtc; |
| 127 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
| 128 | int reg = TVIDEO_DIP_CTL(intel_crtc->pipe); |
| 129 | unsigned i; |
| 130 | |
| 131 | if (!intel_hdmi->has_hdmi_sink) |
| 132 | return; |
| 133 | |
| 134 | intel_wait_for_vblank(dev, intel_crtc->pipe); |
| 135 | |
| 136 | I915_WRITE(reg, VIDEO_DIP_SELECT_AVI); |
| 137 | |
| 138 | intel_dip_infoframe_csum(&avi_if); |
| 139 | for (i = 0; i < sizeof(avi_if); i += 4) { |
| 140 | I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); |
| 141 | data++; |
| 142 | } |
| 143 | |
| 144 | I915_WRITE(reg, VIDEO_DIP_ENABLE | VIDEO_DIP_SELECT_AVI | |
| 145 | VIDEO_DIP_FREQ_VSYNC | (DIP_LEN_AVI << 8) | |
| 146 | VIDEO_DIP_ENABLE_AVI); |
| 147 | } |
| 148 | |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 149 | static void intel_hdmi_mode_set(struct drm_encoder *encoder, |
| 150 | struct drm_display_mode *mode, |
| 151 | struct drm_display_mode *adjusted_mode) |
| 152 | { |
| 153 | struct drm_device *dev = encoder->dev; |
| 154 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 155 | struct drm_crtc *crtc = encoder->crtc; |
| 156 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 157 | struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 158 | u32 sdvox; |
| 159 | |
Adam Jackson | b599c0b | 2010-07-16 14:46:31 -0400 | [diff] [blame] | 160 | sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE; |
Chris Wilson | e953fd7 | 2011-02-21 22:23:52 +0000 | [diff] [blame] | 161 | sdvox |= intel_hdmi->color_range; |
Adam Jackson | b599c0b | 2010-07-16 14:46:31 -0400 | [diff] [blame] | 162 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) |
| 163 | sdvox |= SDVO_VSYNC_ACTIVE_HIGH; |
| 164 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) |
| 165 | sdvox |= SDVO_HSYNC_ACTIVE_HIGH; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 166 | |
Zhenyu Wang | 2e3d600 | 2010-09-10 10:39:40 +0800 | [diff] [blame] | 167 | /* Required on CPT */ |
| 168 | if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev)) |
| 169 | sdvox |= HDMI_MODE_SELECT; |
| 170 | |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 171 | if (intel_hdmi->has_audio) { |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 172 | sdvox |= SDVO_AUDIO_ENABLE; |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 173 | sdvox |= SDVO_NULL_PACKETS_DURING_VSYNC; |
| 174 | } |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 175 | |
Zhenyu Wang | 0f22906 | 2010-04-07 16:15:57 +0800 | [diff] [blame] | 176 | if (intel_crtc->pipe == 1) { |
| 177 | if (HAS_PCH_CPT(dev)) |
| 178 | sdvox |= PORT_TRANS_B_SEL_CPT; |
| 179 | else |
| 180 | sdvox |= SDVO_PIPE_B_SELECT; |
| 181 | } |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 182 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 183 | I915_WRITE(intel_hdmi->sdvox_reg, sdvox); |
| 184 | POSTING_READ(intel_hdmi->sdvox_reg); |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 185 | |
Jesse Barnes | b055c8f | 2011-07-08 11:31:57 -0700 | [diff] [blame^] | 186 | if (HAS_PCH_SPLIT(dev)) |
| 187 | intel_ironlake_hdmi_set_avi_infoframe(encoder); |
| 188 | else |
| 189 | intel_hdmi_set_avi_infoframe(encoder); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 190 | } |
| 191 | |
| 192 | static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode) |
| 193 | { |
| 194 | struct drm_device *dev = encoder->dev; |
| 195 | struct drm_i915_private *dev_priv = dev->dev_private; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 196 | struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 197 | u32 temp; |
| 198 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 199 | temp = I915_READ(intel_hdmi->sdvox_reg); |
Zhenyu Wang | d8a2d0e | 2009-11-02 07:52:30 +0000 | [diff] [blame] | 200 | |
| 201 | /* HW workaround, need to toggle enable bit off and on for 12bpc, but |
| 202 | * we do this anyway which shows more stable in testing. |
| 203 | */ |
Eric Anholt | c619eed | 2010-01-28 16:45:52 -0800 | [diff] [blame] | 204 | if (HAS_PCH_SPLIT(dev)) { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 205 | I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE); |
| 206 | POSTING_READ(intel_hdmi->sdvox_reg); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 207 | } |
Zhenyu Wang | d8a2d0e | 2009-11-02 07:52:30 +0000 | [diff] [blame] | 208 | |
| 209 | if (mode != DRM_MODE_DPMS_ON) { |
| 210 | temp &= ~SDVO_ENABLE; |
| 211 | } else { |
| 212 | temp |= SDVO_ENABLE; |
| 213 | } |
| 214 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 215 | I915_WRITE(intel_hdmi->sdvox_reg, temp); |
| 216 | POSTING_READ(intel_hdmi->sdvox_reg); |
Zhenyu Wang | d8a2d0e | 2009-11-02 07:52:30 +0000 | [diff] [blame] | 217 | |
| 218 | /* HW workaround, need to write this twice for issue that may result |
| 219 | * in first write getting masked. |
| 220 | */ |
Eric Anholt | c619eed | 2010-01-28 16:45:52 -0800 | [diff] [blame] | 221 | if (HAS_PCH_SPLIT(dev)) { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 222 | I915_WRITE(intel_hdmi->sdvox_reg, temp); |
| 223 | POSTING_READ(intel_hdmi->sdvox_reg); |
Zhenyu Wang | d8a2d0e | 2009-11-02 07:52:30 +0000 | [diff] [blame] | 224 | } |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 225 | } |
| 226 | |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 227 | static int intel_hdmi_mode_valid(struct drm_connector *connector, |
| 228 | struct drm_display_mode *mode) |
| 229 | { |
| 230 | if (mode->clock > 165000) |
| 231 | return MODE_CLOCK_HIGH; |
| 232 | if (mode->clock < 20000) |
Nicolas Kaiser | 5cbba41 | 2011-05-30 12:48:26 +0200 | [diff] [blame] | 233 | return MODE_CLOCK_LOW; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 234 | |
| 235 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
| 236 | return MODE_NO_DBLESCAN; |
| 237 | |
| 238 | return MODE_OK; |
| 239 | } |
| 240 | |
| 241 | static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder, |
| 242 | struct drm_display_mode *mode, |
| 243 | struct drm_display_mode *adjusted_mode) |
| 244 | { |
| 245 | return true; |
| 246 | } |
| 247 | |
Keith Packard | aa93d63 | 2009-05-05 09:52:46 -0700 | [diff] [blame] | 248 | static enum drm_connector_status |
Chris Wilson | 930a9e2 | 2010-09-14 11:07:23 +0100 | [diff] [blame] | 249 | intel_hdmi_detect(struct drm_connector *connector, bool force) |
Ma Ling | 9dff6af | 2009-04-02 13:13:26 +0800 | [diff] [blame] | 250 | { |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 251 | struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 252 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
| 253 | struct edid *edid; |
Keith Packard | aa93d63 | 2009-05-05 09:52:46 -0700 | [diff] [blame] | 254 | enum drm_connector_status status = connector_status_disconnected; |
Ma Ling | 9dff6af | 2009-04-02 13:13:26 +0800 | [diff] [blame] | 255 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 256 | intel_hdmi->has_hdmi_sink = false; |
Zhenyu Wang | 2e3d600 | 2010-09-10 10:39:40 +0800 | [diff] [blame] | 257 | intel_hdmi->has_audio = false; |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 258 | edid = drm_get_edid(connector, |
| 259 | &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter); |
ling.ma@intel.com | 2ded9e2 | 2009-07-16 17:23:09 +0800 | [diff] [blame] | 260 | |
Keith Packard | aa93d63 | 2009-05-05 09:52:46 -0700 | [diff] [blame] | 261 | if (edid) { |
Eric Anholt | be9f1c4 | 2009-06-21 22:14:55 -0700 | [diff] [blame] | 262 | if (edid->input & DRM_EDID_INPUT_DIGITAL) { |
Keith Packard | aa93d63 | 2009-05-05 09:52:46 -0700 | [diff] [blame] | 263 | status = connector_status_connected; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 264 | intel_hdmi->has_hdmi_sink = drm_detect_hdmi_monitor(edid); |
Zhenyu Wang | 2e3d600 | 2010-09-10 10:39:40 +0800 | [diff] [blame] | 265 | intel_hdmi->has_audio = drm_detect_monitor_audio(edid); |
Keith Packard | aa93d63 | 2009-05-05 09:52:46 -0700 | [diff] [blame] | 266 | } |
Zhenyu Wang | 674e2d0 | 2010-03-29 15:57:42 +0800 | [diff] [blame] | 267 | connector->display_info.raw_edid = NULL; |
Keith Packard | aa93d63 | 2009-05-05 09:52:46 -0700 | [diff] [blame] | 268 | kfree(edid); |
Ma Ling | 9dff6af | 2009-04-02 13:13:26 +0800 | [diff] [blame] | 269 | } |
ling.ma@intel.com | 2ded9e2 | 2009-07-16 17:23:09 +0800 | [diff] [blame] | 270 | |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 271 | if (status == connector_status_connected) { |
| 272 | if (intel_hdmi->force_audio) |
| 273 | intel_hdmi->has_audio = intel_hdmi->force_audio > 0; |
| 274 | } |
| 275 | |
Keith Packard | aa93d63 | 2009-05-05 09:52:46 -0700 | [diff] [blame] | 276 | return status; |
Ma Ling | 9dff6af | 2009-04-02 13:13:26 +0800 | [diff] [blame] | 277 | } |
| 278 | |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 279 | static int intel_hdmi_get_modes(struct drm_connector *connector) |
| 280 | { |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 281 | struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 282 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 283 | |
| 284 | /* We should parse the EDID data and find out if it's an HDMI sink so |
| 285 | * we can send audio to it. |
| 286 | */ |
| 287 | |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 288 | return intel_ddc_get_modes(connector, |
| 289 | &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 290 | } |
| 291 | |
Chris Wilson | 1aad7ac | 2011-02-09 18:46:58 +0000 | [diff] [blame] | 292 | static bool |
| 293 | intel_hdmi_detect_audio(struct drm_connector *connector) |
| 294 | { |
| 295 | struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); |
| 296 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
| 297 | struct edid *edid; |
| 298 | bool has_audio = false; |
| 299 | |
| 300 | edid = drm_get_edid(connector, |
| 301 | &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter); |
| 302 | if (edid) { |
| 303 | if (edid->input & DRM_EDID_INPUT_DIGITAL) |
| 304 | has_audio = drm_detect_monitor_audio(edid); |
| 305 | |
| 306 | connector->display_info.raw_edid = NULL; |
| 307 | kfree(edid); |
| 308 | } |
| 309 | |
| 310 | return has_audio; |
| 311 | } |
| 312 | |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 313 | static int |
| 314 | intel_hdmi_set_property(struct drm_connector *connector, |
| 315 | struct drm_property *property, |
| 316 | uint64_t val) |
| 317 | { |
| 318 | struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); |
Chris Wilson | e953fd7 | 2011-02-21 22:23:52 +0000 | [diff] [blame] | 319 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 320 | int ret; |
| 321 | |
| 322 | ret = drm_connector_property_set_value(connector, property, val); |
| 323 | if (ret) |
| 324 | return ret; |
| 325 | |
Chris Wilson | 3f43c48 | 2011-05-12 22:17:24 +0100 | [diff] [blame] | 326 | if (property == dev_priv->force_audio_property) { |
Chris Wilson | 1aad7ac | 2011-02-09 18:46:58 +0000 | [diff] [blame] | 327 | int i = val; |
| 328 | bool has_audio; |
| 329 | |
| 330 | if (i == intel_hdmi->force_audio) |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 331 | return 0; |
| 332 | |
Chris Wilson | 1aad7ac | 2011-02-09 18:46:58 +0000 | [diff] [blame] | 333 | intel_hdmi->force_audio = i; |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 334 | |
Chris Wilson | 1aad7ac | 2011-02-09 18:46:58 +0000 | [diff] [blame] | 335 | if (i == 0) |
| 336 | has_audio = intel_hdmi_detect_audio(connector); |
| 337 | else |
| 338 | has_audio = i > 0; |
| 339 | |
| 340 | if (has_audio == intel_hdmi->has_audio) |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 341 | return 0; |
| 342 | |
Chris Wilson | 1aad7ac | 2011-02-09 18:46:58 +0000 | [diff] [blame] | 343 | intel_hdmi->has_audio = has_audio; |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 344 | goto done; |
| 345 | } |
| 346 | |
Chris Wilson | e953fd7 | 2011-02-21 22:23:52 +0000 | [diff] [blame] | 347 | if (property == dev_priv->broadcast_rgb_property) { |
| 348 | if (val == !!intel_hdmi->color_range) |
| 349 | return 0; |
| 350 | |
| 351 | intel_hdmi->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0; |
| 352 | goto done; |
| 353 | } |
| 354 | |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 355 | return -EINVAL; |
| 356 | |
| 357 | done: |
| 358 | if (intel_hdmi->base.base.crtc) { |
| 359 | struct drm_crtc *crtc = intel_hdmi->base.base.crtc; |
| 360 | drm_crtc_helper_set_mode(crtc, &crtc->mode, |
| 361 | crtc->x, crtc->y, |
| 362 | crtc->fb); |
| 363 | } |
| 364 | |
| 365 | return 0; |
| 366 | } |
| 367 | |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 368 | static void intel_hdmi_destroy(struct drm_connector *connector) |
| 369 | { |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 370 | drm_sysfs_connector_remove(connector); |
| 371 | drm_connector_cleanup(connector); |
Zhenyu Wang | 674e2d0 | 2010-03-29 15:57:42 +0800 | [diff] [blame] | 372 | kfree(connector); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 373 | } |
| 374 | |
| 375 | static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = { |
| 376 | .dpms = intel_hdmi_dpms, |
| 377 | .mode_fixup = intel_hdmi_mode_fixup, |
| 378 | .prepare = intel_encoder_prepare, |
| 379 | .mode_set = intel_hdmi_mode_set, |
| 380 | .commit = intel_encoder_commit, |
| 381 | }; |
| 382 | |
| 383 | static const struct drm_connector_funcs intel_hdmi_connector_funcs = { |
Keith Packard | c9fb15f | 2009-05-30 20:42:28 -0700 | [diff] [blame] | 384 | .dpms = drm_helper_connector_dpms, |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 385 | .detect = intel_hdmi_detect, |
| 386 | .fill_modes = drm_helper_probe_single_connector_modes, |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 387 | .set_property = intel_hdmi_set_property, |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 388 | .destroy = intel_hdmi_destroy, |
| 389 | }; |
| 390 | |
| 391 | static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = { |
| 392 | .get_modes = intel_hdmi_get_modes, |
| 393 | .mode_valid = intel_hdmi_mode_valid, |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 394 | .best_encoder = intel_best_encoder, |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 395 | }; |
| 396 | |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 397 | static const struct drm_encoder_funcs intel_hdmi_enc_funcs = { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 398 | .destroy = intel_encoder_destroy, |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 399 | }; |
| 400 | |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 401 | static void |
| 402 | intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *connector) |
| 403 | { |
Chris Wilson | 3f43c48 | 2011-05-12 22:17:24 +0100 | [diff] [blame] | 404 | intel_attach_force_audio_property(connector); |
Chris Wilson | e953fd7 | 2011-02-21 22:23:52 +0000 | [diff] [blame] | 405 | intel_attach_broadcast_rgb_property(connector); |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 406 | } |
| 407 | |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 408 | void intel_hdmi_init(struct drm_device *dev, int sdvox_reg) |
| 409 | { |
| 410 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 411 | struct drm_connector *connector; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 412 | struct intel_encoder *intel_encoder; |
Zhenyu Wang | 674e2d0 | 2010-03-29 15:57:42 +0800 | [diff] [blame] | 413 | struct intel_connector *intel_connector; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 414 | struct intel_hdmi *intel_hdmi; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 415 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 416 | intel_hdmi = kzalloc(sizeof(struct intel_hdmi), GFP_KERNEL); |
| 417 | if (!intel_hdmi) |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 418 | return; |
Zhenyu Wang | 674e2d0 | 2010-03-29 15:57:42 +0800 | [diff] [blame] | 419 | |
| 420 | intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); |
| 421 | if (!intel_connector) { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 422 | kfree(intel_hdmi); |
Zhenyu Wang | 674e2d0 | 2010-03-29 15:57:42 +0800 | [diff] [blame] | 423 | return; |
| 424 | } |
| 425 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 426 | intel_encoder = &intel_hdmi->base; |
Chris Wilson | 373a3cf | 2010-09-15 12:03:59 +0100 | [diff] [blame] | 427 | drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs, |
| 428 | DRM_MODE_ENCODER_TMDS); |
| 429 | |
Zhenyu Wang | 674e2d0 | 2010-03-29 15:57:42 +0800 | [diff] [blame] | 430 | connector = &intel_connector->base; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 431 | drm_connector_init(dev, connector, &intel_hdmi_connector_funcs, |
Adam Jackson | 8d91104 | 2009-09-23 15:08:29 -0400 | [diff] [blame] | 432 | DRM_MODE_CONNECTOR_HDMIA); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 433 | drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs); |
| 434 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 435 | intel_encoder->type = INTEL_OUTPUT_HDMI; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 436 | |
Dave Airlie | eb1f8e4 | 2010-05-07 06:42:51 +0000 | [diff] [blame] | 437 | connector->polled = DRM_CONNECTOR_POLL_HPD; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 438 | connector->interlace_allowed = 0; |
| 439 | connector->doublescan_allowed = 0; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 440 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 441 | |
| 442 | /* Set up the DDC bus. */ |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 443 | if (sdvox_reg == SDVOB) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 444 | intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 445 | intel_hdmi->ddc_bus = GMBUS_PORT_DPB; |
Jesse Barnes | b01f2c3 | 2009-12-11 11:07:17 -0800 | [diff] [blame] | 446 | dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 447 | } else if (sdvox_reg == SDVOC) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 448 | intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 449 | intel_hdmi->ddc_bus = GMBUS_PORT_DPC; |
Jesse Barnes | b01f2c3 | 2009-12-11 11:07:17 -0800 | [diff] [blame] | 450 | dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 451 | } else if (sdvox_reg == HDMIB) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 452 | intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 453 | intel_hdmi->ddc_bus = GMBUS_PORT_DPB; |
Jesse Barnes | b01f2c3 | 2009-12-11 11:07:17 -0800 | [diff] [blame] | 454 | dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 455 | } else if (sdvox_reg == HDMIC) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 456 | intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 457 | intel_hdmi->ddc_bus = GMBUS_PORT_DPC; |
Jesse Barnes | b01f2c3 | 2009-12-11 11:07:17 -0800 | [diff] [blame] | 458 | dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 459 | } else if (sdvox_reg == HDMID) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 460 | intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 461 | intel_hdmi->ddc_bus = GMBUS_PORT_DPD; |
Jesse Barnes | b01f2c3 | 2009-12-11 11:07:17 -0800 | [diff] [blame] | 462 | dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS; |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 463 | } |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 464 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 465 | intel_hdmi->sdvox_reg = sdvox_reg; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 466 | |
Chris Wilson | 4ef69c7 | 2010-09-09 15:14:28 +0100 | [diff] [blame] | 467 | drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 468 | |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 469 | intel_hdmi_add_properties(intel_hdmi, connector); |
| 470 | |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 471 | intel_connector_attach_encoder(intel_connector, intel_encoder); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 472 | drm_sysfs_connector_add(connector); |
| 473 | |
| 474 | /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written |
| 475 | * 0xd. Failure to do so will result in spurious interrupts being |
| 476 | * generated on the port when a cable is not attached. |
| 477 | */ |
| 478 | if (IS_G4X(dev) && !IS_GM45(dev)) { |
| 479 | u32 temp = I915_READ(PEG_BAND_GAP_DATA); |
| 480 | I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd); |
| 481 | } |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 482 | } |