Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-nomadik/timer.c |
| 3 | * |
| 4 | * Copyright (C) 2008 STMicroelectronics |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 5 | * Copyright (C) 2010 Alessandro Rubini |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2, as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | #include <linux/init.h> |
| 12 | #include <linux/interrupt.h> |
| 13 | #include <linux/irq.h> |
| 14 | #include <linux/io.h> |
| 15 | #include <linux/clockchips.h> |
| 16 | #include <linux/jiffies.h> |
| 17 | #include <asm/mach/time.h> |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 18 | |
Srinidhi Kasagar | 59b559d | 2009-11-12 06:20:54 +0100 | [diff] [blame] | 19 | #include <plat/mtu.h> |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 20 | |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 21 | void __iomem *mtu_base; /* ssigned by machine code */ |
Srinidhi Kasagar | 59b559d | 2009-11-12 06:20:54 +0100 | [diff] [blame] | 22 | |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 23 | /* clocksource: MTU decrements, so we negate the value being read. */ |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 24 | static cycle_t nmdk_read_timer(struct clocksource *cs) |
| 25 | { |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 26 | return -readl(mtu_base + MTU_VAL(0)); |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 27 | } |
| 28 | |
| 29 | static struct clocksource nmdk_clksrc = { |
| 30 | .name = "mtu_0", |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 31 | .rating = 200, |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 32 | .read = nmdk_read_timer, |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 33 | .mask = CLOCKSOURCE_MASK(32), |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 34 | .shift = 20, |
| 35 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
| 36 | }; |
| 37 | |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 38 | /* Clockevent device: use one-shot mode */ |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 39 | static void nmdk_clkevt_mode(enum clock_event_mode mode, |
| 40 | struct clock_event_device *dev) |
| 41 | { |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 42 | u32 cr; |
| 43 | |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 44 | switch (mode) { |
| 45 | case CLOCK_EVT_MODE_PERIODIC: |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 46 | pr_err("%s: periodic mode not supported\n", __func__); |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 47 | break; |
| 48 | case CLOCK_EVT_MODE_ONESHOT: |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 49 | /* Load highest value, enable device, enable interrupts */ |
| 50 | cr = readl(mtu_base + MTU_CR(1)); |
| 51 | writel(0, mtu_base + MTU_LR(1)); |
| 52 | writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(1)); |
| 53 | writel(0x2, mtu_base + MTU_IMSC); |
| 54 | break; |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 55 | case CLOCK_EVT_MODE_SHUTDOWN: |
| 56 | case CLOCK_EVT_MODE_UNUSED: |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 57 | /* disable irq */ |
| 58 | writel(0, mtu_base + MTU_IMSC); |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 59 | break; |
| 60 | case CLOCK_EVT_MODE_RESUME: |
| 61 | break; |
| 62 | } |
| 63 | } |
| 64 | |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 65 | static int nmdk_clkevt_next(unsigned long evt, struct clock_event_device *ev) |
| 66 | { |
| 67 | /* writing the value has immediate effect */ |
| 68 | writel(evt, mtu_base + MTU_LR(1)); |
| 69 | return 0; |
| 70 | } |
| 71 | |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 72 | static struct clock_event_device nmdk_clkevt = { |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 73 | .name = "mtu_1", |
| 74 | .features = CLOCK_EVT_FEAT_ONESHOT, |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 75 | .shift = 32, |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 76 | .rating = 200, |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 77 | .set_mode = nmdk_clkevt_mode, |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 78 | .set_next_event = nmdk_clkevt_next, |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 79 | }; |
| 80 | |
| 81 | /* |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 82 | * IRQ Handler for timer 1 of the MTU block. |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 83 | */ |
| 84 | static irqreturn_t nmdk_timer_interrupt(int irq, void *dev_id) |
| 85 | { |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 86 | struct clock_event_device *evdev = dev_id; |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 87 | |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 88 | writel(1 << 1, mtu_base + MTU_ICR); /* Interrupt clear reg */ |
| 89 | evdev->event_handler(evdev); |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 90 | return IRQ_HANDLED; |
| 91 | } |
| 92 | |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 93 | static struct irqaction nmdk_timer_irq = { |
| 94 | .name = "Nomadik Timer Tick", |
| 95 | .flags = IRQF_DISABLED | IRQF_TIMER, |
| 96 | .handler = nmdk_timer_interrupt, |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 97 | .dev_id = &nmdk_clkevt, |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 98 | }; |
| 99 | |
Srinidhi Kasagar | 59b559d | 2009-11-12 06:20:54 +0100 | [diff] [blame] | 100 | void __init nmdk_timer_init(void) |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 101 | { |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 102 | unsigned long rate; |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 103 | u32 cr = MTU_CRn_32BITS;; |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 104 | |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 105 | /* |
| 106 | * Tick rate is 2.4MHz for Nomadik and 110MHz for ux500: |
| 107 | * use a divide-by-16 counter if it's more than 16MHz |
| 108 | */ |
| 109 | rate = CLOCK_TICK_RATE; |
| 110 | if (rate > 16 << 20) { |
| 111 | rate /= 16; |
| 112 | cr |= MTU_CRn_PRESCALE_16; |
| 113 | } else { |
| 114 | cr |= MTU_CRn_PRESCALE_1; |
| 115 | } |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 116 | |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 117 | /* Timer 0 is the free running clocksource */ |
| 118 | writel(cr, mtu_base + MTU_CR(0)); |
| 119 | writel(0, mtu_base + MTU_LR(0)); |
| 120 | writel(0, mtu_base + MTU_BGLR(0)); |
| 121 | writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0)); |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 122 | |
| 123 | nmdk_clksrc.mult = clocksource_hz2mult(rate, nmdk_clksrc.shift); |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 124 | |
Srinidhi Kasagar | 59b559d | 2009-11-12 06:20:54 +0100 | [diff] [blame] | 125 | if (clocksource_register(&nmdk_clksrc)) |
Alessandro Rubini | b102c01 | 2010-03-05 12:38:51 +0100 | [diff] [blame^] | 126 | pr_err("timer: failed to initialize clock source %s\n", |
| 127 | nmdk_clksrc.name); |
| 128 | |
| 129 | /* Timer 1 is used for events, fix according to rate */ |
| 130 | writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */ |
| 131 | nmdk_clkevt.mult = div_sc(rate, NSEC_PER_SEC, nmdk_clkevt.shift); |
| 132 | nmdk_clkevt.max_delta_ns = |
| 133 | clockevent_delta2ns(0xffffffff, &nmdk_clkevt); |
| 134 | nmdk_clkevt.min_delta_ns = |
| 135 | clockevent_delta2ns(0x00000002, &nmdk_clkevt); |
| 136 | nmdk_clkevt.cpumask = cpumask_of(0); |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 137 | |
| 138 | /* Register irq and clockevents */ |
| 139 | setup_irq(IRQ_MTU0, &nmdk_timer_irq); |
Alessandro Rubini | 28ad94e | 2009-07-02 19:06:47 +0100 | [diff] [blame] | 140 | clockevents_register_device(&nmdk_clkevt); |
| 141 | } |