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gerrit-public.fairphone.software / kernel / msm-4.19 / b2a54ff03ca80f11f3760f4eab9a955e7215f569 / . / arch / arm / boot / dts / vexpress-v2m.dtsi
blob: dba53fd026bb3692ecf33d69d237a2f9356c4bd1 [file] [log] [blame]
Pawel Moll8deed172012-02-23 13:04:51 +0000[diff] [blame]1/*
2 * ARM Ltd. Versatile Express
3 *
4 * Motherboard Express uATX
5 * V2M-P1
6 *
7 * HBI-0190D
8 *
9 * Original memory map ("Legacy memory map" in the board's
10 * Technical Reference Manual)
11 *
12 * WARNING! The hardware described in this file is independent from the
13 * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong
14 * correspondence between the two configurations.
15 *
16 * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
17 * CHANGES TO vexpress-v2m-rs1.dtsi!
18 */
19
20/ {
21 aliases {
22 arm,v2m_timer = &v2m_timer01;
23 };
24
25 motherboard {
26 compatible = "simple-bus";
27 #address-cells = <2>; /* SMB chipselect number and offset */
28 #size-cells = <1>;
29 #interrupt-cells = <1>;
30
31 flash@0,00000000 {
32 compatible = "arm,vexpress-flash", "cfi-flash";
33 reg = <0 0x00000000 0x04000000>,
34 <1 0x00000000 0x04000000>;
35 bank-width = <4>;
36 };
37
38 psram@2,00000000 {
39 compatible = "arm,vexpress-psram", "mtd-ram";
40 reg = <2 0x00000000 0x02000000>;
41 bank-width = <4>;
42 };
43
44 vram@3,00000000 {
45 compatible = "arm,vexpress-vram";
46 reg = <3 0x00000000 0x00800000>;
47 };
48
49 ethernet@3,02000000 {
50 compatible = "smsc,lan9118", "smsc,lan9115";
51 reg = <3 0x02000000 0x10000>;
52 interrupts = <15>;
53 phy-mode = "mii";
54 reg-io-width = <4>;
55 smsc,irq-active-high;
56 smsc,irq-push-pull;
Pawel Mollb2a54ff2012-07-09 11:33:47 +0100[diff] [blame^]57 vdd33a-supply = <&v2m_fixed_3v3>;
58 vddvario-supply = <&v2m_fixed_3v3>;
Pawel Moll8deed172012-02-23 13:04:51 +0000[diff] [blame]59 };
60
61 usb@3,03000000 {
62 compatible = "nxp,usb-isp1761";
63 reg = <3 0x03000000 0x20000>;
64 interrupts = <16>;
65 port1-otg;
66 };
67
68 iofpga@7,00000000 {
69 compatible = "arm,amba-bus", "simple-bus";
70 #address-cells = <1>;
71 #size-cells = <1>;
72 ranges = <0 7 0 0x20000>;
73
74 sysreg@00000 {
75 compatible = "arm,vexpress-sysreg";
76 reg = <0x00000 0x1000>;
77 };
78
79 sysctl@01000 {
80 compatible = "arm,sp810", "arm,primecell";
81 reg = <0x01000 0x1000>;
82 };
83
84 /* PCI-E I2C bus */
85 v2m_i2c_pcie: i2c@02000 {
86 compatible = "arm,versatile-i2c";
87 reg = <0x02000 0x1000>;
88
89 #address-cells = <1>;
90 #size-cells = <0>;
91
92 pcie-switch@60 {
93 compatible = "idt,89hpes32h8";
94 reg = <0x60>;
95 };
96 };
97
98 aaci@04000 {
99 compatible = "arm,pl041", "arm,primecell";
100 reg = <0x04000 0x1000>;
101 interrupts = <11>;
102 };
103
104 mmci@05000 {
105 compatible = "arm,pl180", "arm,primecell";
106 reg = <0x05000 0x1000>;
107 interrupts = <9 10>;
108 };
109
110 kmi@06000 {
111 compatible = "arm,pl050", "arm,primecell";
112 reg = <0x06000 0x1000>;
113 interrupts = <12>;
114 };
115
116 kmi@07000 {
117 compatible = "arm,pl050", "arm,primecell";
118 reg = <0x07000 0x1000>;
119 interrupts = <13>;
120 };
121
122 v2m_serial0: uart@09000 {
123 compatible = "arm,pl011", "arm,primecell";
124 reg = <0x09000 0x1000>;
125 interrupts = <5>;
126 };
127
128 v2m_serial1: uart@0a000 {
129 compatible = "arm,pl011", "arm,primecell";
130 reg = <0x0a000 0x1000>;
131 interrupts = <6>;
132 };
133
134 v2m_serial2: uart@0b000 {
135 compatible = "arm,pl011", "arm,primecell";
136 reg = <0x0b000 0x1000>;
137 interrupts = <7>;
138 };
139
140 v2m_serial3: uart@0c000 {
141 compatible = "arm,pl011", "arm,primecell";
142 reg = <0x0c000 0x1000>;
143 interrupts = <8>;
144 };
145
146 wdt@0f000 {
147 compatible = "arm,sp805", "arm,primecell";
148 reg = <0x0f000 0x1000>;
149 interrupts = <0>;
150 };
151
152 v2m_timer01: timer@11000 {
153 compatible = "arm,sp804", "arm,primecell";
154 reg = <0x11000 0x1000>;
155 interrupts = <2>;
156 };
157
158 v2m_timer23: timer@12000 {
159 compatible = "arm,sp804", "arm,primecell";
160 reg = <0x12000 0x1000>;
Pawel Mollb7541a92012-07-04 13:40:40 +0100[diff] [blame]161 interrupts = <3>;
Pawel Moll8deed172012-02-23 13:04:51 +0000[diff] [blame]162 };
163
164 /* DVI I2C bus */
165 v2m_i2c_dvi: i2c@16000 {
166 compatible = "arm,versatile-i2c";
167 reg = <0x16000 0x1000>;
168
169 #address-cells = <1>;
170 #size-cells = <0>;
171
172 dvi-transmitter@39 {
173 compatible = "sil,sii9022-tpi", "sil,sii9022";
174 reg = <0x39>;
175 };
176
177 dvi-transmitter@60 {
178 compatible = "sil,sii9022-cpi", "sil,sii9022";
179 reg = <0x60>;
180 };
181 };
182
183 rtc@17000 {
184 compatible = "arm,pl031", "arm,primecell";
185 reg = <0x17000 0x1000>;
186 interrupts = <4>;
187 };
188
189 compact-flash@1a000 {
190 compatible = "arm,vexpress-cf", "ata-generic";
191 reg = <0x1a000 0x100
192 0x1a100 0xf00>;
193 reg-shift = <2>;
194 };
195
196 clcd@1f000 {
197 compatible = "arm,pl111", "arm,primecell";
198 reg = <0x1f000 0x1000>;
199 interrupts = <14>;
200 };
201 };
Pawel Mollb2a54ff2012-07-09 11:33:47 +0100[diff] [blame^]202
203 v2m_fixed_3v3: fixedregulator@0 {
204 compatible = "regulator-fixed";
205 regulator-name = "3V3";
206 regulator-min-microvolt = <3300000>;
207 regulator-max-microvolt = <3300000>;
208 regulator-always-on;
209 };
Pawel Moll8deed172012-02-23 13:04:51 +0000[diff] [blame]210 };
211};