Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/s390/s390mach.c |
| 3 | * S/390 machine check handler |
| 4 | * |
| 5 | * S390 version |
| 6 | * Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation |
| 7 | * Author(s): Ingo Adlung (adlung@de.ibm.com) |
| 8 | * Martin Schwidefsky (schwidefsky@de.ibm.com) |
| 9 | */ |
| 10 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | #include <linux/init.h> |
| 12 | #include <linux/sched.h> |
| 13 | #include <linux/errno.h> |
| 14 | #include <linux/workqueue.h> |
Heiko Carstens | 022e4fc | 2006-05-01 12:16:14 -0700 | [diff] [blame] | 15 | #include <linux/time.h> |
Heiko Carstens | 2b67fc4 | 2007-02-05 21:16:47 +0100 | [diff] [blame] | 16 | #include <linux/device.h> |
Serge E. Hallyn | 84d11c5 | 2006-06-29 15:03:17 +0200 | [diff] [blame] | 17 | #include <linux/kthread.h> |
Martin Schwidefsky | d54853e | 2007-02-05 21:18:19 +0100 | [diff] [blame] | 18 | #include <asm/etr.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | #include <asm/lowcore.h> |
Heiko Carstens | 2b67fc4 | 2007-02-05 21:16:47 +0100 | [diff] [blame] | 20 | #include <asm/cio.h> |
| 21 | #include "cio/cio.h" |
| 22 | #include "cio/chsc.h" |
| 23 | #include "cio/css.h" |
Peter Oberparleiter | e6b6e10 | 2007-04-27 16:01:28 +0200 | [diff] [blame] | 24 | #include "cio/chp.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | #include "s390mach.h" |
| 26 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | static struct semaphore m_sem; |
| 28 | |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 29 | static NORET_TYPE void |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | s390_handle_damage(char *msg) |
| 31 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | #ifdef CONFIG_SMP |
| 33 | smp_send_stop(); |
| 34 | #endif |
| 35 | disabled_wait((unsigned long) __builtin_return_address(0)); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 36 | for(;;); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | } |
| 38 | |
| 39 | /* |
| 40 | * Retrieve CRWs and call function to handle event. |
| 41 | * |
| 42 | * Note : we currently process CRWs for io and chsc subchannels only |
| 43 | */ |
| 44 | static int |
| 45 | s390_collect_crw_info(void *param) |
| 46 | { |
Cornelia Huck | fb6958a | 2006-01-06 00:19:25 -0800 | [diff] [blame] | 47 | struct crw crw[2]; |
Peter Oberparleiter | 83b3370 | 2007-04-27 16:01:34 +0200 | [diff] [blame] | 48 | int ccode; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | struct semaphore *sem; |
Cornelia Huck | fb6958a | 2006-01-06 00:19:25 -0800 | [diff] [blame] | 50 | unsigned int chain; |
Martin Schwidefsky | c6ca185 | 2008-05-07 09:22:56 +0200 | [diff] [blame] | 51 | int ignore; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | |
| 53 | sem = (struct semaphore *)param; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | repeat: |
Martin Schwidefsky | c6ca185 | 2008-05-07 09:22:56 +0200 | [diff] [blame] | 55 | ignore = down_interruptible(sem); |
Cornelia Huck | fb6958a | 2006-01-06 00:19:25 -0800 | [diff] [blame] | 56 | chain = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 57 | while (1) { |
Cornelia Huck | fb6958a | 2006-01-06 00:19:25 -0800 | [diff] [blame] | 58 | if (unlikely(chain > 1)) { |
| 59 | struct crw tmp_crw; |
| 60 | |
| 61 | printk(KERN_WARNING"%s: Code does not support more " |
| 62 | "than two chained crws; please report to " |
Harvey Harrison | 2a2cf6b | 2008-04-17 07:46:21 +0200 | [diff] [blame] | 63 | "linux390@de.ibm.com!\n", __func__); |
Cornelia Huck | fb6958a | 2006-01-06 00:19:25 -0800 | [diff] [blame] | 64 | ccode = stcrw(&tmp_crw); |
| 65 | printk(KERN_WARNING"%s: crw reports slct=%d, oflw=%d, " |
| 66 | "chn=%d, rsc=%X, anc=%d, erc=%X, rsid=%X\n", |
Harvey Harrison | 2a2cf6b | 2008-04-17 07:46:21 +0200 | [diff] [blame] | 67 | __func__, tmp_crw.slct, tmp_crw.oflw, |
Cornelia Huck | fb6958a | 2006-01-06 00:19:25 -0800 | [diff] [blame] | 68 | tmp_crw.chn, tmp_crw.rsc, tmp_crw.anc, |
| 69 | tmp_crw.erc, tmp_crw.rsid); |
| 70 | printk(KERN_WARNING"%s: This was crw number %x in the " |
Harvey Harrison | 2a2cf6b | 2008-04-17 07:46:21 +0200 | [diff] [blame] | 71 | "chain\n", __func__, chain); |
Cornelia Huck | fb6958a | 2006-01-06 00:19:25 -0800 | [diff] [blame] | 72 | if (ccode != 0) |
| 73 | break; |
| 74 | chain = tmp_crw.chn ? chain + 1 : 0; |
| 75 | continue; |
| 76 | } |
| 77 | ccode = stcrw(&crw[chain]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | if (ccode != 0) |
| 79 | break; |
Cornelia Huck | 250b2dc | 2006-09-20 15:59:47 +0200 | [diff] [blame] | 80 | printk(KERN_DEBUG "crw_info : CRW reports slct=%d, oflw=%d, " |
| 81 | "chn=%d, rsc=%X, anc=%d, erc=%X, rsid=%X\n", |
| 82 | crw[chain].slct, crw[chain].oflw, crw[chain].chn, |
| 83 | crw[chain].rsc, crw[chain].anc, crw[chain].erc, |
| 84 | crw[chain].rsid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | /* Check for overflows. */ |
Cornelia Huck | fb6958a | 2006-01-06 00:19:25 -0800 | [diff] [blame] | 86 | if (crw[chain].oflw) { |
Harvey Harrison | 2a2cf6b | 2008-04-17 07:46:21 +0200 | [diff] [blame] | 87 | pr_debug("%s: crw overflow detected!\n", __func__); |
Peter Oberparleiter | 83b3370 | 2007-04-27 16:01:34 +0200 | [diff] [blame] | 88 | css_schedule_eval_all(); |
Cornelia Huck | fb6958a | 2006-01-06 00:19:25 -0800 | [diff] [blame] | 89 | chain = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 90 | continue; |
| 91 | } |
Cornelia Huck | fb6958a | 2006-01-06 00:19:25 -0800 | [diff] [blame] | 92 | switch (crw[chain].rsc) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 93 | case CRW_RSC_SCH: |
Cornelia Huck | fb6958a | 2006-01-06 00:19:25 -0800 | [diff] [blame] | 94 | if (crw[0].chn && !chain) |
| 95 | break; |
| 96 | pr_debug("source is subchannel %04X\n", crw[0].rsid); |
Peter Oberparleiter | 83b3370 | 2007-04-27 16:01:34 +0200 | [diff] [blame] | 97 | css_process_crw(crw[0].rsid, chain ? crw[1].rsid : 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 98 | break; |
| 99 | case CRW_RSC_MONITOR: |
| 100 | pr_debug("source is monitoring facility\n"); |
| 101 | break; |
| 102 | case CRW_RSC_CPATH: |
Cornelia Huck | fb6958a | 2006-01-06 00:19:25 -0800 | [diff] [blame] | 103 | pr_debug("source is channel path %02X\n", crw[0].rsid); |
Cornelia Huck | 7e56081 | 2006-07-12 16:40:19 +0200 | [diff] [blame] | 104 | /* |
| 105 | * Check for solicited machine checks. These are |
| 106 | * created by reset channel path and need not be |
| 107 | * reported to the common I/O layer. |
| 108 | */ |
| 109 | if (crw[chain].slct) { |
Cornelia Huck | 250b2dc | 2006-09-20 15:59:47 +0200 | [diff] [blame] | 110 | pr_debug("solicited machine check for " |
| 111 | "channel path %02X\n", crw[0].rsid); |
Cornelia Huck | 7e56081 | 2006-07-12 16:40:19 +0200 | [diff] [blame] | 112 | break; |
| 113 | } |
Cornelia Huck | fb6958a | 2006-01-06 00:19:25 -0800 | [diff] [blame] | 114 | switch (crw[0].erc) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | case CRW_ERC_IPARM: /* Path has come. */ |
Peter Oberparleiter | 83b3370 | 2007-04-27 16:01:34 +0200 | [diff] [blame] | 116 | chp_process_crw(crw[0].rsid, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 117 | break; |
| 118 | case CRW_ERC_PERRI: /* Path has gone. */ |
| 119 | case CRW_ERC_PERRN: |
Peter Oberparleiter | 83b3370 | 2007-04-27 16:01:34 +0200 | [diff] [blame] | 120 | chp_process_crw(crw[0].rsid, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 121 | break; |
| 122 | default: |
| 123 | pr_debug("Don't know how to handle erc=%x\n", |
Cornelia Huck | fb6958a | 2006-01-06 00:19:25 -0800 | [diff] [blame] | 124 | crw[0].erc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 125 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 126 | break; |
| 127 | case CRW_RSC_CONFIG: |
| 128 | pr_debug("source is configuration-alert facility\n"); |
| 129 | break; |
| 130 | case CRW_RSC_CSS: |
| 131 | pr_debug("source is channel subsystem\n"); |
Peter Oberparleiter | 83b3370 | 2007-04-27 16:01:34 +0200 | [diff] [blame] | 132 | chsc_process_crw(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 133 | break; |
| 134 | default: |
| 135 | pr_debug("unknown source\n"); |
| 136 | break; |
| 137 | } |
Cornelia Huck | fb6958a | 2006-01-06 00:19:25 -0800 | [diff] [blame] | 138 | /* chain is always 0 or 1 here. */ |
| 139 | chain = crw[chain].chn ? chain + 1 : 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 141 | goto repeat; |
| 142 | return 0; |
| 143 | } |
| 144 | |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 145 | struct mcck_struct { |
| 146 | int kill_task; |
| 147 | int channel_report; |
| 148 | int warning; |
| 149 | unsigned long long mcck_code; |
| 150 | }; |
| 151 | |
| 152 | static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck); |
| 153 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | /* |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 155 | * Main machine check handler function. Will be called with interrupts enabled |
| 156 | * or disabled and machine checks enabled or disabled. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 157 | */ |
| 158 | void |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 159 | s390_handle_mcck(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 160 | { |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 161 | unsigned long flags; |
| 162 | struct mcck_struct mcck; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 163 | |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 164 | /* |
| 165 | * Disable machine checks and get the current state of accumulated |
| 166 | * machine checks. Afterwards delete the old state and enable machine |
| 167 | * checks again. |
| 168 | */ |
| 169 | local_irq_save(flags); |
| 170 | local_mcck_disable(); |
| 171 | mcck = __get_cpu_var(cpu_mcck); |
| 172 | memset(&__get_cpu_var(cpu_mcck), 0, sizeof(struct mcck_struct)); |
| 173 | clear_thread_flag(TIF_MCCK_PENDING); |
| 174 | local_mcck_enable(); |
| 175 | local_irq_restore(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 176 | |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 177 | if (mcck.channel_report) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 178 | up(&m_sem); |
| 179 | |
| 180 | #ifdef CONFIG_MACHCHK_WARNING |
| 181 | /* |
| 182 | * The warning may remain for a prolonged period on the bare iron. |
| 183 | * (actually till the machine is powered off, or until the problem is gone) |
| 184 | * So we just stop listening for the WARNING MCH and prevent continuously |
| 185 | * being interrupted. One caveat is however, that we must do this per |
| 186 | * processor and cannot use the smp version of ctl_clear_bit(). |
| 187 | * On VM we only get one interrupt per virtally presented machinecheck. |
| 188 | * Though one suffices, we may get one interrupt per (virtual) processor. |
| 189 | */ |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 190 | if (mcck.warning) { /* WARNING pending ? */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 191 | static int mchchk_wng_posted = 0; |
| 192 | /* |
| 193 | * Use single machine clear, as we cannot handle smp right now |
| 194 | */ |
| 195 | __ctl_clear_bit(14, 24); /* Disable WARNING MCH */ |
| 196 | if (xchg(&mchchk_wng_posted, 1) == 0) |
Cedric Le Goater | 9ec5209 | 2006-10-02 02:19:00 -0700 | [diff] [blame] | 197 | kill_cad_pid(SIGPWR, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 198 | } |
| 199 | #endif |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 200 | |
| 201 | if (mcck.kill_task) { |
| 202 | local_irq_enable(); |
| 203 | printk(KERN_EMERG "mcck: Terminating task because of machine " |
| 204 | "malfunction (code 0x%016llx).\n", mcck.mcck_code); |
| 205 | printk(KERN_EMERG "mcck: task: %s, pid: %d.\n", |
| 206 | current->comm, current->pid); |
| 207 | do_exit(SIGSEGV); |
| 208 | } |
| 209 | } |
| 210 | |
| 211 | /* |
| 212 | * returns 0 if all registers could be validated |
| 213 | * returns 1 otherwise |
| 214 | */ |
| 215 | static int |
| 216 | s390_revalidate_registers(struct mci *mci) |
| 217 | { |
| 218 | int kill_task; |
| 219 | u64 tmpclock; |
| 220 | u64 zero; |
| 221 | void *fpt_save_area, *fpt_creg_save_area; |
| 222 | |
| 223 | kill_task = 0; |
| 224 | zero = 0; |
| 225 | /* General purpose registers */ |
| 226 | if (!mci->gr) |
| 227 | /* |
| 228 | * General purpose registers couldn't be restored and have |
| 229 | * unknown contents. Process needs to be terminated. |
| 230 | */ |
| 231 | kill_task = 1; |
| 232 | |
| 233 | /* Revalidate floating point registers */ |
| 234 | if (!mci->fp) |
| 235 | /* |
| 236 | * Floating point registers can't be restored and |
| 237 | * therefore the process needs to be terminated. |
| 238 | */ |
| 239 | kill_task = 1; |
| 240 | |
Martin Schwidefsky | 347a8dc | 2006-01-06 00:19:28 -0800 | [diff] [blame] | 241 | #ifndef CONFIG_64BIT |
Martin Schwidefsky | 94c12cc | 2006-09-28 16:56:43 +0200 | [diff] [blame] | 242 | asm volatile( |
| 243 | " ld 0,0(%0)\n" |
| 244 | " ld 2,8(%0)\n" |
| 245 | " ld 4,16(%0)\n" |
| 246 | " ld 6,24(%0)" |
| 247 | : : "a" (&S390_lowcore.floating_pt_save_area)); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 248 | #endif |
| 249 | |
| 250 | if (MACHINE_HAS_IEEE) { |
Martin Schwidefsky | 347a8dc | 2006-01-06 00:19:28 -0800 | [diff] [blame] | 251 | #ifdef CONFIG_64BIT |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 252 | fpt_save_area = &S390_lowcore.floating_pt_save_area; |
| 253 | fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area; |
| 254 | #else |
| 255 | fpt_save_area = (void *) S390_lowcore.extended_save_area_addr; |
| 256 | fpt_creg_save_area = fpt_save_area+128; |
| 257 | #endif |
| 258 | /* Floating point control register */ |
| 259 | if (!mci->fc) { |
| 260 | /* |
| 261 | * Floating point control register can't be restored. |
| 262 | * Task will be terminated. |
| 263 | */ |
Martin Schwidefsky | 94c12cc | 2006-09-28 16:56:43 +0200 | [diff] [blame] | 264 | asm volatile("lfpc 0(%0)" : : "a" (&zero), "m" (zero)); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 265 | kill_task = 1; |
| 266 | |
Martin Schwidefsky | 94c12cc | 2006-09-28 16:56:43 +0200 | [diff] [blame] | 267 | } else |
| 268 | asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area)); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 269 | |
Martin Schwidefsky | 94c12cc | 2006-09-28 16:56:43 +0200 | [diff] [blame] | 270 | asm volatile( |
| 271 | " ld 0,0(%0)\n" |
| 272 | " ld 1,8(%0)\n" |
| 273 | " ld 2,16(%0)\n" |
| 274 | " ld 3,24(%0)\n" |
| 275 | " ld 4,32(%0)\n" |
| 276 | " ld 5,40(%0)\n" |
| 277 | " ld 6,48(%0)\n" |
| 278 | " ld 7,56(%0)\n" |
| 279 | " ld 8,64(%0)\n" |
| 280 | " ld 9,72(%0)\n" |
| 281 | " ld 10,80(%0)\n" |
| 282 | " ld 11,88(%0)\n" |
| 283 | " ld 12,96(%0)\n" |
| 284 | " ld 13,104(%0)\n" |
| 285 | " ld 14,112(%0)\n" |
| 286 | " ld 15,120(%0)\n" |
| 287 | : : "a" (fpt_save_area)); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 288 | } |
| 289 | |
| 290 | /* Revalidate access registers */ |
Martin Schwidefsky | 94c12cc | 2006-09-28 16:56:43 +0200 | [diff] [blame] | 291 | asm volatile( |
| 292 | " lam 0,15,0(%0)" |
| 293 | : : "a" (&S390_lowcore.access_regs_save_area)); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 294 | if (!mci->ar) |
| 295 | /* |
| 296 | * Access registers have unknown contents. |
| 297 | * Terminating task. |
| 298 | */ |
| 299 | kill_task = 1; |
| 300 | |
| 301 | /* Revalidate control registers */ |
| 302 | if (!mci->cr) |
| 303 | /* |
| 304 | * Control registers have unknown contents. |
| 305 | * Can't recover and therefore stopping machine. |
| 306 | */ |
| 307 | s390_handle_damage("invalid control registers."); |
| 308 | else |
Martin Schwidefsky | 347a8dc | 2006-01-06 00:19:28 -0800 | [diff] [blame] | 309 | #ifdef CONFIG_64BIT |
Martin Schwidefsky | 94c12cc | 2006-09-28 16:56:43 +0200 | [diff] [blame] | 310 | asm volatile( |
| 311 | " lctlg 0,15,0(%0)" |
| 312 | : : "a" (&S390_lowcore.cregs_save_area)); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 313 | #else |
Martin Schwidefsky | 94c12cc | 2006-09-28 16:56:43 +0200 | [diff] [blame] | 314 | asm volatile( |
| 315 | " lctl 0,15,0(%0)" |
| 316 | : : "a" (&S390_lowcore.cregs_save_area)); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 317 | #endif |
| 318 | |
| 319 | /* |
| 320 | * We don't even try to revalidate the TOD register, since we simply |
| 321 | * can't write something sensible into that register. |
| 322 | */ |
| 323 | |
Martin Schwidefsky | 347a8dc | 2006-01-06 00:19:28 -0800 | [diff] [blame] | 324 | #ifdef CONFIG_64BIT |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 325 | /* |
| 326 | * See if we can revalidate the TOD programmable register with its |
| 327 | * old contents (should be zero) otherwise set it to zero. |
| 328 | */ |
| 329 | if (!mci->pr) |
Martin Schwidefsky | 94c12cc | 2006-09-28 16:56:43 +0200 | [diff] [blame] | 330 | asm volatile( |
| 331 | " sr 0,0\n" |
| 332 | " sckpf" |
| 333 | : : : "0", "cc"); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 334 | else |
| 335 | asm volatile( |
Martin Schwidefsky | 94c12cc | 2006-09-28 16:56:43 +0200 | [diff] [blame] | 336 | " l 0,0(%0)\n" |
| 337 | " sckpf" |
| 338 | : : "a" (&S390_lowcore.tod_progreg_save_area) |
| 339 | : "0", "cc"); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 340 | #endif |
| 341 | |
| 342 | /* Revalidate clock comparator register */ |
Martin Schwidefsky | 94c12cc | 2006-09-28 16:56:43 +0200 | [diff] [blame] | 343 | asm volatile( |
| 344 | " stck 0(%1)\n" |
| 345 | " sckc 0(%1)" |
| 346 | : "=m" (tmpclock) : "a" (&(tmpclock)) : "cc", "memory"); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 347 | |
| 348 | /* Check if old PSW is valid */ |
| 349 | if (!mci->wp) |
| 350 | /* |
| 351 | * Can't tell if we come from user or kernel mode |
| 352 | * -> stopping machine. |
| 353 | */ |
| 354 | s390_handle_damage("old psw invalid."); |
| 355 | |
| 356 | if (!mci->ms || !mci->pm || !mci->ia) |
| 357 | kill_task = 1; |
| 358 | |
| 359 | return kill_task; |
| 360 | } |
| 361 | |
Heiko Carstens | b73d40c | 2006-04-27 18:40:23 -0700 | [diff] [blame] | 362 | #define MAX_IPD_COUNT 29 |
Heiko Carstens | 022e4fc | 2006-05-01 12:16:14 -0700 | [diff] [blame] | 363 | #define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */ |
Heiko Carstens | b73d40c | 2006-04-27 18:40:23 -0700 | [diff] [blame] | 364 | |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 365 | /* |
| 366 | * machine check handler. |
| 367 | */ |
| 368 | void |
| 369 | s390_do_machine_check(struct pt_regs *regs) |
| 370 | { |
Heiko Carstens | b73d40c | 2006-04-27 18:40:23 -0700 | [diff] [blame] | 371 | static DEFINE_SPINLOCK(ipd_lock); |
| 372 | static unsigned long long last_ipd; |
| 373 | static int ipd_count; |
| 374 | unsigned long long tmp; |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 375 | struct mci *mci; |
| 376 | struct mcck_struct *mcck; |
| 377 | int umode; |
| 378 | |
Heiko Carstens | 8e9ccae | 2006-07-03 00:25:00 -0700 | [diff] [blame] | 379 | lockdep_off(); |
| 380 | |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 381 | mci = (struct mci *) &S390_lowcore.mcck_interruption_code; |
| 382 | mcck = &__get_cpu_var(cpu_mcck); |
| 383 | umode = user_mode(regs); |
| 384 | |
| 385 | if (mci->sd) |
| 386 | /* System damage -> stopping machine */ |
| 387 | s390_handle_damage("received system damage machine check."); |
| 388 | |
| 389 | if (mci->pd) { |
| 390 | if (mci->b) { |
| 391 | /* Processing backup -> verify if we can survive this */ |
| 392 | u64 z_mcic, o_mcic, t_mcic; |
Martin Schwidefsky | 347a8dc | 2006-01-06 00:19:28 -0800 | [diff] [blame] | 393 | #ifdef CONFIG_64BIT |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 394 | z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29); |
| 395 | o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | |
| 396 | 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | |
| 397 | 1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 | |
| 398 | 1ULL<<16); |
| 399 | #else |
| 400 | z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<57 | 1ULL<<50 | |
| 401 | 1ULL<<29); |
| 402 | o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | |
| 403 | 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | |
| 404 | 1ULL<<30 | 1ULL<<20 | 1ULL<<17 | 1ULL<<16); |
| 405 | #endif |
| 406 | t_mcic = *(u64 *)mci; |
| 407 | |
| 408 | if (((t_mcic & z_mcic) != 0) || |
| 409 | ((t_mcic & o_mcic) != o_mcic)) { |
| 410 | s390_handle_damage("processing backup machine " |
| 411 | "check with damage."); |
| 412 | } |
Heiko Carstens | b73d40c | 2006-04-27 18:40:23 -0700 | [diff] [blame] | 413 | |
| 414 | /* |
| 415 | * Nullifying exigent condition, therefore we might |
| 416 | * retry this instruction. |
| 417 | */ |
| 418 | |
| 419 | spin_lock(&ipd_lock); |
| 420 | |
| 421 | tmp = get_clock(); |
| 422 | |
| 423 | if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME) |
| 424 | ipd_count++; |
| 425 | else |
| 426 | ipd_count = 1; |
| 427 | |
| 428 | last_ipd = tmp; |
| 429 | |
| 430 | if (ipd_count == MAX_IPD_COUNT) |
| 431 | s390_handle_damage("too many ipd retries."); |
| 432 | |
| 433 | spin_unlock(&ipd_lock); |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 434 | } |
| 435 | else { |
| 436 | /* Processing damage -> stopping machine */ |
| 437 | s390_handle_damage("received instruction processing " |
| 438 | "damage machine check."); |
| 439 | } |
| 440 | } |
| 441 | if (s390_revalidate_registers(mci)) { |
| 442 | if (umode) { |
| 443 | /* |
| 444 | * Couldn't restore all register contents while in |
| 445 | * user mode -> mark task for termination. |
| 446 | */ |
| 447 | mcck->kill_task = 1; |
| 448 | mcck->mcck_code = *(unsigned long long *) mci; |
| 449 | set_thread_flag(TIF_MCCK_PENDING); |
| 450 | } |
| 451 | else |
| 452 | /* |
| 453 | * Couldn't restore all register contents while in |
| 454 | * kernel mode -> stopping machine. |
| 455 | */ |
| 456 | s390_handle_damage("unable to revalidate registers."); |
| 457 | } |
| 458 | |
Martin Schwidefsky | d54853e | 2007-02-05 21:18:19 +0100 | [diff] [blame] | 459 | if (mci->cd) { |
| 460 | /* Timing facility damage */ |
| 461 | s390_handle_damage("TOD clock damaged"); |
| 462 | } |
| 463 | |
| 464 | if (mci->ed && mci->ec) { |
| 465 | /* External damage */ |
| 466 | if (S390_lowcore.external_damage_code & (1U << ED_ETR_SYNC)) |
| 467 | etr_sync_check(); |
| 468 | if (S390_lowcore.external_damage_code & (1U << ED_ETR_SWITCH)) |
| 469 | etr_switch_to_local(); |
| 470 | } |
| 471 | |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 472 | if (mci->se) |
| 473 | /* Storage error uncorrected */ |
| 474 | s390_handle_damage("received storage error uncorrected " |
| 475 | "machine check."); |
| 476 | |
| 477 | if (mci->ke) |
| 478 | /* Storage key-error uncorrected */ |
| 479 | s390_handle_damage("received storage key-error uncorrected " |
| 480 | "machine check."); |
| 481 | |
| 482 | if (mci->ds && mci->fa) |
| 483 | /* Storage degradation */ |
| 484 | s390_handle_damage("received storage degradation machine " |
| 485 | "check."); |
| 486 | |
| 487 | if (mci->cp) { |
| 488 | /* Channel report word pending */ |
| 489 | mcck->channel_report = 1; |
| 490 | set_thread_flag(TIF_MCCK_PENDING); |
| 491 | } |
| 492 | |
| 493 | if (mci->w) { |
| 494 | /* Warning pending */ |
| 495 | mcck->warning = 1; |
| 496 | set_thread_flag(TIF_MCCK_PENDING); |
| 497 | } |
Heiko Carstens | 8e9ccae | 2006-07-03 00:25:00 -0700 | [diff] [blame] | 498 | lockdep_on(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 499 | } |
| 500 | |
| 501 | /* |
| 502 | * s390_init_machine_check |
| 503 | * |
| 504 | * initialize machine check handling |
| 505 | */ |
| 506 | static int |
| 507 | machine_check_init(void) |
| 508 | { |
| 509 | init_MUTEX_LOCKED(&m_sem); |
Martin Schwidefsky | d54853e | 2007-02-05 21:18:19 +0100 | [diff] [blame] | 510 | ctl_set_bit(14, 25); /* enable external damage MCH */ |
Heiko Carstens | 77fa224 | 2005-06-25 14:55:30 -0700 | [diff] [blame] | 511 | ctl_set_bit(14, 27); /* enable system recovery MCH */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 512 | #ifdef CONFIG_MACHCHK_WARNING |
| 513 | ctl_set_bit(14, 24); /* enable warning MCH */ |
| 514 | #endif |
| 515 | return 0; |
| 516 | } |
| 517 | |
| 518 | /* |
| 519 | * Initialize the machine check handler really early to be able to |
| 520 | * catch all machine checks that happen during boot |
| 521 | */ |
| 522 | arch_initcall(machine_check_init); |
| 523 | |
| 524 | /* |
| 525 | * Machine checks for the channel subsystem must be enabled |
| 526 | * after the channel subsystem is initialized |
| 527 | */ |
| 528 | static int __init |
| 529 | machine_check_crw_init (void) |
| 530 | { |
Akinobu Mita | b0f1779 | 2007-02-05 21:16:49 +0100 | [diff] [blame] | 531 | struct task_struct *task; |
| 532 | |
| 533 | task = kthread_run(s390_collect_crw_info, &m_sem, "kmcheck"); |
| 534 | if (IS_ERR(task)) |
| 535 | return PTR_ERR(task); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 536 | ctl_set_bit(14, 28); /* enable channel report MCH */ |
| 537 | return 0; |
| 538 | } |
| 539 | |
| 540 | device_initcall (machine_check_crw_init); |