blob: 7c323c5843d2a480253388d8f20b32c0aadac1f9 [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
23 * IN THE SOFTWARE.
24 */
25#ifndef __INTEL_DRV_H__
26#define __INTEL_DRV_H__
27
28#include <linux/i2c.h>
Jesse Barnes8ea30862012-01-03 08:05:39 -080029#include "i915_drm.h"
Jesse Barnes80824002009-09-10 15:28:06 -070030#include "i915_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080031#include "drm_crtc.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080032#include "drm_crtc_helper.h"
Chris Wilson37811fc2010-08-25 22:45:57 +010033#include "drm_fb_helper.h"
Chris Wilson913d8d12010-08-07 11:01:35 +010034
Chris Wilson481b6af2010-08-23 17:43:35 +010035#define _wait_for(COND, MS, W) ({ \
Chris Wilson913d8d12010-08-07 11:01:35 +010036 unsigned long timeout__ = jiffies + msecs_to_jiffies(MS); \
37 int ret__ = 0; \
Akshay Joshi0206e352011-08-16 15:34:10 -040038 while (!(COND)) { \
Chris Wilson913d8d12010-08-07 11:01:35 +010039 if (time_after(jiffies, timeout__)) { \
40 ret__ = -ETIMEDOUT; \
41 break; \
42 } \
Dave Airliecc1f7192012-01-05 09:55:22 +000043 if (W && drm_can_sleep()) msleep(W); \
Chris Wilson913d8d12010-08-07 11:01:35 +010044 } \
45 ret__; \
46})
47
Jesse Barnes57f350b2012-03-28 13:39:25 -070048#define wait_for_atomic_us(COND, US) ({ \
49 int i, ret__ = -ETIMEDOUT; \
50 for (i = 0; i < (US); i++) { \
51 if ((COND)) { \
52 ret__ = 0; \
53 break; \
54 } \
55 udelay(1); \
56 } \
57 ret__; \
58})
59
Chris Wilson481b6af2010-08-23 17:43:35 +010060#define wait_for(COND, MS) _wait_for(COND, MS, 1)
61#define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
62
Chris Wilson021357a2010-09-07 20:54:59 +010063#define KHz(x) (1000*x)
64#define MHz(x) KHz(1000*x)
65
Jesse Barnes79e53942008-11-07 14:24:08 -080066/*
67 * Display related stuff
68 */
69
70/* store information about an Ixxx DVO */
71/* The i830->i865 use multiple DVOs with multiple i2cs */
72/* the i915, i945 have a single sDVO i2c bus - which is different */
73#define MAX_OUTPUTS 6
74/* maximum connectors per crtcs in the mode set */
75#define INTELFB_CONN_LIMIT 4
76
77#define INTEL_I2C_BUS_DVO 1
78#define INTEL_I2C_BUS_SDVO 2
79
80/* these are outputs from the chip - integrated only
81 external chips are via DVO or SDVO output */
82#define INTEL_OUTPUT_UNUSED 0
83#define INTEL_OUTPUT_ANALOG 1
84#define INTEL_OUTPUT_DVO 2
85#define INTEL_OUTPUT_SDVO 3
86#define INTEL_OUTPUT_LVDS 4
87#define INTEL_OUTPUT_TVOUT 5
Eric Anholt7d573822009-01-02 13:33:00 -080088#define INTEL_OUTPUT_HDMI 6
Keith Packarda4fc5ed2009-04-07 16:16:42 -070089#define INTEL_OUTPUT_DISPLAYPORT 7
Zhenyu Wang32f9d652009-07-24 01:00:32 +080090#define INTEL_OUTPUT_EDP 8
Jesse Barnes79e53942008-11-07 14:24:08 -080091
Ma Lingf8aed702009-08-24 13:50:24 +080092/* Intel Pipe Clone Bit */
93#define INTEL_HDMIB_CLONE_BIT 1
94#define INTEL_HDMIC_CLONE_BIT 2
95#define INTEL_HDMID_CLONE_BIT 3
96#define INTEL_HDMIE_CLONE_BIT 4
97#define INTEL_HDMIF_CLONE_BIT 5
98#define INTEL_SDVO_NON_TV_CLONE_BIT 6
99#define INTEL_SDVO_TV_CLONE_BIT 7
100#define INTEL_SDVO_LVDS_CLONE_BIT 8
101#define INTEL_ANALOG_CLONE_BIT 9
102#define INTEL_TV_CLONE_BIT 10
103#define INTEL_DP_B_CLONE_BIT 11
104#define INTEL_DP_C_CLONE_BIT 12
105#define INTEL_DP_D_CLONE_BIT 13
106#define INTEL_LVDS_CLONE_BIT 14
107#define INTEL_DVO_TMDS_CLONE_BIT 15
108#define INTEL_DVO_LVDS_CLONE_BIT 16
Zhenyu Wang7c8460d2009-09-08 14:52:25 +0800109#define INTEL_EDP_CLONE_BIT 17
Ma Lingf8aed702009-08-24 13:50:24 +0800110
Jesse Barnes79e53942008-11-07 14:24:08 -0800111#define INTEL_DVO_CHIP_NONE 0
112#define INTEL_DVO_CHIP_LVDS 1
113#define INTEL_DVO_CHIP_TMDS 2
114#define INTEL_DVO_CHIP_TVOUT 4
115
Chris Wilson6c9547f2010-08-25 10:05:17 +0100116/* drm_display_mode->private_flags */
117#define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
118#define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
Adam Jackson3b5c78a2011-12-13 15:41:00 -0800119#define INTEL_MODE_DP_FORCE_6BPC (0x10)
Chris Wilson6c9547f2010-08-25 10:05:17 +0100120
121static inline void
122intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
123 int multiplier)
124{
125 mode->clock *= multiplier;
126 mode->private_flags |= multiplier;
127}
128
129static inline int
130intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
131{
132 return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
133}
134
Jesse Barnes79e53942008-11-07 14:24:08 -0800135struct intel_framebuffer {
136 struct drm_framebuffer base;
Chris Wilson05394f32010-11-08 19:18:58 +0000137 struct drm_i915_gem_object *obj;
Jesse Barnes79e53942008-11-07 14:24:08 -0800138};
139
Chris Wilson37811fc2010-08-25 22:45:57 +0100140struct intel_fbdev {
141 struct drm_fb_helper helper;
142 struct intel_framebuffer ifb;
143 struct list_head fbdev_list;
144 struct drm_display_mode *our_mode;
145};
Jesse Barnes79e53942008-11-07 14:24:08 -0800146
Eric Anholt21d40d32010-03-25 11:11:14 -0700147struct intel_encoder {
Chris Wilson4ef69c72010-09-09 15:14:28 +0100148 struct drm_encoder base;
Jesse Barnes79e53942008-11-07 14:24:08 -0800149 int type;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800150 bool needs_tv_clock;
Eric Anholt21d40d32010-03-25 11:11:14 -0700151 void (*hot_plug)(struct intel_encoder *);
Ma Lingf8aed702009-08-24 13:50:24 +0800152 int crtc_mask;
153 int clone_mask;
Jesse Barnes79e53942008-11-07 14:24:08 -0800154};
155
Zhenyu Wang5daa55e2010-03-30 14:39:28 +0800156struct intel_connector {
157 struct drm_connector base;
Chris Wilsondf0e9242010-09-09 16:20:55 +0100158 struct intel_encoder *encoder;
Zhenyu Wang5daa55e2010-03-30 14:39:28 +0800159};
160
Jesse Barnes79e53942008-11-07 14:24:08 -0800161struct intel_crtc {
162 struct drm_crtc base;
Jesse Barnes80824002009-09-10 15:28:06 -0700163 enum pipe pipe;
164 enum plane plane;
Jesse Barnes79e53942008-11-07 14:24:08 -0800165 u8 lut_r[256], lut_g[256], lut_b[256];
166 int dpms_mode;
Chris Wilsonf7abfe82010-09-13 14:19:16 +0100167 bool active; /* is the crtc on? independent of the dpms mode */
Jesse Barnes652c3932009-08-17 13:31:43 -0700168 bool busy; /* is scanout buffer being updated frequently? */
169 struct timer_list idle_timer;
170 bool lowfreq_avail;
Daniel Vetter02e792f2009-09-15 22:57:34 +0200171 struct intel_overlay *overlay;
Kristian Høgsberg6b95a202009-11-18 11:25:18 -0500172 struct intel_unpin_work *unpin_work;
Adam Jackson77ffb592010-04-12 11:38:44 -0400173 int fdi_lanes;
Chris Wilsoncda4b7d2010-07-09 08:45:04 +0100174
Chris Wilson05394f32010-11-08 19:18:58 +0000175 struct drm_i915_gem_object *cursor_bo;
Chris Wilsoncda4b7d2010-07-09 08:45:04 +0100176 uint32_t cursor_addr;
177 int16_t cursor_x, cursor_y;
178 int16_t cursor_width, cursor_height;
Chris Wilson6b383a72010-09-13 13:54:26 +0100179 bool cursor_visible;
Jesse Barnes5a354202011-06-24 12:19:22 -0700180 unsigned int bpp;
Jesse Barnes4b645f12011-10-12 09:51:31 -0700181
Jesse Barnesee7b9f92012-04-20 17:11:53 +0100182 /* We can share PLLs across outputs if the timings match */
183 struct intel_pch_pll *pch_pll;
Jesse Barnes79e53942008-11-07 14:24:08 -0800184};
185
Jesse Barnesb840d907f2011-12-13 13:19:38 -0800186struct intel_plane {
187 struct drm_plane base;
188 enum pipe pipe;
189 struct drm_i915_gem_object *obj;
Jesse Barnes175bd422011-12-13 13:19:39 -0800190 bool primary_disabled;
Jesse Barnesb840d907f2011-12-13 13:19:38 -0800191 int max_downscale;
192 u32 lut_r[1024], lut_g[1024], lut_b[1024];
193 void (*update_plane)(struct drm_plane *plane,
194 struct drm_framebuffer *fb,
195 struct drm_i915_gem_object *obj,
196 int crtc_x, int crtc_y,
197 unsigned int crtc_w, unsigned int crtc_h,
198 uint32_t x, uint32_t y,
199 uint32_t src_w, uint32_t src_h);
200 void (*disable_plane)(struct drm_plane *plane);
Jesse Barnes8ea30862012-01-03 08:05:39 -0800201 int (*update_colorkey)(struct drm_plane *plane,
202 struct drm_intel_sprite_colorkey *key);
203 void (*get_colorkey)(struct drm_plane *plane,
204 struct drm_intel_sprite_colorkey *key);
Jesse Barnesb840d907f2011-12-13 13:19:38 -0800205};
206
Eugeni Dodonovb445e3b2012-04-16 22:20:35 -0300207struct intel_watermark_params {
208 unsigned long fifo_size;
209 unsigned long max_wm;
210 unsigned long default_wm;
211 unsigned long guard_size;
212 unsigned long cacheline_size;
213};
214
215struct cxsr_latency {
216 int is_desktop;
217 int is_ddr3;
218 unsigned long fsb_freq;
219 unsigned long mem_freq;
220 unsigned long display_sr;
221 unsigned long display_hpll_disable;
222 unsigned long cursor_sr;
223 unsigned long cursor_hpll_disable;
224};
225
Jesse Barnes79e53942008-11-07 14:24:08 -0800226#define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
Zhenyu Wang5daa55e2010-03-30 14:39:28 +0800227#define to_intel_connector(x) container_of(x, struct intel_connector, base)
Chris Wilson4ef69c72010-09-09 15:14:28 +0100228#define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
Jesse Barnes79e53942008-11-07 14:24:08 -0800229#define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
Jesse Barnesb840d907f2011-12-13 13:19:38 -0800230#define to_intel_plane(x) container_of(x, struct intel_plane, base)
Jesse Barnes79e53942008-11-07 14:24:08 -0800231
Jesse Barnes45187ac2011-08-03 09:22:55 -0700232#define DIP_HEADER_SIZE 5
233
David Härdeman3c17fe42010-09-24 21:44:32 +0200234#define DIP_TYPE_AVI 0x82
235#define DIP_VERSION_AVI 0x2
236#define DIP_LEN_AVI 13
237
Jesse Barnes26005212011-09-22 11:16:01 +0530238#define DIP_TYPE_SPD 0x83
Jesse Barnesc0864cb2011-08-03 09:22:56 -0700239#define DIP_VERSION_SPD 0x1
240#define DIP_LEN_SPD 25
241#define DIP_SPD_UNKNOWN 0
242#define DIP_SPD_DSTB 0x1
243#define DIP_SPD_DVDP 0x2
244#define DIP_SPD_DVHS 0x3
245#define DIP_SPD_HDDVR 0x4
246#define DIP_SPD_DVC 0x5
247#define DIP_SPD_DSC 0x6
248#define DIP_SPD_VCD 0x7
249#define DIP_SPD_GAME 0x8
250#define DIP_SPD_PC 0x9
251#define DIP_SPD_BD 0xa
252#define DIP_SPD_SCD 0xb
253
David Härdeman3c17fe42010-09-24 21:44:32 +0200254struct dip_infoframe {
255 uint8_t type; /* HB0 */
256 uint8_t ver; /* HB1 */
257 uint8_t len; /* HB2 - body len, not including checksum */
258 uint8_t ecc; /* Header ECC */
259 uint8_t checksum; /* PB0 */
260 union {
261 struct {
262 /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
263 uint8_t Y_A_B_S;
264 /* PB2 - C 7:6, M 5:4, R 3:0 */
265 uint8_t C_M_R;
266 /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
267 uint8_t ITC_EC_Q_SC;
268 /* PB4 - VIC 6:0 */
269 uint8_t VIC;
270 /* PB5 - PR 3:0 */
271 uint8_t PR;
272 /* PB6 to PB13 */
273 uint16_t top_bar_end;
274 uint16_t bottom_bar_start;
275 uint16_t left_bar_end;
276 uint16_t right_bar_start;
277 } avi;
Jesse Barnesc0864cb2011-08-03 09:22:56 -0700278 struct {
279 uint8_t vn[8];
280 uint8_t pd[16];
281 uint8_t sdi;
282 } spd;
David Härdeman3c17fe42010-09-24 21:44:32 +0200283 uint8_t payload[27];
284 } __attribute__ ((packed)) body;
285} __attribute__((packed));
286
Chris Wilsonf875c152010-09-09 15:44:14 +0100287static inline struct drm_crtc *
288intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
289{
290 struct drm_i915_private *dev_priv = dev->dev_private;
291 return dev_priv->pipe_to_crtc_mapping[pipe];
292}
293
Chris Wilson417ae142011-01-19 15:04:42 +0000294static inline struct drm_crtc *
295intel_get_crtc_for_plane(struct drm_device *dev, int plane)
296{
297 struct drm_i915_private *dev_priv = dev->dev_private;
298 return dev_priv->plane_to_crtc_mapping[plane];
299}
300
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100301struct intel_unpin_work {
302 struct work_struct work;
303 struct drm_device *dev;
Chris Wilson05394f32010-11-08 19:18:58 +0000304 struct drm_i915_gem_object *old_fb_obj;
305 struct drm_i915_gem_object *pending_flip_obj;
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100306 struct drm_pending_vblank_event *event;
307 int pending;
308 bool enable_stall_check;
309};
310
Chris Wilson1630fe72011-07-08 12:22:42 +0100311struct intel_fbc_work {
312 struct delayed_work work;
313 struct drm_crtc *crtc;
314 struct drm_framebuffer *fb;
315 int interval;
316};
317
Zhenyu Wang335af9a2010-03-30 14:39:31 +0800318int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
Chris Wilsonf899fc62010-07-20 15:44:45 -0700319extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus);
Eric Anholtf0217c42009-12-01 11:56:30 -0800320
Chris Wilson3f43c482011-05-12 22:17:24 +0100321extern void intel_attach_force_audio_property(struct drm_connector *connector);
Chris Wilsone953fd72011-02-21 22:23:52 +0000322extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
323
Jesse Barnes79e53942008-11-07 14:24:08 -0800324extern void intel_crt_init(struct drm_device *dev);
Eric Anholt7d573822009-01-02 13:33:00 -0800325extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
David Härdeman3c17fe42010-09-24 21:44:32 +0200326void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
Daniel Vettereef4eac2012-03-23 23:43:35 +0100327extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
328 bool is_sdvob);
Jesse Barnes79e53942008-11-07 14:24:08 -0800329extern void intel_dvo_init(struct drm_device *dev);
330extern void intel_tv_init(struct drm_device *dev);
Chris Wilson05394f32010-11-08 19:18:58 +0000331extern void intel_mark_busy(struct drm_device *dev,
332 struct drm_i915_gem_object *obj);
Chris Wilsonc5d1b512010-11-29 18:00:23 +0000333extern bool intel_lvds_init(struct drm_device *dev);
Keith Packarda4fc5ed2009-04-07 16:16:42 -0700334extern void intel_dp_init(struct drm_device *dev, int dp_reg);
335void
336intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
337 struct drm_display_mode *adjusted_mode);
Adam Jacksoncb0953d2010-07-16 14:46:29 -0400338extern bool intel_dpd_is_edp(struct drm_device *dev);
Akshay Joshi0206e352011-08-16 15:34:10 -0400339extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
Jesse Barnes814948a2010-10-07 16:01:09 -0700340extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
Jesse Barnesb840d907f2011-12-13 13:19:38 -0800341extern int intel_plane_init(struct drm_device *dev, enum pipe pipe);
Eugeni Dodonov6f1d69b2012-04-18 15:29:25 -0300342extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
343 enum plane plane);
Zhenyu Wang32f9d652009-07-24 01:00:32 +0800344
Chris Wilsona9573552010-08-22 13:18:16 +0100345/* intel_panel.c */
Chris Wilson1d8e1c72010-08-07 11:01:28 +0100346extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
347 struct drm_display_mode *adjusted_mode);
348extern void intel_pch_panel_fitting(struct drm_device *dev,
349 int fitting_mode,
350 struct drm_display_mode *mode,
351 struct drm_display_mode *adjusted_mode);
Chris Wilsona9573552010-08-22 13:18:16 +0100352extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
353extern u32 intel_panel_get_backlight(struct drm_device *dev);
354extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200355extern int intel_panel_setup_backlight(struct drm_device *dev);
Chris Wilson47356eb2011-01-11 17:06:04 +0000356extern void intel_panel_enable_backlight(struct drm_device *dev);
357extern void intel_panel_disable_backlight(struct drm_device *dev);
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200358extern void intel_panel_destroy_backlight(struct drm_device *dev);
Chris Wilsonfe16d942011-02-12 10:29:38 +0000359extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
Chris Wilson1d8e1c72010-08-07 11:01:28 +0100360
Jesse Barnes79e53942008-11-07 14:24:08 -0800361extern void intel_crtc_load_lut(struct drm_crtc *crtc);
Akshay Joshi0206e352011-08-16 15:34:10 -0400362extern void intel_encoder_prepare(struct drm_encoder *encoder);
363extern void intel_encoder_commit(struct drm_encoder *encoder);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100364extern void intel_encoder_destroy(struct drm_encoder *encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -0800365
Chris Wilsondf0e9242010-09-09 16:20:55 +0100366static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
367{
368 return to_intel_connector(connector)->encoder;
369}
370
371extern void intel_connector_attach_encoder(struct intel_connector *connector,
372 struct intel_encoder *encoder);
373extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
Jesse Barnes79e53942008-11-07 14:24:08 -0800374
375extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
376 struct drm_crtc *crtc);
Carl Worth08d7b3d2009-04-29 14:43:54 -0700377int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
378 struct drm_file *file_priv);
Jesse Barnes9d0498a2010-08-18 13:20:54 -0700379extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
Chris Wilson58e10eb2010-10-03 10:56:11 +0100380extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
Chris Wilson8261b192011-04-19 23:18:09 +0100381
382struct intel_load_detect_pipe {
Chris Wilsond2dff872011-04-19 08:36:26 +0100383 struct drm_framebuffer *release_fb;
Chris Wilson8261b192011-04-19 23:18:09 +0100384 bool load_detect_temp;
385 int dpms_mode;
386};
Chris Wilson71731882011-04-19 23:10:58 +0100387extern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
388 struct drm_connector *connector,
389 struct drm_display_mode *mode,
Chris Wilson8261b192011-04-19 23:18:09 +0100390 struct intel_load_detect_pipe *old);
Eric Anholt21d40d32010-03-25 11:11:14 -0700391extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
Zhenyu Wangc1c43972010-03-30 14:39:30 +0800392 struct drm_connector *connector,
Chris Wilson8261b192011-04-19 23:18:09 +0100393 struct intel_load_detect_pipe *old);
Jesse Barnes79e53942008-11-07 14:24:08 -0800394
Jesse Barnes79e53942008-11-07 14:24:08 -0800395extern void intelfb_restore(void);
396extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
397 u16 blue, int regno);
Dave Airlieb8c00ac2009-10-06 13:54:01 +1000398extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
399 u16 *blue, int regno);
Chris Wilson0cdab212010-12-05 17:27:06 +0000400extern void intel_enable_clock_gating(struct drm_device *dev);
Eugeni Dodonov2b4e57b2012-04-18 15:29:23 -0300401extern void ironlake_disable_rc6(struct drm_device *dev);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800402extern void ironlake_enable_drps(struct drm_device *dev);
403extern void ironlake_disable_drps(struct drm_device *dev);
Jesse Barnes79e53942008-11-07 14:24:08 -0800404
Chris Wilson127bd2a2010-07-23 23:32:05 +0100405extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
Chris Wilson05394f32010-11-08 19:18:58 +0000406 struct drm_i915_gem_object *obj,
Chris Wilson919926a2010-11-12 13:42:53 +0000407 struct intel_ring_buffer *pipelined);
Chris Wilson1690e1e2011-12-14 13:57:08 +0100408extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
Chris Wilson127bd2a2010-07-23 23:32:05 +0100409
Dave Airlie38651672010-03-30 05:34:13 +0000410extern int intel_framebuffer_init(struct drm_device *dev,
411 struct intel_framebuffer *ifb,
Jesse Barnes308e5bc2011-11-14 14:51:28 -0800412 struct drm_mode_fb_cmd2 *mode_cmd,
Chris Wilson05394f32010-11-08 19:18:58 +0000413 struct drm_i915_gem_object *obj);
Dave Airlie38651672010-03-30 05:34:13 +0000414extern int intel_fbdev_init(struct drm_device *dev);
415extern void intel_fbdev_fini(struct drm_device *dev);
Dave Airlie3fa016a2012-03-28 10:48:49 +0100416extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
Kristian Høgsberg6b95a202009-11-18 11:25:18 -0500417extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
418extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
Jesse Barnes1afe3e92010-03-26 10:35:20 -0700419extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
Kristian Høgsberg6b95a202009-11-18 11:25:18 -0500420
Daniel Vetter02e792f2009-09-15 22:57:34 +0200421extern void intel_setup_overlay(struct drm_device *dev);
422extern void intel_cleanup_overlay(struct drm_device *dev);
Chris Wilsonce453d82011-02-21 14:43:56 +0000423extern int intel_overlay_switch_off(struct intel_overlay *overlay);
Daniel Vetter02e792f2009-09-15 22:57:34 +0200424extern int intel_overlay_put_image(struct drm_device *dev, void *data,
425 struct drm_file *file_priv);
426extern int intel_overlay_attrs(struct drm_device *dev, void *data,
427 struct drm_file *file_priv);
Dave Airlie4abe3522010-03-30 05:34:18 +0000428
Dave Airlieeb1f8e42010-05-07 06:42:51 +0000429extern void intel_fb_output_poll_changed(struct drm_device *dev);
Dave Airliee8e7a2b2011-04-21 22:18:32 +0100430extern void intel_fb_restore_mode(struct drm_device *dev);
Jesse Barnes645c62a2011-05-11 09:49:31 -0700431
Jesse Barnesb840d907f2011-12-13 13:19:38 -0800432extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
433 bool state);
434#define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
435#define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
436
Jesse Barnes645c62a2011-05-11 09:49:31 -0700437extern void intel_init_clock_gating(struct drm_device *dev);
Wu Fengguange0dac652011-09-05 14:25:34 +0800438extern void intel_write_eld(struct drm_encoder *encoder,
439 struct drm_display_mode *mode);
Jesse Barnesd4270e52011-10-11 10:43:02 -0700440extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
441
Jesse Barnesb840d907f2011-12-13 13:19:38 -0800442/* For use by IVB LP watermark workaround in intel_sprite.c */
Chris Wilsonf681fa22012-04-14 21:56:08 +0100443extern void intel_update_watermarks(struct drm_device *dev);
Jesse Barnesb840d907f2011-12-13 13:19:38 -0800444extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
445 uint32_t sprite_width,
446 int pixel_size);
Jesse Barnes8ea30862012-01-03 08:05:39 -0800447
448extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
449 struct drm_file *file_priv);
450extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
451 struct drm_file *file_priv);
452
Jesse Barnes57f350b2012-03-28 13:39:25 -0700453extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
454
Eugeni Dodonov85208be2012-04-16 22:20:34 -0300455/* Power-related functions, located in intel_pm.c */
Eugeni Dodonov1fa61102012-04-18 15:29:26 -0300456extern void intel_init_pm(struct drm_device *dev);
Eugeni Dodonov85208be2012-04-16 22:20:34 -0300457/* FBC */
Eugeni Dodonov85208be2012-04-16 22:20:34 -0300458extern bool intel_fbc_enabled(struct drm_device *dev);
459extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
460extern void intel_update_fbc(struct drm_device *dev);
Daniel Vettereb48eb02012-04-26 23:28:12 +0200461/* IPS */
462extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
463extern void intel_gpu_ips_teardown(void);
Eugeni Dodonov85208be2012-04-16 22:20:34 -0300464
Daniel Vetterb3daeae2012-04-26 23:28:13 +0200465extern void gen6_enable_rps(struct drm_i915_private *dev_priv);
466extern void gen6_update_ring_freq(struct drm_i915_private *dev_priv);
467extern void gen6_disable_rps(struct drm_device *dev);
468extern void intel_init_emon(struct drm_device *dev);
469
Jesse Barnes79e53942008-11-07 14:24:08 -0800470#endif /* __INTEL_DRV_H__ */