Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * The OPP code in function cpu0_set_target() is reused from |
| 5 | * drivers/cpufreq/omap-cpufreq.c |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 13 | |
| 14 | #include <linux/clk.h> |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 15 | #include <linux/cpufreq.h> |
| 16 | #include <linux/err.h> |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/of.h> |
| 19 | #include <linux/opp.h> |
Shawn Guo | 5553f9e | 2013-01-30 14:27:49 +0000 | [diff] [blame] | 20 | #include <linux/platform_device.h> |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 21 | #include <linux/regulator/consumer.h> |
| 22 | #include <linux/slab.h> |
| 23 | |
| 24 | static unsigned int transition_latency; |
| 25 | static unsigned int voltage_tolerance; /* in percentage */ |
| 26 | |
| 27 | static struct device *cpu_dev; |
| 28 | static struct clk *cpu_clk; |
| 29 | static struct regulator *cpu_reg; |
| 30 | static struct cpufreq_frequency_table *freq_table; |
| 31 | |
| 32 | static int cpu0_verify_speed(struct cpufreq_policy *policy) |
| 33 | { |
| 34 | return cpufreq_frequency_table_verify(policy, freq_table); |
| 35 | } |
| 36 | |
| 37 | static unsigned int cpu0_get_speed(unsigned int cpu) |
| 38 | { |
| 39 | return clk_get_rate(cpu_clk) / 1000; |
| 40 | } |
| 41 | |
| 42 | static int cpu0_set_target(struct cpufreq_policy *policy, |
| 43 | unsigned int target_freq, unsigned int relation) |
| 44 | { |
| 45 | struct cpufreq_freqs freqs; |
| 46 | struct opp *opp; |
jhbird.choi@samsung.com | 5df6055 | 2013-03-18 08:09:42 +0000 | [diff] [blame] | 47 | unsigned long volt = 0, volt_old = 0, tol = 0; |
| 48 | long freq_Hz; |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame^] | 49 | unsigned int index; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 50 | int ret; |
| 51 | |
| 52 | ret = cpufreq_frequency_table_target(policy, freq_table, target_freq, |
| 53 | relation, &index); |
| 54 | if (ret) { |
| 55 | pr_err("failed to match target freqency %d: %d\n", |
| 56 | target_freq, ret); |
| 57 | return ret; |
| 58 | } |
| 59 | |
| 60 | freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000); |
| 61 | if (freq_Hz < 0) |
| 62 | freq_Hz = freq_table[index].frequency * 1000; |
| 63 | freqs.new = freq_Hz / 1000; |
| 64 | freqs.old = clk_get_rate(cpu_clk) / 1000; |
| 65 | |
| 66 | if (freqs.old == freqs.new) |
| 67 | return 0; |
| 68 | |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame^] | 69 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 70 | |
| 71 | if (cpu_reg) { |
Nishanth Menon | 78e8eb8 | 2013-01-18 19:52:33 +0000 | [diff] [blame] | 72 | rcu_read_lock(); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 73 | opp = opp_find_freq_ceil(cpu_dev, &freq_Hz); |
| 74 | if (IS_ERR(opp)) { |
Nishanth Menon | 78e8eb8 | 2013-01-18 19:52:33 +0000 | [diff] [blame] | 75 | rcu_read_unlock(); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 76 | pr_err("failed to find OPP for %ld\n", freq_Hz); |
Viresh Kumar | fd143b4 | 2013-04-01 12:57:44 +0000 | [diff] [blame] | 77 | freqs.new = freqs.old; |
| 78 | ret = PTR_ERR(opp); |
| 79 | goto post_notify; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 80 | } |
| 81 | volt = opp_get_voltage(opp); |
Nishanth Menon | 78e8eb8 | 2013-01-18 19:52:33 +0000 | [diff] [blame] | 82 | rcu_read_unlock(); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 83 | tol = volt * voltage_tolerance / 100; |
| 84 | volt_old = regulator_get_voltage(cpu_reg); |
| 85 | } |
| 86 | |
| 87 | pr_debug("%u MHz, %ld mV --> %u MHz, %ld mV\n", |
| 88 | freqs.old / 1000, volt_old ? volt_old / 1000 : -1, |
| 89 | freqs.new / 1000, volt ? volt / 1000 : -1); |
| 90 | |
| 91 | /* scaling up? scale voltage before frequency */ |
| 92 | if (cpu_reg && freqs.new > freqs.old) { |
| 93 | ret = regulator_set_voltage_tol(cpu_reg, volt, tol); |
| 94 | if (ret) { |
| 95 | pr_err("failed to scale voltage up: %d\n", ret); |
| 96 | freqs.new = freqs.old; |
Viresh Kumar | fd143b4 | 2013-04-01 12:57:44 +0000 | [diff] [blame] | 97 | goto post_notify; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 98 | } |
| 99 | } |
| 100 | |
| 101 | ret = clk_set_rate(cpu_clk, freqs.new * 1000); |
| 102 | if (ret) { |
| 103 | pr_err("failed to set clock rate: %d\n", ret); |
| 104 | if (cpu_reg) |
| 105 | regulator_set_voltage_tol(cpu_reg, volt_old, tol); |
Viresh Kumar | fd143b4 | 2013-04-01 12:57:44 +0000 | [diff] [blame] | 106 | freqs.new = freqs.old; |
| 107 | goto post_notify; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 108 | } |
| 109 | |
| 110 | /* scaling down? scale voltage after frequency */ |
| 111 | if (cpu_reg && freqs.new < freqs.old) { |
| 112 | ret = regulator_set_voltage_tol(cpu_reg, volt, tol); |
| 113 | if (ret) { |
| 114 | pr_err("failed to scale voltage down: %d\n", ret); |
| 115 | clk_set_rate(cpu_clk, freqs.old * 1000); |
| 116 | freqs.new = freqs.old; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 117 | } |
| 118 | } |
| 119 | |
Viresh Kumar | fd143b4 | 2013-04-01 12:57:44 +0000 | [diff] [blame] | 120 | post_notify: |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame^] | 121 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 122 | |
Viresh Kumar | fd143b4 | 2013-04-01 12:57:44 +0000 | [diff] [blame] | 123 | return ret; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 124 | } |
| 125 | |
| 126 | static int cpu0_cpufreq_init(struct cpufreq_policy *policy) |
| 127 | { |
| 128 | int ret; |
| 129 | |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 130 | ret = cpufreq_frequency_table_cpuinfo(policy, freq_table); |
| 131 | if (ret) { |
| 132 | pr_err("invalid frequency table: %d\n", ret); |
| 133 | return ret; |
| 134 | } |
| 135 | |
| 136 | policy->cpuinfo.transition_latency = transition_latency; |
| 137 | policy->cur = clk_get_rate(cpu_clk) / 1000; |
| 138 | |
| 139 | /* |
| 140 | * The driver only supports the SMP configuartion where all processors |
| 141 | * share the clock and voltage and clock. Use cpufreq affected_cpus |
| 142 | * interface to have all CPUs scaled together. |
| 143 | */ |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 144 | cpumask_setall(policy->cpus); |
| 145 | |
| 146 | cpufreq_frequency_table_get_attr(freq_table, policy->cpu); |
| 147 | |
| 148 | return 0; |
| 149 | } |
| 150 | |
| 151 | static int cpu0_cpufreq_exit(struct cpufreq_policy *policy) |
| 152 | { |
| 153 | cpufreq_frequency_table_put_attr(policy->cpu); |
| 154 | |
| 155 | return 0; |
| 156 | } |
| 157 | |
| 158 | static struct freq_attr *cpu0_cpufreq_attr[] = { |
| 159 | &cpufreq_freq_attr_scaling_available_freqs, |
| 160 | NULL, |
| 161 | }; |
| 162 | |
| 163 | static struct cpufreq_driver cpu0_cpufreq_driver = { |
| 164 | .flags = CPUFREQ_STICKY, |
| 165 | .verify = cpu0_verify_speed, |
| 166 | .target = cpu0_set_target, |
| 167 | .get = cpu0_get_speed, |
| 168 | .init = cpu0_cpufreq_init, |
| 169 | .exit = cpu0_cpufreq_exit, |
| 170 | .name = "generic_cpu0", |
| 171 | .attr = cpu0_cpufreq_attr, |
| 172 | }; |
| 173 | |
Shawn Guo | 5553f9e | 2013-01-30 14:27:49 +0000 | [diff] [blame] | 174 | static int cpu0_cpufreq_probe(struct platform_device *pdev) |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 175 | { |
| 176 | struct device_node *np; |
| 177 | int ret; |
| 178 | |
Mark Langsdorf | 6754f55 | 2013-01-28 16:13:15 +0000 | [diff] [blame] | 179 | for_each_child_of_node(of_find_node_by_path("/cpus"), np) { |
| 180 | if (of_get_property(np, "operating-points", NULL)) |
| 181 | break; |
| 182 | } |
| 183 | |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 184 | if (!np) { |
| 185 | pr_err("failed to find cpu0 node\n"); |
| 186 | return -ENOENT; |
| 187 | } |
| 188 | |
Shawn Guo | 5553f9e | 2013-01-30 14:27:49 +0000 | [diff] [blame] | 189 | cpu_dev = &pdev->dev; |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 190 | cpu_dev->of_node = np; |
| 191 | |
Shawn Guo | 5553f9e | 2013-01-30 14:27:49 +0000 | [diff] [blame] | 192 | cpu_clk = devm_clk_get(cpu_dev, NULL); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 193 | if (IS_ERR(cpu_clk)) { |
| 194 | ret = PTR_ERR(cpu_clk); |
| 195 | pr_err("failed to get cpu0 clock: %d\n", ret); |
| 196 | goto out_put_node; |
| 197 | } |
| 198 | |
Shawn Guo | 5553f9e | 2013-01-30 14:27:49 +0000 | [diff] [blame] | 199 | cpu_reg = devm_regulator_get(cpu_dev, "cpu0"); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 200 | if (IS_ERR(cpu_reg)) { |
| 201 | pr_warn("failed to get cpu0 regulator\n"); |
| 202 | cpu_reg = NULL; |
| 203 | } |
| 204 | |
| 205 | ret = of_init_opp_table(cpu_dev); |
| 206 | if (ret) { |
| 207 | pr_err("failed to init OPP table: %d\n", ret); |
| 208 | goto out_put_node; |
| 209 | } |
| 210 | |
| 211 | ret = opp_init_cpufreq_table(cpu_dev, &freq_table); |
| 212 | if (ret) { |
| 213 | pr_err("failed to init cpufreq table: %d\n", ret); |
| 214 | goto out_put_node; |
| 215 | } |
| 216 | |
| 217 | of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance); |
| 218 | |
| 219 | if (of_property_read_u32(np, "clock-latency", &transition_latency)) |
| 220 | transition_latency = CPUFREQ_ETERNAL; |
| 221 | |
| 222 | if (cpu_reg) { |
| 223 | struct opp *opp; |
| 224 | unsigned long min_uV, max_uV; |
| 225 | int i; |
| 226 | |
| 227 | /* |
| 228 | * OPP is maintained in order of increasing frequency, and |
| 229 | * freq_table initialised from OPP is therefore sorted in the |
| 230 | * same order. |
| 231 | */ |
| 232 | for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) |
| 233 | ; |
Nishanth Menon | 78e8eb8 | 2013-01-18 19:52:33 +0000 | [diff] [blame] | 234 | rcu_read_lock(); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 235 | opp = opp_find_freq_exact(cpu_dev, |
| 236 | freq_table[0].frequency * 1000, true); |
| 237 | min_uV = opp_get_voltage(opp); |
| 238 | opp = opp_find_freq_exact(cpu_dev, |
| 239 | freq_table[i-1].frequency * 1000, true); |
| 240 | max_uV = opp_get_voltage(opp); |
Nishanth Menon | 78e8eb8 | 2013-01-18 19:52:33 +0000 | [diff] [blame] | 241 | rcu_read_unlock(); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 242 | ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV); |
| 243 | if (ret > 0) |
| 244 | transition_latency += ret * 1000; |
| 245 | } |
| 246 | |
| 247 | ret = cpufreq_register_driver(&cpu0_cpufreq_driver); |
| 248 | if (ret) { |
| 249 | pr_err("failed register driver: %d\n", ret); |
| 250 | goto out_free_table; |
| 251 | } |
| 252 | |
| 253 | of_node_put(np); |
| 254 | return 0; |
| 255 | |
| 256 | out_free_table: |
| 257 | opp_free_cpufreq_table(cpu_dev, &freq_table); |
| 258 | out_put_node: |
| 259 | of_node_put(np); |
| 260 | return ret; |
| 261 | } |
Shawn Guo | 5553f9e | 2013-01-30 14:27:49 +0000 | [diff] [blame] | 262 | |
| 263 | static int cpu0_cpufreq_remove(struct platform_device *pdev) |
| 264 | { |
| 265 | cpufreq_unregister_driver(&cpu0_cpufreq_driver); |
| 266 | opp_free_cpufreq_table(cpu_dev, &freq_table); |
| 267 | |
| 268 | return 0; |
| 269 | } |
| 270 | |
| 271 | static struct platform_driver cpu0_cpufreq_platdrv = { |
| 272 | .driver = { |
| 273 | .name = "cpufreq-cpu0", |
| 274 | .owner = THIS_MODULE, |
| 275 | }, |
| 276 | .probe = cpu0_cpufreq_probe, |
| 277 | .remove = cpu0_cpufreq_remove, |
| 278 | }; |
| 279 | module_platform_driver(cpu0_cpufreq_platdrv); |
Shawn Guo | 95ceafd | 2012-09-06 07:09:11 +0000 | [diff] [blame] | 280 | |
| 281 | MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>"); |
| 282 | MODULE_DESCRIPTION("Generic CPU0 cpufreq driver"); |
| 283 | MODULE_LICENSE("GPL"); |