Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1 | /* |
| 2 | * CXL Flash Device Driver |
| 3 | * |
| 4 | * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation |
| 5 | * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation |
| 6 | * |
| 7 | * Copyright (C) 2015 IBM Corporation |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License |
| 11 | * as published by the Free Software Foundation; either version |
| 12 | * 2 of the License, or (at your option) any later version. |
| 13 | */ |
| 14 | |
| 15 | #ifndef _CXLFLASH_COMMON_H |
| 16 | #define _CXLFLASH_COMMON_H |
| 17 | |
| 18 | #include <linux/list.h> |
Matthew R. Ochs | 0a27ae5 | 2015-10-21 15:11:52 -0500 | [diff] [blame] | 19 | #include <linux/rwsem.h> |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 20 | #include <linux/types.h> |
| 21 | #include <scsi/scsi.h> |
| 22 | #include <scsi/scsi_device.h> |
| 23 | |
Matthew R. Ochs | 17ead26 | 2015-10-21 15:15:37 -0500 | [diff] [blame] | 24 | extern const struct file_operations cxlflash_cxl_fops; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 25 | |
| 26 | #define MAX_CONTEXT CXLFLASH_MAX_CONTEXT /* num contexts per afu */ |
| 27 | |
| 28 | #define CXLFLASH_BLOCK_SIZE 4096 /* 4K blocks */ |
| 29 | #define CXLFLASH_MAX_XFER_SIZE 16777216 /* 16MB transfer */ |
| 30 | #define CXLFLASH_MAX_SECTORS (CXLFLASH_MAX_XFER_SIZE/512) /* SCSI wants |
| 31 | max_sectors |
| 32 | in units of |
| 33 | 512 byte |
| 34 | sectors |
| 35 | */ |
| 36 | |
| 37 | #define NUM_RRQ_ENTRY 16 /* for master issued cmds */ |
| 38 | #define MAX_RHT_PER_CONTEXT (PAGE_SIZE / sizeof(struct sisl_rht_entry)) |
| 39 | |
| 40 | /* AFU command retry limit */ |
| 41 | #define MC_RETRY_CNT 5 /* sufficient for SCSI check and |
| 42 | certain AFU errors */ |
| 43 | |
| 44 | /* Command management definitions */ |
| 45 | #define CXLFLASH_NUM_CMDS (2 * CXLFLASH_MAX_CMDS) /* Must be a pow2 for |
| 46 | alignment and more |
| 47 | efficient array |
| 48 | index derivation |
| 49 | */ |
| 50 | |
| 51 | #define CXLFLASH_MAX_CMDS 16 |
| 52 | #define CXLFLASH_MAX_CMDS_PER_LUN CXLFLASH_MAX_CMDS |
| 53 | |
| 54 | |
| 55 | static inline void check_sizes(void) |
| 56 | { |
| 57 | BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_NUM_CMDS); |
| 58 | } |
| 59 | |
| 60 | /* AFU defines a fixed size of 4K for command buffers (borrow 4K page define) */ |
| 61 | #define CMD_BUFSIZE SIZE_4K |
| 62 | |
| 63 | /* flags in IOA status area for host use */ |
| 64 | #define B_DONE 0x01 |
| 65 | #define B_ERROR 0x02 /* set with B_DONE */ |
| 66 | #define B_TIMEOUT 0x04 /* set with B_DONE & B_ERROR */ |
| 67 | |
| 68 | enum cxlflash_lr_state { |
| 69 | LINK_RESET_INVALID, |
| 70 | LINK_RESET_REQUIRED, |
| 71 | LINK_RESET_COMPLETE |
| 72 | }; |
| 73 | |
| 74 | enum cxlflash_init_state { |
| 75 | INIT_STATE_NONE, |
| 76 | INIT_STATE_PCI, |
| 77 | INIT_STATE_AFU, |
| 78 | INIT_STATE_SCSI |
| 79 | }; |
| 80 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 81 | enum cxlflash_state { |
| 82 | STATE_NORMAL, /* Normal running state, everything good */ |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 83 | STATE_RESET, /* Reset state, trying to reset/recover */ |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 84 | STATE_FAILTERM /* Failed/terminating state, error out users/threads */ |
| 85 | }; |
| 86 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 87 | /* |
| 88 | * Each context has its own set of resource handles that is visible |
| 89 | * only from that context. |
| 90 | */ |
| 91 | |
| 92 | struct cxlflash_cfg { |
| 93 | struct afu *afu; |
| 94 | struct cxl_context *mcctx; |
| 95 | |
| 96 | struct pci_dev *dev; |
| 97 | struct pci_device_id *dev_id; |
| 98 | struct Scsi_Host *host; |
| 99 | |
| 100 | ulong cxlflash_regs_pci; |
| 101 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 102 | struct work_struct work_q; |
| 103 | enum cxlflash_init_state init_state; |
| 104 | enum cxlflash_lr_state lr_state; |
| 105 | int lr_port; |
Matthew R. Ochs | ef51074 | 2015-10-21 15:13:37 -0500 | [diff] [blame] | 106 | atomic_t scan_host_needed; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 107 | |
| 108 | struct cxl_afu *cxl_afu; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 109 | struct pci_dev *parent_dev; |
| 110 | |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 111 | atomic_t recovery_threads; |
| 112 | struct mutex ctx_recovery_mutex; |
| 113 | struct mutex ctx_tbl_list_mutex; |
Matthew R. Ochs | 0a27ae5 | 2015-10-21 15:11:52 -0500 | [diff] [blame] | 114 | struct rw_semaphore ioctl_rwsem; |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 115 | struct ctx_info *ctx_tbl[MAX_CONTEXT]; |
| 116 | struct list_head ctx_err_recovery; /* contexts w/ recovery pending */ |
| 117 | struct file_operations cxl_fops; |
| 118 | |
Matthew R. Ochs | 2cb7926 | 2015-08-13 21:47:53 -0500 | [diff] [blame] | 119 | /* Parameters that are LUN table related */ |
| 120 | int last_lun_index[CXLFLASH_NUM_FC_PORTS]; |
| 121 | int promote_lun_index; |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 122 | struct list_head lluns; /* list of llun_info structs */ |
| 123 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 124 | wait_queue_head_t tmf_waitq; |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 125 | spinlock_t tmf_slock; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 126 | bool tmf_active; |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 127 | wait_queue_head_t reset_waitq; |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 128 | enum cxlflash_state state; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 129 | }; |
| 130 | |
| 131 | struct afu_cmd { |
| 132 | struct sisl_ioarcb rcb; /* IOARCB (cache line aligned) */ |
| 133 | struct sisl_ioasa sa; /* IOASA must follow IOARCB */ |
| 134 | spinlock_t slock; |
| 135 | struct completion cevent; |
| 136 | char *buf; /* per command buffer */ |
| 137 | struct afu *parent; |
| 138 | int slot; |
| 139 | atomic_t free; |
| 140 | |
| 141 | u8 cmd_tmf:1; |
| 142 | |
| 143 | /* As per the SISLITE spec the IOARCB EA has to be 16-byte aligned. |
| 144 | * However for performance reasons the IOARCB/IOASA should be |
| 145 | * cache line aligned. |
| 146 | */ |
| 147 | } __aligned(cache_line_size()); |
| 148 | |
| 149 | struct afu { |
| 150 | /* Stuff requiring alignment go first. */ |
| 151 | |
| 152 | u64 rrq_entry[NUM_RRQ_ENTRY]; /* 128B RRQ */ |
| 153 | /* |
| 154 | * Command & data for AFU commands. |
| 155 | */ |
| 156 | struct afu_cmd cmd[CXLFLASH_NUM_CMDS]; |
| 157 | |
| 158 | /* Beware of alignment till here. Preferably introduce new |
| 159 | * fields after this point |
| 160 | */ |
| 161 | |
| 162 | /* AFU HW */ |
| 163 | struct cxl_ioctl_start_work work; |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 164 | struct cxlflash_afu_map __iomem *afu_map; /* entire MMIO map */ |
| 165 | struct sisl_host_map __iomem *host_map; /* MC host map */ |
| 166 | struct sisl_ctrl_map __iomem *ctrl_map; /* MC control map */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 167 | |
Manoj Kumar | b45cdbaf | 2015-12-14 15:07:23 -0600 | [diff] [blame^] | 168 | struct kref mapcount; |
| 169 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 170 | ctx_hndl_t ctx_hndl; /* master's context handle */ |
| 171 | u64 *hrrq_start; |
| 172 | u64 *hrrq_end; |
| 173 | u64 *hrrq_curr; |
| 174 | bool toggle; |
| 175 | bool read_room; |
| 176 | atomic64_t room; |
| 177 | u64 hb; |
| 178 | u32 cmd_couts; /* Number of command checkouts */ |
| 179 | u32 internal_lun; /* User-desired LUN mode for this AFU */ |
| 180 | |
Matthew R. Ochs | e5ce067 | 2015-10-21 15:14:01 -0500 | [diff] [blame] | 181 | char version[16]; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 182 | u64 interface_version; |
| 183 | |
| 184 | struct cxlflash_cfg *parent; /* Pointer back to parent cxlflash_cfg */ |
| 185 | |
| 186 | }; |
| 187 | |
| 188 | static inline u64 lun_to_lunid(u64 lun) |
| 189 | { |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 190 | __be64 lun_id; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 191 | |
| 192 | int_to_scsilun(lun, (struct scsi_lun *)&lun_id); |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 193 | return be64_to_cpu(lun_id); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 194 | } |
| 195 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 196 | int cxlflash_afu_sync(struct afu *, ctx_hndl_t, res_hndl_t, u8); |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 197 | void cxlflash_list_init(void); |
| 198 | void cxlflash_term_global_luns(void); |
| 199 | void cxlflash_free_errpage(void); |
| 200 | int cxlflash_ioctl(struct scsi_device *, int, void __user *); |
| 201 | void cxlflash_stop_term_user_contexts(struct cxlflash_cfg *); |
| 202 | int cxlflash_mark_contexts_error(struct cxlflash_cfg *); |
| 203 | void cxlflash_term_local_luns(struct cxlflash_cfg *); |
Matthew R. Ochs | 2cb7926 | 2015-08-13 21:47:53 -0500 | [diff] [blame] | 204 | void cxlflash_restore_luntable(struct cxlflash_cfg *); |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 205 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 206 | #endif /* ifndef _CXLFLASH_COMMON_H */ |