Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Copyright (C) 1999 by Ralf Baechle |
| 7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. |
| 8 | */ |
| 9 | #ifndef _ASM_SERIAL_H |
| 10 | #define _ASM_SERIAL_H |
| 11 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | |
| 13 | /* |
| 14 | * This assumes you have a 1.8432 MHz clock for your UART. |
| 15 | * |
| 16 | * It'd be nice if someone built a serial card with a 24.576 MHz |
| 17 | * clock, since the 16550A is capable of handling a top speed of 1.5 |
| 18 | * megabits/second; but this requires the faster clock. |
| 19 | */ |
| 20 | #define BASE_BAUD (1843200 / 16) |
| 21 | |
| 22 | /* Standard COM flags (except for COM4, because of the 8514 problem) */ |
| 23 | #ifdef CONFIG_SERIAL_DETECT_IRQ |
| 24 | #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ) |
| 25 | #define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ) |
| 26 | #else |
| 27 | #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) |
| 28 | #define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF |
| 29 | #endif |
| 30 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | #ifdef CONFIG_MACH_JAZZ |
| 32 | #include <asm/jazz.h> |
| 33 | |
| 34 | #ifndef CONFIG_OLIVETTI_M700 |
| 35 | /* Some Jazz machines seem to have an 8MHz crystal clock but I don't know |
| 36 | exactly which ones ... XXX */ |
| 37 | #define JAZZ_BASE_BAUD ( 8000000 / 16 ) /* ( 3072000 / 16) */ |
| 38 | #else |
| 39 | /* but the M700 isn't such a strange beast */ |
| 40 | #define JAZZ_BASE_BAUD BASE_BAUD |
| 41 | #endif |
| 42 | |
| 43 | #define _JAZZ_SERIAL_INIT(int, base) \ |
| 44 | { .baud_base = JAZZ_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \ |
| 45 | .iomem_base = (u8 *) base, .iomem_reg_shift = 0, \ |
| 46 | .io_type = SERIAL_IO_MEM } |
| 47 | #define JAZZ_SERIAL_PORT_DEFNS \ |
| 48 | _JAZZ_SERIAL_INIT(JAZZ_SERIAL1_IRQ, JAZZ_SERIAL1_BASE), \ |
| 49 | _JAZZ_SERIAL_INIT(JAZZ_SERIAL2_IRQ, JAZZ_SERIAL2_BASE), |
| 50 | #else |
| 51 | #define JAZZ_SERIAL_PORT_DEFNS |
| 52 | #endif |
| 53 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | /* |
Ralf Baechle | d48f1de | 2006-09-20 20:56:02 +0100 | [diff] [blame] | 55 | * Galileo EV64120 evaluation board |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 56 | */ |
Ralf Baechle | d48f1de | 2006-09-20 20:56:02 +0100 | [diff] [blame] | 57 | #ifdef CONFIG_MIPS_EV64120 |
Yoichi Yuasa | b772da3 | 2006-10-01 19:43:27 +0900 | [diff] [blame^] | 58 | #include <mach-gt64120.h> |
| 59 | #define EV64120_SERIAL_PORT_DEFNS \ |
| 60 | { .baud_base = EV64120_BASE_BAUD, .irq = EV64120_UART_IRQ, \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | .flags = STD_COM_FLAGS, \ |
Yoichi Yuasa | b772da3 | 2006-10-01 19:43:27 +0900 | [diff] [blame^] | 62 | .iomem_base = EV64120_UART0_REGS_BASE, .iomem_reg_shift = 2, \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | .io_type = SERIAL_IO_MEM }, \ |
Yoichi Yuasa | b772da3 | 2006-10-01 19:43:27 +0900 | [diff] [blame^] | 64 | { .baud_base = EV64120_BASE_BAUD, .irq = EV64120_UART_IRQ, \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 65 | .flags = STD_COM_FLAGS, \ |
Yoichi Yuasa | b772da3 | 2006-10-01 19:43:27 +0900 | [diff] [blame^] | 66 | .iomem_base = EV64120_UART1_REGS_BASE, .iomem_reg_shift = 2, \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | .io_type = SERIAL_IO_MEM }, |
| 68 | #else |
Yoichi Yuasa | b772da3 | 2006-10-01 19:43:27 +0900 | [diff] [blame^] | 69 | #define EV64120_SERIAL_PORT_DEFNS |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | #endif |
| 71 | |
| 72 | #ifdef CONFIG_MIPS_ITE8172 |
| 73 | #include <asm/it8172/it8172.h> |
| 74 | #include <asm/it8172/it8172_int.h> |
| 75 | #include <asm/it8712.h> |
| 76 | #define ITE_SERIAL_PORT_DEFNS \ |
| 77 | { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \ |
Ralf Baechle | ac2384a | 2006-04-02 13:48:57 +0100 | [diff] [blame] | 78 | .irq = IT8172_UART_IRQ, .flags = STD_COM_FLAGS, .port = PORT_16550 }, \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | { .baud_base = (24000000/(16*13)), .port = (IT8172_PCI_IO_BASE + IT8712_UART1_PORT), \ |
Ralf Baechle | ac2384a | 2006-04-02 13:48:57 +0100 | [diff] [blame] | 80 | .irq = IT8172_SERIRQ_4, .flags = STD_COM_FLAGS, .port = PORT_16550 }, \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 81 | /* Smart Card Reader 0 */ \ |
| 82 | { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR0_BASE), \ |
Ralf Baechle | ac2384a | 2006-04-02 13:48:57 +0100 | [diff] [blame] | 83 | .irq = IT8172_SCR0_IRQ, .flags = STD_COM_FLAGS, .port = PORT_16550 }, \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 84 | /* Smart Card Reader 1 */ \ |
| 85 | { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \ |
Ralf Baechle | ac2384a | 2006-04-02 13:48:57 +0100 | [diff] [blame] | 86 | .irq = IT8172_SCR1_IRQ, .flags = STD_COM_FLAGS, .port = PORT_16550 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 87 | #else |
| 88 | #define ITE_SERIAL_PORT_DEFNS |
| 89 | #endif |
| 90 | |
| 91 | #ifdef CONFIG_MIPS_IVR |
| 92 | #include <asm/it8172/it8172.h> |
| 93 | #include <asm/it8172/it8172_int.h> |
| 94 | #define IVR_SERIAL_PORT_DEFNS \ |
| 95 | { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \ |
Ralf Baechle | ac2384a | 2006-04-02 13:48:57 +0100 | [diff] [blame] | 96 | .irq = IT8172_UART_IRQ, .flags = STD_COM_FLAGS, .port = PORT_16550 }, \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | /* Smart Card Reader 1 */ \ |
| 98 | { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \ |
Ralf Baechle | ac2384a | 2006-04-02 13:48:57 +0100 | [diff] [blame] | 99 | .irq = IT8172_SCR1_IRQ, .flags = STD_COM_FLAGS, .port = PORT_16550 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 100 | #else |
| 101 | #define IVR_SERIAL_PORT_DEFNS |
| 102 | #endif |
| 103 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 104 | #ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT |
| 105 | #define STD_SERIAL_PORT_DEFNS \ |
| 106 | /* UART CLK PORT IRQ FLAGS */ \ |
| 107 | { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ |
| 108 | { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \ |
| 109 | { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \ |
| 110 | { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */ |
| 111 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 112 | #else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */ |
| 113 | #define STD_SERIAL_PORT_DEFNS |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 114 | #endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */ |
| 115 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 116 | #ifdef CONFIG_MOMENCO_JAGUAR_ATX |
| 117 | /* Ordinary NS16552 duart with a 20MHz crystal. */ |
| 118 | #define JAGUAR_ATX_UART_CLK 20000000 |
| 119 | #define JAGUAR_ATX_BASE_BAUD (JAGUAR_ATX_UART_CLK / 16) |
| 120 | |
| 121 | #define JAGUAR_ATX_SERIAL1_IRQ 6 |
| 122 | #define JAGUAR_ATX_SERIAL1_BASE 0xfd000023L |
| 123 | |
| 124 | #define _JAGUAR_ATX_SERIAL_INIT(int, base) \ |
Ralf Baechle | 0f04afb | 2005-03-01 10:38:58 +0000 | [diff] [blame] | 125 | { .baud_base = JAGUAR_ATX_BASE_BAUD, irq: int, \ |
| 126 | .flags = (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ |
| 127 | .iomem_base = (u8 *) base, iomem_reg_shift: 2, \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 128 | io_type: SERIAL_IO_MEM } |
| 129 | #define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS \ |
| 130 | _JAGUAR_ATX_SERIAL_INIT(JAGUAR_ATX_SERIAL1_IRQ, JAGUAR_ATX_SERIAL1_BASE) |
| 131 | #else |
| 132 | #define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS |
| 133 | #endif |
| 134 | |
| 135 | #ifdef CONFIG_MOMENCO_OCELOT_3 |
| 136 | #define OCELOT_3_BASE_BAUD ( 20000000 / 16 ) |
| 137 | #define OCELOT_3_SERIAL_IRQ 6 |
| 138 | #define OCELOT_3_SERIAL_BASE (signed)0xfd000020 |
| 139 | |
| 140 | #define _OCELOT_3_SERIAL_INIT(int, base) \ |
Ralf Baechle | 0f04afb | 2005-03-01 10:38:58 +0000 | [diff] [blame] | 141 | { .baud_base = OCELOT_3_BASE_BAUD, irq: int, \ |
| 142 | .flags = STD_COM_FLAGS, \ |
| 143 | .iomem_base = (u8 *) base, iomem_reg_shift: 2, \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | io_type: SERIAL_IO_MEM } |
| 145 | |
| 146 | #define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \ |
| 147 | _OCELOT_3_SERIAL_INIT(OCELOT_3_SERIAL_IRQ, OCELOT_3_SERIAL_BASE) |
| 148 | #else |
| 149 | #define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS |
| 150 | #endif |
| 151 | |
| 152 | #ifdef CONFIG_MOMENCO_OCELOT |
| 153 | /* Ordinary NS16552 duart with a 20MHz crystal. */ |
| 154 | #define OCELOT_BASE_BAUD ( 20000000 / 16 ) |
| 155 | |
| 156 | #define OCELOT_SERIAL1_IRQ 4 |
| 157 | #define OCELOT_SERIAL1_BASE 0xe0001020 |
| 158 | |
| 159 | #define _OCELOT_SERIAL_INIT(int, base) \ |
| 160 | { .baud_base = OCELOT_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \ |
| 161 | .iomem_base = (u8 *) base, .iomem_reg_shift = 2, \ |
| 162 | .io_type = SERIAL_IO_MEM } |
| 163 | #define MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ |
| 164 | _OCELOT_SERIAL_INIT(OCELOT_SERIAL1_IRQ, OCELOT_SERIAL1_BASE) |
| 165 | #else |
| 166 | #define MOMENCO_OCELOT_SERIAL_PORT_DEFNS |
| 167 | #endif |
| 168 | |
| 169 | #ifdef CONFIG_MOMENCO_OCELOT_G |
| 170 | /* Ordinary NS16552 duart with a 20MHz crystal. */ |
| 171 | #define OCELOT_G_BASE_BAUD ( 20000000 / 16 ) |
| 172 | |
| 173 | #define OCELOT_G_SERIAL1_IRQ 4 |
| 174 | #if 0 |
| 175 | #define OCELOT_G_SERIAL1_BASE 0xe0001020 |
| 176 | #else |
| 177 | #define OCELOT_G_SERIAL1_BASE 0xfd000020 |
| 178 | #endif |
| 179 | |
| 180 | #define _OCELOT_G_SERIAL_INIT(int, base) \ |
| 181 | { .baud_base = OCELOT_G_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS,\ |
| 182 | .iomem_base = (u8 *) base, .iomem_reg_shift = 2, \ |
| 183 | .io_type = SERIAL_IO_MEM } |
| 184 | #define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \ |
| 185 | _OCELOT_G_SERIAL_INIT(OCELOT_G_SERIAL1_IRQ, OCELOT_G_SERIAL1_BASE) |
| 186 | #else |
| 187 | #define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS |
| 188 | #endif |
| 189 | |
| 190 | #ifdef CONFIG_MOMENCO_OCELOT_C |
| 191 | /* Ordinary NS16552 duart with a 20MHz crystal. */ |
| 192 | #define OCELOT_C_BASE_BAUD ( 20000000 / 16 ) |
| 193 | |
| 194 | #define OCELOT_C_SERIAL1_IRQ 80 |
| 195 | #define OCELOT_C_SERIAL1_BASE 0xfd000020 |
| 196 | |
| 197 | #define OCELOT_C_SERIAL2_IRQ 81 |
| 198 | #define OCELOT_C_SERIAL2_BASE 0xfd000000 |
| 199 | |
| 200 | #define _OCELOT_C_SERIAL_INIT(int, base) \ |
| 201 | { .baud_base = OCELOT_C_BASE_BAUD, \ |
| 202 | .irq = (int), \ |
| 203 | .flags = STD_COM_FLAGS, \ |
| 204 | .iomem_base = (u8 *) base, \ |
| 205 | .iomem_reg_shift = 2, \ |
| 206 | .io_type = SERIAL_IO_MEM \ |
| 207 | } |
| 208 | #define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ |
| 209 | _OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL1_IRQ, OCELOT_C_SERIAL1_BASE), \ |
| 210 | _OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL2_IRQ, OCELOT_C_SERIAL2_BASE) |
| 211 | #else |
| 212 | #define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS |
| 213 | #endif |
| 214 | |
| 215 | #ifdef CONFIG_DDB5477 |
| 216 | #include <asm/ddb5xxx/ddb5477.h> |
| 217 | #define DDB5477_SERIAL_PORT_DEFNS \ |
| 218 | { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART0, \ |
| 219 | .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04200, \ |
| 220 | .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM}, \ |
| 221 | { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART1, \ |
| 222 | .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04240, \ |
| 223 | .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM}, |
| 224 | #else |
| 225 | #define DDB5477_SERIAL_PORT_DEFNS |
| 226 | #endif |
| 227 | |
| 228 | #ifdef CONFIG_SGI_IP32 |
| 229 | /* |
| 230 | * The IP32 (SGI O2) has standard serial ports (UART 16550A) mapped in memory |
| 231 | * They are initialized in ip32_setup |
| 232 | */ |
| 233 | #define IP32_SERIAL_PORT_DEFNS \ |
| 234 | {},{}, |
| 235 | #else |
| 236 | #define IP32_SERIAL_PORT_DEFNS |
| 237 | #endif /* CONFIG_SGI_IP32 */ |
| 238 | |
| 239 | #define SERIAL_PORT_DFNS \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 240 | DDB5477_SERIAL_PORT_DEFNS \ |
Yoichi Yuasa | b772da3 | 2006-10-01 19:43:27 +0900 | [diff] [blame^] | 241 | EV64120_SERIAL_PORT_DEFNS \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 242 | IP32_SERIAL_PORT_DEFNS \ |
| 243 | ITE_SERIAL_PORT_DEFNS \ |
| 244 | IVR_SERIAL_PORT_DEFNS \ |
| 245 | JAZZ_SERIAL_PORT_DEFNS \ |
| 246 | STD_SERIAL_PORT_DEFNS \ |
| 247 | MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \ |
| 248 | MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ |
| 249 | MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ |
Ralf Baechle | 335bd9d | 2006-03-26 21:25:57 +0100 | [diff] [blame] | 250 | MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 251 | |
| 252 | #endif /* _ASM_SERIAL_H */ |