| Kukjin Kim | b7db51b | 2010-01-14 08:14:40 +0900 | [diff] [blame^] | 1 | /* arch/arm/plat-s5p/irq.c |
| 2 | * |
| 3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. |
| 4 | * http://www.samsung.com/ |
| 5 | * |
| 6 | * S5P - Interrupt handling |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/irq.h> |
| 16 | #include <linux/io.h> |
| 17 | |
| 18 | #include <asm/hardware/vic.h> |
| 19 | |
| 20 | #include <linux/serial_core.h> |
| 21 | #include <mach/map.h> |
| 22 | #include <plat/regs-timer.h> |
| 23 | #include <plat/regs-serial.h> |
| 24 | #include <plat/cpu.h> |
| 25 | #include <plat/irq-vic-timer.h> |
| 26 | #include <plat/irq-uart.h> |
| 27 | |
| 28 | #define VIC_VAADDR(no) (S5P_VA_VIC0 + ((no)*0x10000)) |
| 29 | #define VIC_BASE(no) (S5P_VIC0_BASE + ((no)*32)) |
| 30 | |
| 31 | /* |
| 32 | * Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3] |
| 33 | * are consecutive when looking up the interrupt in the demux routines. |
| 34 | */ |
| 35 | static struct s3c_uart_irq uart_irqs[] = { |
| 36 | [0] = { |
| 37 | .regs = S5P_VA_UART0, |
| 38 | .base_irq = IRQ_S5P_UART_BASE0, |
| 39 | .parent_irq = IRQ_UART0, |
| 40 | }, |
| 41 | [1] = { |
| 42 | .regs = S5P_VA_UART1, |
| 43 | .base_irq = IRQ_S5P_UART_BASE1, |
| 44 | .parent_irq = IRQ_UART1, |
| 45 | }, |
| 46 | [2] = { |
| 47 | .regs = S5P_VA_UART2, |
| 48 | .base_irq = IRQ_S5P_UART_BASE2, |
| 49 | .parent_irq = IRQ_UART2, |
| 50 | }, |
| 51 | [3] = { |
| 52 | .regs = S5P_VA_UART3, |
| 53 | .base_irq = IRQ_S5P_UART_BASE3, |
| 54 | .parent_irq = IRQ_UART3, |
| 55 | }, |
| 56 | }; |
| 57 | |
| 58 | void __init s5p_init_irq(u32 *vic, u32 num_vic) |
| 59 | { |
| 60 | int irq; |
| 61 | |
| 62 | /* initialize the VICs */ |
| 63 | for (irq = 0; irq < num_vic; irq++) |
| 64 | vic_init(VIC_VAADDR(irq), VIC_BASE(irq), vic[irq], 0); |
| 65 | |
| 66 | s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0); |
| 67 | s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1); |
| 68 | s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2); |
| 69 | s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3); |
| 70 | s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4); |
| 71 | |
| 72 | s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs)); |
| 73 | } |