blob: 6fe0dd1d3541361538bf9c6f1d52ff99f46ac655 [file] [log] [blame]
Linus Walleij4980f9b2012-09-06 09:08:24 +01001/*
2 * SoC core Device Tree for the ARM Integrator platforms
3 */
4
5/include/ "skeleton.dtsi"
6
7/ {
Linus Walleijbb4dbef2013-06-16 02:44:27 +02008 core-module@10000000 {
Linus Walleij480aa742015-03-03 10:06:16 +01009 compatible = "arm,core-module-integrator", "syscon", "simple-mfd";
Linus Walleijbb4dbef2013-06-16 02:44:27 +020010 reg = <0x10000000 0x200>;
Linus Walleijbcc397d2014-10-22 10:05:44 +020011
12 /* Use core module LED to indicate CPU load */
13 led@0c.0 {
14 compatible = "register-bit-led";
15 offset = <0x0c>;
16 mask = <0x01>;
17 label = "integrator:core_module";
18 linux,default-trigger = "cpu0";
19 default-state = "on";
20 };
Linus Walleijbb4dbef2013-06-16 02:44:27 +020021 };
22
Linus Walleij307b9662013-06-17 23:58:25 +020023 ebi@12000000 {
24 compatible = "arm,external-bus-interface";
25 reg = <0x12000000 0x100>;
26 };
27
Linus Walleij4980f9b2012-09-06 09:08:24 +010028 timer@13000000 {
29 reg = <0x13000000 0x100>;
30 interrupt-parent = <&pic>;
31 interrupts = <5>;
32 };
33
34 timer@13000100 {
35 reg = <0x13000100 0x100>;
36 interrupt-parent = <&pic>;
37 interrupts = <6>;
38 };
39
40 timer@13000200 {
41 reg = <0x13000200 0x100>;
42 interrupt-parent = <&pic>;
43 interrupts = <7>;
44 };
45
46 pic@14000000 {
47 compatible = "arm,versatile-fpga-irq";
48 #interrupt-cells = <1>;
49 interrupt-controller;
50 reg = <0x14000000 0x100>;
51 clear-mask = <0xffffffff>;
52 };
Linus Walleij4672cdd2012-09-06 09:08:47 +010053
Linus Walleij73efd532012-09-06 09:09:11 +010054 flash@24000000 {
Linus Walleij91011a72016-01-26 11:09:22 +010055 compatible = "arm,versatile-flash", "cfi-flash";
Linus Walleij73efd532012-09-06 09:09:11 +010056 reg = <0x24000000 0x02000000>;
Linus Walleij91011a72016-01-26 11:09:22 +010057 bank-width = <4>;
Linus Walleij73efd532012-09-06 09:09:11 +010058 };
59
Linus Walleij4672cdd2012-09-06 09:08:47 +010060 fpga {
Masahiro Yamada2ef7d5f2016-03-09 13:26:45 +090061 compatible = "simple-bus";
Linus Walleij4672cdd2012-09-06 09:08:47 +010062 #address-cells = <1>;
63 #size-cells = <1>;
64 ranges;
65 interrupt-parent = <&pic>;
66
67 /*
68 * These PrimeCells are in the same locations and using the
69 * same interrupts in all Integrators, however the silicon
70 * version deployed is different.
71 */
72 rtc@15000000 {
73 reg = <0x15000000 0x1000>;
74 interrupts = <8>;
75 };
76
77 uart@16000000 {
78 reg = <0x16000000 0x1000>;
79 interrupts = <1>;
80 };
81
82 uart@17000000 {
83 reg = <0x17000000 0x1000>;
84 interrupts = <2>;
85 };
86
87 kmi@18000000 {
88 reg = <0x18000000 0x1000>;
89 interrupts = <3>;
90 };
91
92 kmi@19000000 {
93 reg = <0x19000000 0x1000>;
94 interrupts = <4>;
95 };
Linus Walleij7e610062014-10-15 17:33:13 +020096
97 syscon {
98 /* Debug registers mapped as syscon */
Linus Walleij480aa742015-03-03 10:06:16 +010099 compatible = "syscon", "simple-mfd";
Linus Walleij7e610062014-10-15 17:33:13 +0200100 reg = <0x1a000000 0x10>;
101
102 led@04.0 {
103 compatible = "register-bit-led";
104 offset = <0x04>;
105 mask = <0x01>;
106 label = "integrator:green0";
107 linux,default-trigger = "heartbeat";
108 default-state = "on";
109 };
110 led@04.1 {
111 compatible = "register-bit-led";
112 offset = <0x04>;
113 mask = <0x02>;
114 label = "integrator:yellow";
115 default-state = "off";
116 };
117 led@04.2 {
118 compatible = "register-bit-led";
119 offset = <0x04>;
120 mask = <0x04>;
121 label = "integrator:red";
122 default-state = "off";
123 };
124 led@04.3 {
125 compatible = "register-bit-led";
126 offset = <0x04>;
127 mask = <0x08>;
128 label = "integrator:green1";
129 default-state = "off";
130 };
131 };
Linus Walleij4672cdd2012-09-06 09:08:47 +0100132 };
Linus Walleij4980f9b2012-09-06 09:08:24 +0100133};