Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 1 | /* |
| 2 | * ARM Ltd. Versatile Express |
| 3 | * |
| 4 | * Motherboard Express uATX |
| 5 | * V2M-P1 |
| 6 | * |
| 7 | * HBI-0190D |
| 8 | * |
| 9 | * RS1 memory map ("ARM Cortex-A Series memory map" in the board's |
| 10 | * Technical Reference Manual) |
| 11 | * |
| 12 | * WARNING! The hardware described in this file is independent from the |
| 13 | * original variant (vexpress-v2m.dtsi), but there is a strong |
| 14 | * correspondence between the two configurations. |
| 15 | * |
| 16 | * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT |
| 17 | * CHANGES TO vexpress-v2m.dtsi! |
| 18 | */ |
| 19 | |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 20 | motherboard { |
Pawel Moll | 433683a | 2012-10-16 15:27:12 +0100 | [diff] [blame] | 21 | model = "V2M-P1"; |
| 22 | arm,hbi = <0x190>; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 23 | arm,vexpress,site = <0>; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 24 | arm,v2m-memory-map = "rs1"; |
Pawel Moll | 433683a | 2012-10-16 15:27:12 +0100 | [diff] [blame] | 25 | compatible = "arm,vexpress,v2m-p1", "simple-bus"; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 26 | #address-cells = <2>; /* SMB chipselect number and offset */ |
| 27 | #size-cells = <1>; |
| 28 | #interrupt-cells = <1>; |
Pawel Moll | 433683a | 2012-10-16 15:27:12 +0100 | [diff] [blame] | 29 | ranges; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 30 | |
| 31 | flash@0,00000000 { |
| 32 | compatible = "arm,vexpress-flash", "cfi-flash"; |
| 33 | reg = <0 0x00000000 0x04000000>, |
| 34 | <4 0x00000000 0x04000000>; |
| 35 | bank-width = <4>; |
| 36 | }; |
| 37 | |
| 38 | psram@1,00000000 { |
| 39 | compatible = "arm,vexpress-psram", "mtd-ram"; |
| 40 | reg = <1 0x00000000 0x02000000>; |
| 41 | bank-width = <4>; |
| 42 | }; |
| 43 | |
Pawel Moll | 478a4f8 | 2014-09-18 10:23:06 +0100 | [diff] [blame] | 44 | v2m_video_ram: vram@2,00000000 { |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 45 | compatible = "arm,vexpress-vram"; |
| 46 | reg = <2 0x00000000 0x00800000>; |
| 47 | }; |
| 48 | |
| 49 | ethernet@2,02000000 { |
| 50 | compatible = "smsc,lan9118", "smsc,lan9115"; |
| 51 | reg = <2 0x02000000 0x10000>; |
| 52 | interrupts = <15>; |
| 53 | phy-mode = "mii"; |
| 54 | reg-io-width = <4>; |
| 55 | smsc,irq-active-high; |
| 56 | smsc,irq-push-pull; |
Pawel Moll | b2a54ff | 2012-07-09 11:33:47 +0100 | [diff] [blame] | 57 | vdd33a-supply = <&v2m_fixed_3v3>; |
| 58 | vddvario-supply = <&v2m_fixed_3v3>; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 59 | }; |
| 60 | |
| 61 | usb@2,03000000 { |
| 62 | compatible = "nxp,usb-isp1761"; |
| 63 | reg = <2 0x03000000 0x20000>; |
| 64 | interrupts = <16>; |
| 65 | port1-otg; |
| 66 | }; |
| 67 | |
| 68 | iofpga@3,00000000 { |
Masahiro Yamada | 2ef7d5f | 2016-03-09 13:26:45 +0900 | [diff] [blame] | 69 | compatible = "simple-bus"; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 70 | #address-cells = <1>; |
| 71 | #size-cells = <1>; |
| 72 | ranges = <0 3 0 0x200000>; |
| 73 | |
Sudeep Holla | e6a7efa | 2017-04-13 18:12:24 +0100 | [diff] [blame] | 74 | v2m_sysreg: sysreg@10000 { |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 75 | compatible = "arm,vexpress-sysreg"; |
| 76 | reg = <0x010000 0x1000>; |
Pawel Moll | 974cc7b | 2014-04-23 10:49:31 +0100 | [diff] [blame] | 77 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 78 | v2m_led_gpios: sys_led { |
Pawel Moll | 974cc7b | 2014-04-23 10:49:31 +0100 | [diff] [blame] | 79 | compatible = "arm,vexpress-sysreg,sys_led"; |
| 80 | gpio-controller; |
| 81 | #gpio-cells = <2>; |
| 82 | }; |
| 83 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 84 | v2m_mmc_gpios: sys_mci { |
Pawel Moll | 974cc7b | 2014-04-23 10:49:31 +0100 | [diff] [blame] | 85 | compatible = "arm,vexpress-sysreg,sys_mci"; |
| 86 | gpio-controller; |
| 87 | #gpio-cells = <2>; |
| 88 | }; |
| 89 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 90 | v2m_flash_gpios: sys_flash { |
Pawel Moll | 974cc7b | 2014-04-23 10:49:31 +0100 | [diff] [blame] | 91 | compatible = "arm,vexpress-sysreg,sys_flash"; |
| 92 | gpio-controller; |
| 93 | #gpio-cells = <2>; |
| 94 | }; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 95 | }; |
| 96 | |
Sudeep Holla | e6a7efa | 2017-04-13 18:12:24 +0100 | [diff] [blame] | 97 | v2m_sysctl: sysctl@20000 { |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 98 | compatible = "arm,sp810", "arm,primecell"; |
| 99 | reg = <0x020000 0x1000>; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 100 | clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>; |
| 101 | clock-names = "refclk", "timclk", "apb_pclk"; |
| 102 | #clock-cells = <1>; |
| 103 | clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; |
Stephen Boyd | 3cf6a06 | 2015-08-11 18:36:50 -0700 | [diff] [blame] | 104 | assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>; |
| 105 | assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 106 | }; |
| 107 | |
| 108 | /* PCI-E I2C bus */ |
Sudeep Holla | e6a7efa | 2017-04-13 18:12:24 +0100 | [diff] [blame] | 109 | v2m_i2c_pcie: i2c@30000 { |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 110 | compatible = "arm,versatile-i2c"; |
| 111 | reg = <0x030000 0x1000>; |
| 112 | |
| 113 | #address-cells = <1>; |
| 114 | #size-cells = <0>; |
| 115 | |
| 116 | pcie-switch@60 { |
| 117 | compatible = "idt,89hpes32h8"; |
| 118 | reg = <0x60>; |
| 119 | }; |
| 120 | }; |
| 121 | |
Sudeep Holla | e6a7efa | 2017-04-13 18:12:24 +0100 | [diff] [blame] | 122 | aaci@40000 { |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 123 | compatible = "arm,pl041", "arm,primecell"; |
| 124 | reg = <0x040000 0x1000>; |
| 125 | interrupts = <11>; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 126 | clocks = <&smbclk>; |
| 127 | clock-names = "apb_pclk"; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 128 | }; |
| 129 | |
Sudeep Holla | e6a7efa | 2017-04-13 18:12:24 +0100 | [diff] [blame] | 130 | mmci@50000 { |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 131 | compatible = "arm,pl180", "arm,primecell"; |
| 132 | reg = <0x050000 0x1000>; |
| 133 | interrupts = <9 10>; |
Pawel Moll | 974cc7b | 2014-04-23 10:49:31 +0100 | [diff] [blame] | 134 | cd-gpios = <&v2m_mmc_gpios 0 0>; |
| 135 | wp-gpios = <&v2m_mmc_gpios 1 0>; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 136 | max-frequency = <12000000>; |
| 137 | vmmc-supply = <&v2m_fixed_3v3>; |
| 138 | clocks = <&v2m_clk24mhz>, <&smbclk>; |
| 139 | clock-names = "mclk", "apb_pclk"; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 140 | }; |
| 141 | |
Sudeep Holla | e6a7efa | 2017-04-13 18:12:24 +0100 | [diff] [blame] | 142 | kmi@60000 { |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 143 | compatible = "arm,pl050", "arm,primecell"; |
| 144 | reg = <0x060000 0x1000>; |
| 145 | interrupts = <12>; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 146 | clocks = <&v2m_clk24mhz>, <&smbclk>; |
| 147 | clock-names = "KMIREFCLK", "apb_pclk"; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 148 | }; |
| 149 | |
Sudeep Holla | e6a7efa | 2017-04-13 18:12:24 +0100 | [diff] [blame] | 150 | kmi@70000 { |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 151 | compatible = "arm,pl050", "arm,primecell"; |
| 152 | reg = <0x070000 0x1000>; |
| 153 | interrupts = <13>; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 154 | clocks = <&v2m_clk24mhz>, <&smbclk>; |
| 155 | clock-names = "KMIREFCLK", "apb_pclk"; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 156 | }; |
| 157 | |
Sudeep Holla | e6a7efa | 2017-04-13 18:12:24 +0100 | [diff] [blame] | 158 | v2m_serial0: uart@90000 { |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 159 | compatible = "arm,pl011", "arm,primecell"; |
| 160 | reg = <0x090000 0x1000>; |
| 161 | interrupts = <5>; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 162 | clocks = <&v2m_oscclk2>, <&smbclk>; |
| 163 | clock-names = "uartclk", "apb_pclk"; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 164 | }; |
| 165 | |
Sudeep Holla | e6a7efa | 2017-04-13 18:12:24 +0100 | [diff] [blame] | 166 | v2m_serial1: uart@a0000 { |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 167 | compatible = "arm,pl011", "arm,primecell"; |
| 168 | reg = <0x0a0000 0x1000>; |
| 169 | interrupts = <6>; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 170 | clocks = <&v2m_oscclk2>, <&smbclk>; |
| 171 | clock-names = "uartclk", "apb_pclk"; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 172 | }; |
| 173 | |
Sudeep Holla | e6a7efa | 2017-04-13 18:12:24 +0100 | [diff] [blame] | 174 | v2m_serial2: uart@b0000 { |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 175 | compatible = "arm,pl011", "arm,primecell"; |
| 176 | reg = <0x0b0000 0x1000>; |
| 177 | interrupts = <7>; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 178 | clocks = <&v2m_oscclk2>, <&smbclk>; |
| 179 | clock-names = "uartclk", "apb_pclk"; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 180 | }; |
| 181 | |
Sudeep Holla | e6a7efa | 2017-04-13 18:12:24 +0100 | [diff] [blame] | 182 | v2m_serial3: uart@c0000 { |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 183 | compatible = "arm,pl011", "arm,primecell"; |
| 184 | reg = <0x0c0000 0x1000>; |
| 185 | interrupts = <8>; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 186 | clocks = <&v2m_oscclk2>, <&smbclk>; |
| 187 | clock-names = "uartclk", "apb_pclk"; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 188 | }; |
| 189 | |
Sudeep Holla | e6a7efa | 2017-04-13 18:12:24 +0100 | [diff] [blame] | 190 | wdt@f0000 { |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 191 | compatible = "arm,sp805", "arm,primecell"; |
| 192 | reg = <0x0f0000 0x1000>; |
| 193 | interrupts = <0>; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 194 | clocks = <&v2m_refclk32khz>, <&smbclk>; |
| 195 | clock-names = "wdogclk", "apb_pclk"; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 196 | }; |
| 197 | |
| 198 | v2m_timer01: timer@110000 { |
| 199 | compatible = "arm,sp804", "arm,primecell"; |
| 200 | reg = <0x110000 0x1000>; |
| 201 | interrupts = <2>; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 202 | clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>; |
| 203 | clock-names = "timclken1", "timclken2", "apb_pclk"; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 204 | }; |
| 205 | |
| 206 | v2m_timer23: timer@120000 { |
| 207 | compatible = "arm,sp804", "arm,primecell"; |
| 208 | reg = <0x120000 0x1000>; |
Pawel Moll | b7541a9 | 2012-07-04 13:40:40 +0100 | [diff] [blame] | 209 | interrupts = <3>; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 210 | clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&smbclk>; |
| 211 | clock-names = "timclken1", "timclken2", "apb_pclk"; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 212 | }; |
| 213 | |
| 214 | /* DVI I2C bus */ |
| 215 | v2m_i2c_dvi: i2c@160000 { |
| 216 | compatible = "arm,versatile-i2c"; |
| 217 | reg = <0x160000 0x1000>; |
| 218 | |
| 219 | #address-cells = <1>; |
| 220 | #size-cells = <0>; |
| 221 | |
| 222 | dvi-transmitter@39 { |
| 223 | compatible = "sil,sii9022-tpi", "sil,sii9022"; |
| 224 | reg = <0x39>; |
| 225 | }; |
| 226 | |
| 227 | dvi-transmitter@60 { |
| 228 | compatible = "sil,sii9022-cpi", "sil,sii9022"; |
| 229 | reg = <0x60>; |
| 230 | }; |
| 231 | }; |
| 232 | |
| 233 | rtc@170000 { |
| 234 | compatible = "arm,pl031", "arm,primecell"; |
| 235 | reg = <0x170000 0x1000>; |
| 236 | interrupts = <4>; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 237 | clocks = <&smbclk>; |
| 238 | clock-names = "apb_pclk"; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 239 | }; |
| 240 | |
| 241 | compact-flash@1a0000 { |
| 242 | compatible = "arm,vexpress-cf", "ata-generic"; |
| 243 | reg = <0x1a0000 0x100 |
| 244 | 0x1a0100 0xf00>; |
| 245 | reg-shift = <2>; |
| 246 | }; |
| 247 | |
| 248 | clcd@1f0000 { |
| 249 | compatible = "arm,pl111", "arm,primecell"; |
| 250 | reg = <0x1f0000 0x1000>; |
Pawel Moll | 478a4f8 | 2014-09-18 10:23:06 +0100 | [diff] [blame] | 251 | interrupt-names = "combined"; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 252 | interrupts = <14>; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 253 | clocks = <&v2m_oscclk1>, <&smbclk>; |
| 254 | clock-names = "clcdclk", "apb_pclk"; |
Pawel Moll | 478a4f8 | 2014-09-18 10:23:06 +0100 | [diff] [blame] | 255 | memory-region = <&v2m_video_ram>; |
| 256 | max-memory-bandwidth = <50350000>; /* 16bpp @ 25.175MHz */ |
| 257 | |
| 258 | port { |
| 259 | v2m_clcd_pads: endpoint { |
| 260 | remote-endpoint = <&v2m_clcd_panel>; |
| 261 | arm,pl11x,tft-r0g0b0-pads = <0 8 16>; |
| 262 | }; |
| 263 | }; |
| 264 | |
| 265 | panel { |
| 266 | compatible = "panel-dpi"; |
| 267 | |
| 268 | port { |
| 269 | v2m_clcd_panel: endpoint { |
| 270 | remote-endpoint = <&v2m_clcd_pads>; |
| 271 | }; |
| 272 | }; |
| 273 | |
| 274 | panel-timing { |
| 275 | clock-frequency = <25175000>; |
| 276 | hactive = <640>; |
| 277 | hback-porch = <40>; |
| 278 | hfront-porch = <24>; |
| 279 | hsync-len = <96>; |
| 280 | vactive = <480>; |
| 281 | vback-porch = <32>; |
| 282 | vfront-porch = <11>; |
| 283 | vsync-len = <2>; |
| 284 | }; |
| 285 | }; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 286 | }; |
| 287 | }; |
Pawel Moll | b2a54ff | 2012-07-09 11:33:47 +0100 | [diff] [blame] | 288 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 289 | v2m_fixed_3v3: fixed-regulator-0 { |
Pawel Moll | b2a54ff | 2012-07-09 11:33:47 +0100 | [diff] [blame] | 290 | compatible = "regulator-fixed"; |
| 291 | regulator-name = "3V3"; |
| 292 | regulator-min-microvolt = <3300000>; |
| 293 | regulator-max-microvolt = <3300000>; |
| 294 | regulator-always-on; |
| 295 | }; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 296 | |
| 297 | v2m_clk24mhz: clk24mhz { |
| 298 | compatible = "fixed-clock"; |
| 299 | #clock-cells = <0>; |
| 300 | clock-frequency = <24000000>; |
| 301 | clock-output-names = "v2m:clk24mhz"; |
| 302 | }; |
| 303 | |
| 304 | v2m_refclk1mhz: refclk1mhz { |
| 305 | compatible = "fixed-clock"; |
| 306 | #clock-cells = <0>; |
| 307 | clock-frequency = <1000000>; |
| 308 | clock-output-names = "v2m:refclk1mhz"; |
| 309 | }; |
| 310 | |
| 311 | v2m_refclk32khz: refclk32khz { |
| 312 | compatible = "fixed-clock"; |
| 313 | #clock-cells = <0>; |
| 314 | clock-frequency = <32768>; |
| 315 | clock-output-names = "v2m:refclk32khz"; |
| 316 | }; |
| 317 | |
Pawel Moll | 974cc7b | 2014-04-23 10:49:31 +0100 | [diff] [blame] | 318 | leds { |
| 319 | compatible = "gpio-leds"; |
| 320 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 321 | user1 { |
Pawel Moll | 974cc7b | 2014-04-23 10:49:31 +0100 | [diff] [blame] | 322 | label = "v2m:green:user1"; |
| 323 | gpios = <&v2m_led_gpios 0 0>; |
| 324 | linux,default-trigger = "heartbeat"; |
| 325 | }; |
| 326 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 327 | user2 { |
Pawel Moll | 974cc7b | 2014-04-23 10:49:31 +0100 | [diff] [blame] | 328 | label = "v2m:green:user2"; |
| 329 | gpios = <&v2m_led_gpios 1 0>; |
| 330 | linux,default-trigger = "mmc0"; |
| 331 | }; |
| 332 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 333 | user3 { |
Pawel Moll | 974cc7b | 2014-04-23 10:49:31 +0100 | [diff] [blame] | 334 | label = "v2m:green:user3"; |
| 335 | gpios = <&v2m_led_gpios 2 0>; |
| 336 | linux,default-trigger = "cpu0"; |
| 337 | }; |
| 338 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 339 | user4 { |
Pawel Moll | 974cc7b | 2014-04-23 10:49:31 +0100 | [diff] [blame] | 340 | label = "v2m:green:user4"; |
| 341 | gpios = <&v2m_led_gpios 3 0>; |
| 342 | linux,default-trigger = "cpu1"; |
| 343 | }; |
| 344 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 345 | user5 { |
Pawel Moll | 974cc7b | 2014-04-23 10:49:31 +0100 | [diff] [blame] | 346 | label = "v2m:green:user5"; |
| 347 | gpios = <&v2m_led_gpios 4 0>; |
| 348 | linux,default-trigger = "cpu2"; |
| 349 | }; |
| 350 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 351 | user6 { |
Pawel Moll | 974cc7b | 2014-04-23 10:49:31 +0100 | [diff] [blame] | 352 | label = "v2m:green:user6"; |
| 353 | gpios = <&v2m_led_gpios 5 0>; |
| 354 | linux,default-trigger = "cpu3"; |
| 355 | }; |
| 356 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 357 | user7 { |
Pawel Moll | 974cc7b | 2014-04-23 10:49:31 +0100 | [diff] [blame] | 358 | label = "v2m:green:user7"; |
| 359 | gpios = <&v2m_led_gpios 6 0>; |
| 360 | linux,default-trigger = "cpu4"; |
| 361 | }; |
| 362 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 363 | user8 { |
Pawel Moll | 974cc7b | 2014-04-23 10:49:31 +0100 | [diff] [blame] | 364 | label = "v2m:green:user8"; |
| 365 | gpios = <&v2m_led_gpios 7 0>; |
| 366 | linux,default-trigger = "cpu5"; |
| 367 | }; |
| 368 | }; |
| 369 | |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 370 | mcc { |
| 371 | compatible = "arm,vexpress,config-bus"; |
| 372 | arm,vexpress,config-bridge = <&v2m_sysreg>; |
| 373 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 374 | oscclk0 { |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 375 | /* MCC static memory clock */ |
| 376 | compatible = "arm,vexpress-osc"; |
| 377 | arm,vexpress-sysreg,func = <1 0>; |
| 378 | freq-range = <25000000 60000000>; |
| 379 | #clock-cells = <0>; |
| 380 | clock-output-names = "v2m:oscclk0"; |
| 381 | }; |
| 382 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 383 | v2m_oscclk1: oscclk1 { |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 384 | /* CLCD clock */ |
| 385 | compatible = "arm,vexpress-osc"; |
| 386 | arm,vexpress-sysreg,func = <1 1>; |
Pawel Moll | 478a4f8 | 2014-09-18 10:23:06 +0100 | [diff] [blame] | 387 | freq-range = <23750000 65000000>; |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 388 | #clock-cells = <0>; |
| 389 | clock-output-names = "v2m:oscclk1"; |
| 390 | }; |
| 391 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 392 | v2m_oscclk2: oscclk2 { |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 393 | /* IO FPGA peripheral clock */ |
| 394 | compatible = "arm,vexpress-osc"; |
| 395 | arm,vexpress-sysreg,func = <1 2>; |
| 396 | freq-range = <24000000 24000000>; |
| 397 | #clock-cells = <0>; |
| 398 | clock-output-names = "v2m:oscclk2"; |
| 399 | }; |
| 400 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 401 | volt-vio { |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 402 | /* Logic level voltage */ |
| 403 | compatible = "arm,vexpress-volt"; |
| 404 | arm,vexpress-sysreg,func = <2 0>; |
| 405 | regulator-name = "VIO"; |
| 406 | regulator-always-on; |
| 407 | label = "VIO"; |
| 408 | }; |
| 409 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 410 | temp-mcc { |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 411 | /* MCC internal operating temperature */ |
| 412 | compatible = "arm,vexpress-temp"; |
| 413 | arm,vexpress-sysreg,func = <4 0>; |
| 414 | label = "MCC"; |
| 415 | }; |
| 416 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 417 | reset { |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 418 | compatible = "arm,vexpress-reset"; |
| 419 | arm,vexpress-sysreg,func = <5 0>; |
| 420 | }; |
| 421 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 422 | muxfpga { |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 423 | compatible = "arm,vexpress-muxfpga"; |
| 424 | arm,vexpress-sysreg,func = <7 0>; |
| 425 | }; |
| 426 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 427 | shutdown { |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 428 | compatible = "arm,vexpress-shutdown"; |
| 429 | arm,vexpress-sysreg,func = <8 0>; |
| 430 | }; |
| 431 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 432 | reboot { |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 433 | compatible = "arm,vexpress-reboot"; |
| 434 | arm,vexpress-sysreg,func = <9 0>; |
| 435 | }; |
| 436 | |
Sudeep Holla | 2cff6db | 2016-03-07 11:54:45 +0000 | [diff] [blame] | 437 | dvimode { |
Pawel Moll | 842839a | 2012-09-17 16:43:30 +0100 | [diff] [blame] | 438 | compatible = "arm,vexpress-dvimode"; |
| 439 | arm,vexpress-sysreg,func = <11 0>; |
| 440 | }; |
| 441 | }; |
Pawel Moll | 6a37195 | 2011-12-09 18:47:39 +0000 | [diff] [blame] | 442 | }; |