blob: 9a482efafa82d34c1b03c3d5b136eb7eda6551c8 [file] [log] [blame]
David Howellsb920de12008-02-08 04:19:31 -08001/* MN103E010 Processor initialisation
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11#include <linux/kernel.h>
12#include <asm/rtc.h>
13
14/*
15 * initialise the on-silicon processor peripherals
16 */
17asmlinkage void __init processor_init(void)
18{
19 int loop;
20
21 /* set up the exception table first */
22 for (loop = 0x000; loop < 0x400; loop += 8)
23 __set_intr_stub(loop, __common_exception);
24
25 __set_intr_stub(EXCEP_ITLBMISS, itlb_miss);
26 __set_intr_stub(EXCEP_DTLBMISS, dtlb_miss);
27 __set_intr_stub(EXCEP_IAERROR, itlb_aerror);
28 __set_intr_stub(EXCEP_DAERROR, dtlb_aerror);
29 __set_intr_stub(EXCEP_BUSERROR, raw_bus_error);
30 __set_intr_stub(EXCEP_DOUBLE_FAULT, double_fault);
31 __set_intr_stub(EXCEP_SYSCALL0, system_call);
32
33 __set_intr_stub(EXCEP_NMI, nmi_handler);
34 __set_intr_stub(EXCEP_WDT, nmi_handler);
35 __set_intr_stub(EXCEP_IRQ_LEVEL0, irq_handler);
36 __set_intr_stub(EXCEP_IRQ_LEVEL1, irq_handler);
37 __set_intr_stub(EXCEP_IRQ_LEVEL2, irq_handler);
38 __set_intr_stub(EXCEP_IRQ_LEVEL3, irq_handler);
39 __set_intr_stub(EXCEP_IRQ_LEVEL4, irq_handler);
40 __set_intr_stub(EXCEP_IRQ_LEVEL5, irq_handler);
41 __set_intr_stub(EXCEP_IRQ_LEVEL6, irq_handler);
42
43 IVAR0 = EXCEP_IRQ_LEVEL0;
44 IVAR1 = EXCEP_IRQ_LEVEL1;
45 IVAR2 = EXCEP_IRQ_LEVEL2;
46 IVAR3 = EXCEP_IRQ_LEVEL3;
47 IVAR4 = EXCEP_IRQ_LEVEL4;
48 IVAR5 = EXCEP_IRQ_LEVEL5;
49 IVAR6 = EXCEP_IRQ_LEVEL6;
50
51 mn10300_dcache_flush_inv();
52 mn10300_icache_inv();
53
54 /* disable all interrupts and set to priority 6 (lowest) */
55 for (loop = 0; loop < NR_IRQS; loop++)
56 GxICR(loop) = GxICR_LEVEL_6 | GxICR_DETECT;
57
58 /* clear the timers */
59 TM0MD = 0;
60 TM1MD = 0;
61 TM2MD = 0;
62 TM3MD = 0;
63 TM4MD = 0;
64 TM5MD = 0;
65 TM6MD = 0;
66 TM6MDA = 0;
67 TM6MDB = 0;
68 TM7MD = 0;
69 TM8MD = 0;
70 TM9MD = 0;
71 TM10MD = 0;
72 TM11MD = 0;
73
74 calibrate_clock();
75}