Vincent Yang | 87a5074 | 2015-01-20 16:05:18 +0800 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/mmc/host/sdhci_f_sdh30.c |
| 3 | * |
| 4 | * Copyright (C) 2013 - 2015 Fujitsu Semiconductor, Ltd |
| 5 | * Vincent Yang <vincent.yang@tw.fujitsu.com> |
| 6 | * Copyright (C) 2015 Linaro Ltd Andy Green <andy.green@linaro.org> |
| 7 | * |
| 8 | * This program is free software: you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation, version 2 of the License. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/err.h> |
| 14 | #include <linux/delay.h> |
| 15 | #include <linux/module.h> |
Ard Biesheuvel | 06641e8 | 2017-11-06 15:29:23 +0000 | [diff] [blame] | 16 | #include <linux/property.h> |
Vincent Yang | 87a5074 | 2015-01-20 16:05:18 +0800 | [diff] [blame] | 17 | #include <linux/clk.h> |
| 18 | |
| 19 | #include "sdhci-pltfm.h" |
| 20 | |
| 21 | /* F_SDH30 extended Controller registers */ |
| 22 | #define F_SDH30_AHB_CONFIG 0x100 |
| 23 | #define F_SDH30_AHB_BIGED 0x00000040 |
| 24 | #define F_SDH30_BUSLOCK_DMA 0x00000020 |
| 25 | #define F_SDH30_BUSLOCK_EN 0x00000010 |
| 26 | #define F_SDH30_SIN 0x00000008 |
| 27 | #define F_SDH30_AHB_INCR_16 0x00000004 |
| 28 | #define F_SDH30_AHB_INCR_8 0x00000002 |
| 29 | #define F_SDH30_AHB_INCR_4 0x00000001 |
| 30 | |
| 31 | #define F_SDH30_TUNING_SETTING 0x108 |
| 32 | #define F_SDH30_CMD_CHK_DIS 0x00010000 |
| 33 | |
| 34 | #define F_SDH30_IO_CONTROL2 0x114 |
| 35 | #define F_SDH30_CRES_O_DN 0x00080000 |
| 36 | #define F_SDH30_MSEL_O_1_8 0x00040000 |
| 37 | |
| 38 | #define F_SDH30_ESD_CONTROL 0x124 |
| 39 | #define F_SDH30_EMMC_RST 0x00000002 |
| 40 | #define F_SDH30_EMMC_HS200 0x01000000 |
| 41 | |
| 42 | #define F_SDH30_CMD_DAT_DELAY 0x200 |
| 43 | |
| 44 | #define F_SDH30_MIN_CLOCK 400000 |
| 45 | |
| 46 | struct f_sdhost_priv { |
| 47 | struct clk *clk_iface; |
| 48 | struct clk *clk; |
| 49 | u32 vendor_hs200; |
| 50 | struct device *dev; |
Ard Biesheuvel | 06641e8 | 2017-11-06 15:29:23 +0000 | [diff] [blame] | 51 | bool enable_cmd_dat_delay; |
Vincent Yang | 87a5074 | 2015-01-20 16:05:18 +0800 | [diff] [blame] | 52 | }; |
| 53 | |
Axel Lin | cee4e7a | 2015-04-24 15:00:29 +0800 | [diff] [blame] | 54 | static void sdhci_f_sdh30_soft_voltage_switch(struct sdhci_host *host) |
Vincent Yang | 87a5074 | 2015-01-20 16:05:18 +0800 | [diff] [blame] | 55 | { |
| 56 | struct f_sdhost_priv *priv = sdhci_priv(host); |
| 57 | u32 ctrl = 0; |
| 58 | |
| 59 | usleep_range(2500, 3000); |
| 60 | ctrl = sdhci_readl(host, F_SDH30_IO_CONTROL2); |
| 61 | ctrl |= F_SDH30_CRES_O_DN; |
| 62 | sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); |
| 63 | ctrl |= F_SDH30_MSEL_O_1_8; |
| 64 | sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); |
| 65 | |
| 66 | ctrl &= ~F_SDH30_CRES_O_DN; |
| 67 | sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); |
| 68 | usleep_range(2500, 3000); |
| 69 | |
| 70 | if (priv->vendor_hs200) { |
| 71 | dev_info(priv->dev, "%s: setting hs200\n", __func__); |
| 72 | ctrl = sdhci_readl(host, F_SDH30_ESD_CONTROL); |
| 73 | ctrl |= priv->vendor_hs200; |
| 74 | sdhci_writel(host, ctrl, F_SDH30_ESD_CONTROL); |
| 75 | } |
| 76 | |
| 77 | ctrl = sdhci_readl(host, F_SDH30_TUNING_SETTING); |
| 78 | ctrl |= F_SDH30_CMD_CHK_DIS; |
| 79 | sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING); |
| 80 | } |
| 81 | |
Axel Lin | cee4e7a | 2015-04-24 15:00:29 +0800 | [diff] [blame] | 82 | static unsigned int sdhci_f_sdh30_get_min_clock(struct sdhci_host *host) |
Vincent Yang | 87a5074 | 2015-01-20 16:05:18 +0800 | [diff] [blame] | 83 | { |
| 84 | return F_SDH30_MIN_CLOCK; |
| 85 | } |
| 86 | |
Axel Lin | cee4e7a | 2015-04-24 15:00:29 +0800 | [diff] [blame] | 87 | static void sdhci_f_sdh30_reset(struct sdhci_host *host, u8 mask) |
Vincent Yang | 87a5074 | 2015-01-20 16:05:18 +0800 | [diff] [blame] | 88 | { |
Ard Biesheuvel | 06641e8 | 2017-11-06 15:29:23 +0000 | [diff] [blame] | 89 | struct f_sdhost_priv *priv = sdhci_priv(host); |
| 90 | u32 ctl; |
| 91 | |
Vincent Yang | 87a5074 | 2015-01-20 16:05:18 +0800 | [diff] [blame] | 92 | if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0) |
| 93 | sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL); |
| 94 | |
| 95 | sdhci_reset(host, mask); |
Ard Biesheuvel | 06641e8 | 2017-11-06 15:29:23 +0000 | [diff] [blame] | 96 | |
| 97 | if (priv->enable_cmd_dat_delay) { |
| 98 | ctl = sdhci_readl(host, F_SDH30_ESD_CONTROL); |
| 99 | ctl |= F_SDH30_CMD_DAT_DELAY; |
| 100 | sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL); |
| 101 | } |
Vincent Yang | 87a5074 | 2015-01-20 16:05:18 +0800 | [diff] [blame] | 102 | } |
| 103 | |
| 104 | static const struct sdhci_ops sdhci_f_sdh30_ops = { |
| 105 | .voltage_switch = sdhci_f_sdh30_soft_voltage_switch, |
| 106 | .get_min_clock = sdhci_f_sdh30_get_min_clock, |
| 107 | .reset = sdhci_f_sdh30_reset, |
| 108 | .set_clock = sdhci_set_clock, |
| 109 | .set_bus_width = sdhci_set_bus_width, |
| 110 | .set_uhs_signaling = sdhci_set_uhs_signaling, |
| 111 | }; |
| 112 | |
| 113 | static int sdhci_f_sdh30_probe(struct platform_device *pdev) |
| 114 | { |
| 115 | struct sdhci_host *host; |
| 116 | struct device *dev = &pdev->dev; |
| 117 | struct resource *res; |
| 118 | int irq, ctrl = 0, ret = 0; |
| 119 | struct f_sdhost_priv *priv; |
| 120 | u32 reg = 0; |
| 121 | |
| 122 | irq = platform_get_irq(pdev, 0); |
| 123 | if (irq < 0) { |
| 124 | dev_err(dev, "%s: no irq specified\n", __func__); |
| 125 | return irq; |
| 126 | } |
| 127 | |
Axel Lin | 2dbf1dc | 2015-04-24 15:02:00 +0800 | [diff] [blame] | 128 | host = sdhci_alloc_host(dev, sizeof(struct f_sdhost_priv)); |
Vincent Yang | 87a5074 | 2015-01-20 16:05:18 +0800 | [diff] [blame] | 129 | if (IS_ERR(host)) |
| 130 | return PTR_ERR(host); |
| 131 | |
| 132 | priv = sdhci_priv(host); |
| 133 | priv->dev = dev; |
| 134 | |
| 135 | host->quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | |
| 136 | SDHCI_QUIRK_INVERTED_WRITE_PROTECT; |
| 137 | host->quirks2 = SDHCI_QUIRK2_SUPPORT_SINGLE | |
| 138 | SDHCI_QUIRK2_TUNING_WORK_AROUND; |
| 139 | |
Ard Biesheuvel | 06641e8 | 2017-11-06 15:29:23 +0000 | [diff] [blame] | 140 | priv->enable_cmd_dat_delay = device_property_read_bool(dev, |
| 141 | "fujitsu,cmd-dat-delay-select"); |
| 142 | |
Vincent Yang | 87a5074 | 2015-01-20 16:05:18 +0800 | [diff] [blame] | 143 | ret = mmc_of_parse(host->mmc); |
| 144 | if (ret) |
| 145 | goto err; |
| 146 | |
| 147 | platform_set_drvdata(pdev, host); |
| 148 | |
| 149 | sdhci_get_of_property(pdev); |
| 150 | host->hw_name = "f_sdh30"; |
| 151 | host->ops = &sdhci_f_sdh30_ops; |
| 152 | host->irq = irq; |
| 153 | |
| 154 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 155 | host->ioaddr = devm_ioremap_resource(&pdev->dev, res); |
| 156 | if (IS_ERR(host->ioaddr)) { |
Wu Fengguang | 3e7cf90 | 2015-01-21 19:19:45 +0800 | [diff] [blame] | 157 | ret = PTR_ERR(host->ioaddr); |
Vincent Yang | 87a5074 | 2015-01-20 16:05:18 +0800 | [diff] [blame] | 158 | goto err; |
| 159 | } |
| 160 | |
| 161 | priv->clk_iface = devm_clk_get(&pdev->dev, "iface"); |
| 162 | if (IS_ERR(priv->clk_iface)) { |
| 163 | ret = PTR_ERR(priv->clk_iface); |
| 164 | goto err; |
| 165 | } |
| 166 | |
| 167 | ret = clk_prepare_enable(priv->clk_iface); |
| 168 | if (ret) |
| 169 | goto err; |
| 170 | |
| 171 | priv->clk = devm_clk_get(&pdev->dev, "core"); |
| 172 | if (IS_ERR(priv->clk)) { |
| 173 | ret = PTR_ERR(priv->clk); |
| 174 | goto err_clk; |
| 175 | } |
| 176 | |
| 177 | ret = clk_prepare_enable(priv->clk); |
| 178 | if (ret) |
| 179 | goto err_clk; |
| 180 | |
| 181 | /* init vendor specific regs */ |
| 182 | ctrl = sdhci_readw(host, F_SDH30_AHB_CONFIG); |
| 183 | ctrl |= F_SDH30_SIN | F_SDH30_AHB_INCR_16 | F_SDH30_AHB_INCR_8 | |
| 184 | F_SDH30_AHB_INCR_4; |
| 185 | ctrl &= ~(F_SDH30_AHB_BIGED | F_SDH30_BUSLOCK_EN); |
| 186 | sdhci_writew(host, ctrl, F_SDH30_AHB_CONFIG); |
| 187 | |
| 188 | reg = sdhci_readl(host, F_SDH30_ESD_CONTROL); |
| 189 | sdhci_writel(host, reg & ~F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL); |
| 190 | msleep(20); |
| 191 | sdhci_writel(host, reg | F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL); |
| 192 | |
| 193 | reg = sdhci_readl(host, SDHCI_CAPABILITIES); |
| 194 | if (reg & SDHCI_CAN_DO_8BIT) |
| 195 | priv->vendor_hs200 = F_SDH30_EMMC_HS200; |
| 196 | |
| 197 | ret = sdhci_add_host(host); |
| 198 | if (ret) |
| 199 | goto err_add_host; |
| 200 | |
| 201 | return 0; |
| 202 | |
| 203 | err_add_host: |
| 204 | clk_disable_unprepare(priv->clk); |
| 205 | err_clk: |
| 206 | clk_disable_unprepare(priv->clk_iface); |
| 207 | err: |
| 208 | sdhci_free_host(host); |
| 209 | return ret; |
| 210 | } |
| 211 | |
| 212 | static int sdhci_f_sdh30_remove(struct platform_device *pdev) |
| 213 | { |
| 214 | struct sdhci_host *host = platform_get_drvdata(pdev); |
| 215 | struct f_sdhost_priv *priv = sdhci_priv(host); |
| 216 | |
| 217 | sdhci_remove_host(host, readl(host->ioaddr + SDHCI_INT_STATUS) == |
| 218 | 0xffffffff); |
| 219 | |
| 220 | clk_disable_unprepare(priv->clk_iface); |
| 221 | clk_disable_unprepare(priv->clk); |
| 222 | |
| 223 | sdhci_free_host(host); |
| 224 | platform_set_drvdata(pdev, NULL); |
| 225 | |
| 226 | return 0; |
| 227 | } |
| 228 | |
| 229 | static const struct of_device_id f_sdh30_dt_ids[] = { |
| 230 | { .compatible = "fujitsu,mb86s70-sdhci-3.0" }, |
| 231 | { /* sentinel */ } |
| 232 | }; |
| 233 | MODULE_DEVICE_TABLE(of, f_sdh30_dt_ids); |
| 234 | |
| 235 | static struct platform_driver sdhci_f_sdh30_driver = { |
| 236 | .driver = { |
| 237 | .name = "f_sdh30", |
| 238 | .of_match_table = f_sdh30_dt_ids, |
Ulf Hansson | fa243f6 | 2016-07-27 13:07:21 +0200 | [diff] [blame] | 239 | .pm = &sdhci_pltfm_pmops, |
Vincent Yang | 87a5074 | 2015-01-20 16:05:18 +0800 | [diff] [blame] | 240 | }, |
| 241 | .probe = sdhci_f_sdh30_probe, |
| 242 | .remove = sdhci_f_sdh30_remove, |
| 243 | }; |
| 244 | |
| 245 | module_platform_driver(sdhci_f_sdh30_driver); |
| 246 | |
| 247 | MODULE_DESCRIPTION("F_SDH30 SD Card Controller driver"); |
| 248 | MODULE_LICENSE("GPL v2"); |
| 249 | MODULE_AUTHOR("FUJITSU SEMICONDUCTOR LTD."); |
| 250 | MODULE_ALIAS("platform:f_sdh30"); |