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Becky Bruce63dafe52006-01-14 16:57:39 -06001/*
2 * MPC85xx setup and early boot code plus other random bits.
3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 *
6 * Copyright 2005 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
Becky Bruce63dafe52006-01-14 16:57:39 -060014#include <linux/stddef.h>
15#include <linux/kernel.h>
Becky Bruce63dafe52006-01-14 16:57:39 -060016#include <linux/pci.h>
17#include <linux/kdev_t.h>
Becky Bruce63dafe52006-01-14 16:57:39 -060018#include <linux/delay.h>
Becky Bruce63dafe52006-01-14 16:57:39 -060019#include <linux/seq_file.h>
Scott Wood8abc8f52007-10-08 16:08:51 -050020#include <linux/of_platform.h>
Becky Bruce63dafe52006-01-14 16:57:39 -060021
22#include <asm/system.h>
Becky Bruce63dafe52006-01-14 16:57:39 -060023#include <asm/time.h>
Becky Bruce63dafe52006-01-14 16:57:39 -060024#include <asm/machdep.h>
Becky Bruce63dafe52006-01-14 16:57:39 -060025#include <asm/pci-bridge.h>
Becky Bruce63dafe52006-01-14 16:57:39 -060026#include <asm/mpic.h>
27#include <mm/mmu_decl.h>
28#include <asm/udbg.h>
29
30#include <sysdev/fsl_soc.h>
Roy Zang3f6c5da2007-07-10 18:47:06 +080031#include <sysdev/fsl_pci.h>
Becky Bruce63dafe52006-01-14 16:57:39 -060032
Vitaly Bordug902f3922006-09-21 22:31:26 +040033#ifdef CONFIG_CPM2
34#include <asm/cpm2.h>
35#include <sysdev/cpm2_pic.h>
Vitaly Bordug902f3922006-09-21 22:31:26 +040036#endif
37
Andy Fleming8080d542006-02-10 17:01:06 -060038#ifdef CONFIG_PCI
Kumar Gala7d52c7b2007-06-22 00:23:57 -050039static int mpc85xx_exclude_device(struct pci_controller *hose,
40 u_char bus, u_char devfn)
Andy Fleming8080d542006-02-10 17:01:06 -060041{
42 if (bus == 0 && PCI_SLOT(devfn) == 0)
43 return PCIBIOS_DEVICE_NOT_FOUND;
44 else
45 return PCIBIOS_SUCCESSFUL;
46}
Andy Fleming8080d542006-02-10 17:01:06 -060047#endif /* CONFIG_PCI */
48
Vitaly Bordug902f3922006-09-21 22:31:26 +040049#ifdef CONFIG_CPM2
50
Olaf Hering35a84c22006-10-07 22:08:26 +100051static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
Vitaly Bordug902f3922006-09-21 22:31:26 +040052{
Thomas Gleixnerec775d02011-03-25 16:45:20 +010053 struct irq_chip *chip = irq_desc_get_chip(desc);
Vitaly Bordug902f3922006-09-21 22:31:26 +040054 int cascade_irq;
55
Paul Gortmakere5091842008-01-02 12:50:01 -050056 while ((cascade_irq = cpm2_get_irq()) >= 0)
Olof Johansson49f19ce2006-10-05 20:31:10 -050057 generic_handle_irq(cascade_irq);
Paul Gortmakere5091842008-01-02 12:50:01 -050058
Lennert Buytenhek712d5d72011-03-07 13:59:19 +000059 chip->irq_eoi(&desc->irq_data);
Vitaly Bordug902f3922006-09-21 22:31:26 +040060}
61
62#endif /* CONFIG_CPM2 */
Andy Fleming8080d542006-02-10 17:01:06 -060063
Kumar Gala27630be2007-02-09 09:30:45 -060064static void __init mpc85xx_ads_pic_init(void)
Becky Bruce63dafe52006-01-14 16:57:39 -060065{
Andy Fleming4c86cd92006-08-18 18:03:08 -050066 struct mpic *mpic;
67 struct resource r;
68 struct device_node *np = NULL;
Vitaly Bordug902f3922006-09-21 22:31:26 +040069#ifdef CONFIG_CPM2
70 int irq;
71#endif
Becky Bruce63dafe52006-01-14 16:57:39 -060072
Andy Fleming4c86cd92006-08-18 18:03:08 -050073 np = of_find_node_by_type(np, "open-pic");
Paul Gortmakere5091842008-01-02 12:50:01 -050074 if (!np) {
Andy Fleming4c86cd92006-08-18 18:03:08 -050075 printk(KERN_ERR "Could not find open-pic node\n");
76 return;
77 }
Becky Bruce63dafe52006-01-14 16:57:39 -060078
Paul Gortmakere5091842008-01-02 12:50:01 -050079 if (of_address_to_resource(np, 0, &r)) {
Andy Fleming4c86cd92006-08-18 18:03:08 -050080 printk(KERN_ERR "Could not map mpic register space\n");
81 of_node_put(np);
82 return;
83 }
Becky Bruce63dafe52006-01-14 16:57:39 -060084
Andy Fleming4c86cd92006-08-18 18:03:08 -050085 mpic = mpic_alloc(np, r.start,
86 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
Kumar Galab533f8a2007-07-03 02:35:35 -050087 0, 256, " OpenPIC ");
Andy Fleming4c86cd92006-08-18 18:03:08 -050088 BUG_ON(mpic == NULL);
89 of_node_put(np);
90
Andy Fleming4c86cd92006-08-18 18:03:08 -050091 mpic_init(mpic);
Vitaly Bordug902f3922006-09-21 22:31:26 +040092
93#ifdef CONFIG_CPM2
94 /* Setup CPM2 PIC */
Scott Wood8abc8f52007-10-08 16:08:51 -050095 np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
Vitaly Bordug902f3922006-09-21 22:31:26 +040096 if (np == NULL) {
Scott Wood8abc8f52007-10-08 16:08:51 -050097 printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
98 return;
Vitaly Bordug902f3922006-09-21 22:31:26 +040099 }
100 irq = irq_of_parse_and_map(np, 0);
101
102 cpm2_pic_init(np);
Paul Gortmakere5091842008-01-02 12:50:01 -0500103 of_node_put(np);
Thomas Gleixnerec775d02011-03-25 16:45:20 +0100104 irq_set_chained_handler(irq, cpm2_cascade);
Vitaly Bordug902f3922006-09-21 22:31:26 +0400105#endif
Becky Bruce63dafe52006-01-14 16:57:39 -0600106}
107
Becky Bruce63dafe52006-01-14 16:57:39 -0600108/*
109 * Setup the architecture
110 */
Vitaly Bordug902f3922006-09-21 22:31:26 +0400111#ifdef CONFIG_CPM2
Scott Wood8abc8f52007-10-08 16:08:51 -0500112struct cpm_pin {
113 int port, pin, flags;
114};
115
Paul Gortmakere5091842008-01-02 12:50:01 -0500116static const struct cpm_pin mpc8560_ads_pins[] = {
Scott Wood8abc8f52007-10-08 16:08:51 -0500117 /* SCC1 */
118 {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
119 {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
120 {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
121
122 /* SCC2 */
Vitaly Bordug2308c952008-06-12 04:30:13 +0400123 {2, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
124 {2, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
Scott Wood8abc8f52007-10-08 16:08:51 -0500125 {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
126 {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
127 {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
128
129 /* FCC2 */
130 {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
131 {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
132 {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
133 {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
134 {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
135 {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
136 {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
137 {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
138 {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
139 {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
140 {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
141 {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
142 {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
143 {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
144 {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */
145 {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */
146
147 /* FCC3 */
148 {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
149 {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
150 {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
Scott Wood8abc8f52007-10-08 16:08:51 -0500151 {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
152 {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
153 {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
154 {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
155 {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
156 {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
157 {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
158 {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
159 {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
160 {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
Vitaly Bordug2308c952008-06-12 04:30:13 +0400161 {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK16 */
162 {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK15 */
163 {2, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
Scott Wood8abc8f52007-10-08 16:08:51 -0500164};
165
166static void __init init_ioports(void)
Vitaly Bordug902f3922006-09-21 22:31:26 +0400167{
Scott Wood8abc8f52007-10-08 16:08:51 -0500168 int i;
Vitaly Bordug902f3922006-09-21 22:31:26 +0400169
Scott Wood8abc8f52007-10-08 16:08:51 -0500170 for (i = 0; i < ARRAY_SIZE(mpc8560_ads_pins); i++) {
Kumar Galaa5dc66e2008-04-15 23:35:47 -0500171 const struct cpm_pin *pin = &mpc8560_ads_pins[i];
Scott Wood8abc8f52007-10-08 16:08:51 -0500172 cpm2_set_pin(pin->port, pin->pin, pin->flags);
Vitaly Bordugd3465c92006-09-21 22:38:05 +0400173 }
Vitaly Bordug902f3922006-09-21 22:31:26 +0400174
Scott Wood8abc8f52007-10-08 16:08:51 -0500175 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
176 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
177 cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
178 cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
179 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
180 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
181 cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
182 cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
Vitaly Bordug902f3922006-09-21 22:31:26 +0400183}
184#endif
185
Becky Brucefbc94e72006-02-07 21:29:42 -0600186static void __init mpc85xx_ads_setup_arch(void)
Becky Bruce63dafe52006-01-14 16:57:39 -0600187{
Andy Fleming4c86cd92006-08-18 18:03:08 -0500188#ifdef CONFIG_PCI
Andy Fleming8080d542006-02-10 17:01:06 -0600189 struct device_node *np;
Andy Fleming4c86cd92006-08-18 18:03:08 -0500190#endif
Becky Bruce63dafe52006-01-14 16:57:39 -0600191
192 if (ppc_md.progress)
193 ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
194
Vitaly Bordug902f3922006-09-21 22:31:26 +0400195#ifdef CONFIG_CPM2
196 cpm2_reset();
Scott Wood8abc8f52007-10-08 16:08:51 -0500197 init_ioports();
Vitaly Bordug902f3922006-09-21 22:31:26 +0400198#endif
199
Andy Fleming8080d542006-02-10 17:01:06 -0600200#ifdef CONFIG_PCI
Kumar Galac9438af2007-10-04 00:28:43 -0500201 for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
Roy Zang3f6c5da2007-07-10 18:47:06 +0800202 fsl_add_bridge(np, 1);
Kumar Galac9438af2007-10-04 00:28:43 -0500203
Andy Fleming8080d542006-02-10 17:01:06 -0600204 ppc_md.pci_exclude_device = mpc85xx_exclude_device;
205#endif
Becky Bruce63dafe52006-01-14 16:57:39 -0600206}
207
Kumar Gala27630be2007-02-09 09:30:45 -0600208static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
Becky Bruce63dafe52006-01-14 16:57:39 -0600209{
210 uint pvid, svid, phid1;
Becky Bruce63dafe52006-01-14 16:57:39 -0600211
212 pvid = mfspr(SPRN_PVR);
213 svid = mfspr(SPRN_SVR);
214
215 seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
Becky Bruce63dafe52006-01-14 16:57:39 -0600216 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
217 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
218
219 /* Display cpu Pll setting */
220 phid1 = mfspr(SPRN_HID1);
221 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
Becky Bruce63dafe52006-01-14 16:57:39 -0600222}
223
Scott Wood8abc8f52007-10-08 16:08:51 -0500224static struct of_device_id __initdata of_bus_ids[] = {
225 { .name = "soc", },
226 { .type = "soc", },
227 { .name = "cpm", },
228 { .name = "localbus", },
Kim Phillipscf0d19f2008-07-29 15:29:24 -0500229 { .compatible = "simple-bus", },
Anton Vorontsov84ba4a52009-03-19 21:01:48 +0300230 { .compatible = "gianfar", },
Scott Wood8abc8f52007-10-08 16:08:51 -0500231 {},
232};
233
234static int __init declare_of_platform_devices(void)
235{
Scott Wood8abc8f52007-10-08 16:08:51 -0500236 of_platform_bus_probe(NULL, of_bus_ids, NULL);
Kumar Gala277982e2008-01-15 09:42:36 -0600237
Scott Wood8abc8f52007-10-08 16:08:51 -0500238 return 0;
239}
Kumar Gala277982e2008-01-15 09:42:36 -0600240machine_device_initcall(mpc85xx_ads, declare_of_platform_devices);
Scott Wood8abc8f52007-10-08 16:08:51 -0500241
Kumar Gala72d2c3e2006-03-30 23:39:57 -0600242/*
243 * Called very early, device-tree isn't unflattened
244 */
245static int __init mpc85xx_ads_probe(void)
Becky Bruce63dafe52006-01-14 16:57:39 -0600246{
Kumar Gala6936c622007-02-17 16:19:34 -0600247 unsigned long root = of_get_flat_dt_root();
248
249 return of_flat_dt_is_compatible(root, "MPC85xxADS");
Becky Bruce63dafe52006-01-14 16:57:39 -0600250}
Kumar Gala72d2c3e2006-03-30 23:39:57 -0600251
252define_machine(mpc85xx_ads) {
253 .name = "MPC85xx ADS",
254 .probe = mpc85xx_ads_probe,
255 .setup_arch = mpc85xx_ads_setup_arch,
256 .init_IRQ = mpc85xx_ads_pic_init,
257 .show_cpuinfo = mpc85xx_ads_show_cpuinfo,
258 .get_irq = mpic_get_irq,
Kumar Galae1c15752007-10-04 01:04:57 -0500259 .restart = fsl_rstcr_restart,
Kumar Gala72d2c3e2006-03-30 23:39:57 -0600260 .calibrate_decr = generic_calibrate_decr,
261 .progress = udbg_progress,
262};