| Magnus Damm | 3d5de27 | 2012-05-16 15:45:54 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree Source for the EMEV2 SoC |
| 3 | * |
| 4 | * Copyright (C) 2012 Renesas Solutions Corp. |
| 5 | * |
| 6 | * This file is licensed under the terms of the GNU General Public License |
| 7 | * version 2. This program is licensed "as is" without any warranty of any |
| 8 | * kind, whether express or implied. |
| 9 | */ |
| 10 | |
| 11 | /include/ "skeleton.dtsi" |
| 12 | |
| 13 | / { |
| 14 | compatible = "renesas,emev2"; |
| 15 | interrupt-parent = <&gic>; |
| 16 | |
| 17 | cpus { |
| 18 | cpu@0 { |
| 19 | compatible = "arm,cortex-a9"; |
| 20 | }; |
| 21 | cpu@1 { |
| 22 | compatible = "arm,cortex-a9"; |
| 23 | }; |
| 24 | }; |
| 25 | |
| 26 | gic: interrupt-controller@e0020000 { |
| 27 | compatible = "arm,cortex-a9-gic"; |
| 28 | interrupt-controller; |
| 29 | #interrupt-cells = <3>; |
| 30 | reg = <0xe0028000 0x1000>, |
| 31 | <0xe0020000 0x0100>; |
| 32 | }; |
| 33 | |
| 34 | sti@e0180000 { |
| 35 | compatible = "renesas,em-sti"; |
| 36 | reg = <0xe0180000 0x54>; |
| 37 | interrupts = <0 125 0>; |
| 38 | }; |
| 39 | |
| 40 | uart@e1020000 { |
| 41 | compatible = "renesas,em-uart"; |
| 42 | reg = <0xe1020000 0x38>; |
| 43 | interrupts = <0 8 0>; |
| 44 | }; |
| 45 | |
| 46 | uart@e1030000 { |
| 47 | compatible = "renesas,em-uart"; |
| 48 | reg = <0xe1030000 0x38>; |
| 49 | interrupts = <0 9 0>; |
| 50 | }; |
| 51 | |
| 52 | uart@e1040000 { |
| 53 | compatible = "renesas,em-uart"; |
| 54 | reg = <0xe1040000 0x38>; |
| 55 | interrupts = <0 10 0>; |
| 56 | }; |
| 57 | |
| 58 | uart@e1050000 { |
| 59 | compatible = "renesas,em-uart"; |
| 60 | reg = <0xe1050000 0x38>; |
| 61 | interrupts = <0 11 0>; |
| 62 | }; |
| 63 | }; |