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Marc Zyngier08dcbfd2015-10-21 10:09:49 +01001/*
2 * Copyright (C) 2015 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#ifndef __ARM_KVM_HYP_H__
19#define __ARM_KVM_HYP_H__
20
21#include <linux/compiler.h>
22#include <linux/kvm_host.h>
23#include <asm/kvm_mmu.h>
Marc Zyngier59cbcdb2016-01-04 15:41:51 +000024#include <asm/vfp.h>
Marc Zyngier08dcbfd2015-10-21 10:09:49 +010025
26#define __hyp_text __section(.hyp.text) notrace
27
28#define kern_hyp_va(v) (v)
29#define hyp_kern_va(v) (v)
30
Marc Zyngier3c295682016-01-02 15:07:13 +000031#define __ACCESS_CP15(CRn, Op1, CRm, Op2) \
32 "mrc", "mcr", __stringify(p15, Op1, %0, CRn, CRm, Op2), u32
33#define __ACCESS_CP15_64(Op1, CRm) \
34 "mrrc", "mcrr", __stringify(p15, Op1, %Q0, %R0, CRm), u64
Marc Zyngier59cbcdb2016-01-04 15:41:51 +000035#define __ACCESS_VFP(CRn) \
36 "mrc", "mcr", __stringify(p10, 7, %0, CRn, cr0, 0), u32
Marc Zyngier3c295682016-01-02 15:07:13 +000037
38#define __write_sysreg(v, r, w, c, t) asm volatile(w " " c : : "r" ((t)(v)))
39#define write_sysreg(v, ...) __write_sysreg(v, __VA_ARGS__)
40
41#define __read_sysreg(r, w, c, t) ({ \
42 t __val; \
43 asm volatile(r " " c : "=r" (__val)); \
44 __val; \
45})
46#define read_sysreg(...) __read_sysreg(__VA_ARGS__)
47
Marc Zyngier33280b42016-01-05 18:38:09 +000048#define write_special(v, r) \
49 asm volatile("msr " __stringify(r) ", %0" : : "r" (v))
50#define read_special(r) ({ \
51 u32 __val; \
52 asm volatile("mrs %0, " __stringify(r) : "=r" (__val)); \
53 __val; \
54})
55
Marc Zyngierc7ce6c62016-01-03 12:55:01 +000056#define TTBR0 __ACCESS_CP15_64(0, c2)
57#define TTBR1 __ACCESS_CP15_64(1, c2)
Marc Zyngier1d58d2c2016-01-02 15:09:54 +000058#define VTTBR __ACCESS_CP15_64(6, c2)
Marc Zyngierc7ce6c62016-01-03 12:55:01 +000059#define PAR __ACCESS_CP15_64(0, c7)
Marc Zyngiere59bff9b2016-01-04 08:54:50 +000060#define CNTV_CVAL __ACCESS_CP15_64(3, c14)
61#define CNTVOFF __ACCESS_CP15_64(4, c14)
62
Marc Zyngier9dddc2d2016-01-05 18:42:49 +000063#define MIDR __ACCESS_CP15(c0, 0, c0, 0)
Marc Zyngierc7ce6c62016-01-03 12:55:01 +000064#define CSSELR __ACCESS_CP15(c0, 2, c0, 0)
Marc Zyngier9dddc2d2016-01-05 18:42:49 +000065#define VPIDR __ACCESS_CP15(c0, 4, c0, 0)
Marc Zyngierc7ce6c62016-01-03 12:55:01 +000066#define VMPIDR __ACCESS_CP15(c0, 4, c0, 5)
67#define SCTLR __ACCESS_CP15(c1, 0, c0, 0)
68#define CPACR __ACCESS_CP15(c1, 0, c0, 2)
Marc Zyngier9dddc2d2016-01-05 18:42:49 +000069#define HCR __ACCESS_CP15(c1, 4, c1, 0)
70#define HDCR __ACCESS_CP15(c1, 4, c1, 1)
Marc Zyngier59cbcdb2016-01-04 15:41:51 +000071#define HCPTR __ACCESS_CP15(c1, 4, c1, 2)
Marc Zyngier9dddc2d2016-01-05 18:42:49 +000072#define HSTR __ACCESS_CP15(c1, 4, c1, 3)
Marc Zyngierc7ce6c62016-01-03 12:55:01 +000073#define TTBCR __ACCESS_CP15(c2, 0, c0, 2)
Marc Zyngierd4c76882016-02-01 19:56:31 +000074#define HTCR __ACCESS_CP15(c2, 4, c0, 2)
75#define VTCR __ACCESS_CP15(c2, 4, c1, 2)
Marc Zyngierc7ce6c62016-01-03 12:55:01 +000076#define DACR __ACCESS_CP15(c3, 0, c0, 0)
77#define DFSR __ACCESS_CP15(c5, 0, c0, 0)
78#define IFSR __ACCESS_CP15(c5, 0, c0, 1)
79#define ADFSR __ACCESS_CP15(c5, 0, c1, 0)
80#define AIFSR __ACCESS_CP15(c5, 0, c1, 1)
Marc Zyngier97e96432016-01-13 19:02:51 +000081#define HSR __ACCESS_CP15(c5, 4, c2, 0)
Marc Zyngierc7ce6c62016-01-03 12:55:01 +000082#define DFAR __ACCESS_CP15(c6, 0, c0, 0)
83#define IFAR __ACCESS_CP15(c6, 0, c0, 2)
Marc Zyngier9dddc2d2016-01-05 18:42:49 +000084#define HDFAR __ACCESS_CP15(c6, 4, c0, 0)
Marc Zyngier97e96432016-01-13 19:02:51 +000085#define HIFAR __ACCESS_CP15(c6, 4, c0, 2)
86#define HPFAR __ACCESS_CP15(c6, 4, c0, 4)
Marc Zyngier1d58d2c2016-01-02 15:09:54 +000087#define ICIALLUIS __ACCESS_CP15(c7, 0, c1, 0)
Marc Zyngier97e96432016-01-13 19:02:51 +000088#define ATS1CPR __ACCESS_CP15(c7, 0, c8, 0)
Marc Zyngier1d58d2c2016-01-02 15:09:54 +000089#define TLBIALLIS __ACCESS_CP15(c8, 0, c3, 0)
90#define TLBIALLNSNHIS __ACCESS_CP15(c8, 4, c3, 4)
Marc Zyngierc7ce6c62016-01-03 12:55:01 +000091#define PRRR __ACCESS_CP15(c10, 0, c2, 0)
92#define NMRR __ACCESS_CP15(c10, 0, c2, 1)
93#define AMAIR0 __ACCESS_CP15(c10, 0, c3, 0)
94#define AMAIR1 __ACCESS_CP15(c10, 0, c3, 1)
95#define VBAR __ACCESS_CP15(c12, 0, c0, 0)
96#define CID __ACCESS_CP15(c13, 0, c0, 1)
97#define TID_URW __ACCESS_CP15(c13, 0, c0, 2)
98#define TID_URO __ACCESS_CP15(c13, 0, c0, 3)
99#define TID_PRIV __ACCESS_CP15(c13, 0, c0, 4)
Marc Zyngier9dddc2d2016-01-05 18:42:49 +0000100#define HTPIDR __ACCESS_CP15(c13, 4, c0, 2)
Marc Zyngierc7ce6c62016-01-03 12:55:01 +0000101#define CNTKCTL __ACCESS_CP15(c14, 0, c1, 0)
Marc Zyngiere59bff9b2016-01-04 08:54:50 +0000102#define CNTV_CTL __ACCESS_CP15(c14, 0, c3, 1)
103#define CNTHCTL __ACCESS_CP15(c14, 4, c1, 0)
104
Marc Zyngier59cbcdb2016-01-04 15:41:51 +0000105#define VFP_FPEXC __ACCESS_VFP(FPEXC)
106
Marc Zyngier68130cb2016-01-28 14:48:42 +0000107/* AArch64 compatibility macros, only for the timer so far */
108#define read_sysreg_el0(r) read_sysreg(r##_el0)
109#define write_sysreg_el0(v, r) write_sysreg(v, r##_el0)
110
111#define cntv_ctl_el0 CNTV_CTL
112#define cntv_cval_el0 CNTV_CVAL
113#define cntvoff_el2 CNTVOFF
114#define cnthctl_el2 CNTHCTL
115
Marc Zyngiere59bff9b2016-01-04 08:54:50 +0000116void __timer_save_state(struct kvm_vcpu *vcpu);
117void __timer_restore_state(struct kvm_vcpu *vcpu);
Marc Zyngierc7ce6c62016-01-03 12:55:01 +0000118
Marc Zyngierc0c2cdb2016-01-04 09:06:11 +0000119void __vgic_v2_save_state(struct kvm_vcpu *vcpu);
120void __vgic_v2_restore_state(struct kvm_vcpu *vcpu);
121
Marc Zyngierc7ce6c62016-01-03 12:55:01 +0000122void __sysreg_save_state(struct kvm_cpu_context *ctxt);
123void __sysreg_restore_state(struct kvm_cpu_context *ctxt);
Marc Zyngier1d58d2c2016-01-02 15:09:54 +0000124
Marc Zyngier59cbcdb2016-01-04 15:41:51 +0000125void asmlinkage __vfp_save_state(struct vfp_hard_struct *vfp);
126void asmlinkage __vfp_restore_state(struct vfp_hard_struct *vfp);
127static inline bool __vfp_enabled(void)
128{
129 return !(read_sysreg(HCPTR) & (HCPTR_TCP(11) | HCPTR_TCP(10)));
130}
131
Marc Zyngier33280b42016-01-05 18:38:09 +0000132void __hyp_text __banked_save_state(struct kvm_cpu_context *ctxt);
133void __hyp_text __banked_restore_state(struct kvm_cpu_context *ctxt);
134
Marc Zyngier89ef2b22016-01-05 18:40:51 +0000135int asmlinkage __guest_enter(struct kvm_vcpu *vcpu,
136 struct kvm_cpu_context *host);
Marc Zyngierbafc6c22016-01-05 18:43:18 +0000137int asmlinkage __hyp_do_panic(const char *, int, u32);
138
Marc Zyngier08dcbfd2015-10-21 10:09:49 +0100139#endif /* __ARM_KVM_HYP_H__ */