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Gabor Juhosd4a67d92011-01-04 21:28:14 +01001/*
Gabor Juhos0bd3acd2011-06-20 21:26:03 +02002 * Atheros AR7XXX/AR9XXX SoC early printk support
Gabor Juhosd4a67d92011-01-04 21:28:14 +01003 *
Gabor Juhos0bd3acd2011-06-20 21:26:03 +02004 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
Gabor Juhosd4a67d92011-01-04 21:28:14 +01005 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11
12#include <linux/io.h>
Gabor Juhos0bd3acd2011-06-20 21:26:03 +020013#include <linux/errno.h>
Gabor Juhosd4a67d92011-01-04 21:28:14 +010014#include <linux/serial_reg.h>
15#include <asm/addrspace.h>
16
Gabor Juhos0bd3acd2011-06-20 21:26:03 +020017#include <asm/mach-ath79/ath79.h>
Gabor Juhosd4a67d92011-01-04 21:28:14 +010018#include <asm/mach-ath79/ar71xx_regs.h>
Gabor Juhos0bd3acd2011-06-20 21:26:03 +020019#include <asm/mach-ath79/ar933x_uart.h>
Gabor Juhosd4a67d92011-01-04 21:28:14 +010020
Gabor Juhos0bd3acd2011-06-20 21:26:03 +020021static void (*_prom_putchar) (unsigned char);
22
23static inline void prom_putchar_wait(void __iomem *reg, u32 mask, u32 val)
Gabor Juhosd4a67d92011-01-04 21:28:14 +010024{
Gabor Juhos0bd3acd2011-06-20 21:26:03 +020025 u32 t;
Gabor Juhosd4a67d92011-01-04 21:28:14 +010026
27 do {
Gabor Juhos0bd3acd2011-06-20 21:26:03 +020028 t = __raw_readl(reg);
29 if ((t & mask) == val)
Gabor Juhosd4a67d92011-01-04 21:28:14 +010030 break;
31 } while (1);
32}
33
Matthias Schifferf5b556c2016-03-24 16:02:52 +010034#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
35
Gabor Juhos0bd3acd2011-06-20 21:26:03 +020036static void prom_putchar_ar71xx(unsigned char ch)
Gabor Juhosd4a67d92011-01-04 21:28:14 +010037{
38 void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE));
39
Matthias Schifferf5b556c2016-03-24 16:02:52 +010040 prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY);
Gabor Juhosd4a67d92011-01-04 21:28:14 +010041 __raw_writel(ch, base + UART_TX * 4);
Matthias Schifferf5b556c2016-03-24 16:02:52 +010042 prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY);
Gabor Juhos0bd3acd2011-06-20 21:26:03 +020043}
44
45static void prom_putchar_ar933x(unsigned char ch)
46{
47 void __iomem *base = (void __iomem *)(KSEG1ADDR(AR933X_UART_BASE));
48
49 prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
50 AR933X_UART_DATA_TX_CSR);
51 __raw_writel(AR933X_UART_DATA_TX_CSR | ch, base + AR933X_UART_DATA_REG);
52 prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
53 AR933X_UART_DATA_TX_CSR);
54}
55
56static void prom_putchar_dummy(unsigned char ch)
57{
58 /* nothing to do */
59}
60
61static void prom_putchar_init(void)
62{
63 void __iomem *base;
64 u32 id;
65
66 base = (void __iomem *)(KSEG1ADDR(AR71XX_RESET_BASE));
67 id = __raw_readl(base + AR71XX_RESET_REG_REV_ID);
68 id &= REV_ID_MAJOR_MASK;
69
70 switch (id) {
71 case REV_ID_MAJOR_AR71XX:
72 case REV_ID_MAJOR_AR7240:
73 case REV_ID_MAJOR_AR7241:
74 case REV_ID_MAJOR_AR7242:
75 case REV_ID_MAJOR_AR913X:
Gabor Juhos703327d2012-03-14 10:45:19 +010076 case REV_ID_MAJOR_AR9341:
77 case REV_ID_MAJOR_AR9342:
78 case REV_ID_MAJOR_AR9344:
Gabor Juhos90898772013-02-15 13:38:15 +000079 case REV_ID_MAJOR_QCA9556:
80 case REV_ID_MAJOR_QCA9558:
Gabor Juhos0bd3acd2011-06-20 21:26:03 +020081 _prom_putchar = prom_putchar_ar71xx;
82 break;
83
84 case REV_ID_MAJOR_AR9330:
85 case REV_ID_MAJOR_AR9331:
86 _prom_putchar = prom_putchar_ar933x;
87 break;
88
89 default:
90 _prom_putchar = prom_putchar_dummy;
91 break;
92 }
93}
94
95void prom_putchar(unsigned char ch)
96{
97 if (!_prom_putchar)
98 prom_putchar_init();
99
100 _prom_putchar(ch);
Gabor Juhosd4a67d92011-01-04 21:28:14 +0100101}