Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Samsung's Exynos4412 based Trats 2 board device tree source |
| 3 | * |
| 4 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. |
| 5 | * http://www.samsung.com |
| 6 | * |
| 7 | * Device tree source file for Samsung's Trats 2 board which is based on |
| 8 | * Samsung's Exynos4412 SoC. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
| 14 | |
| 15 | /dts-v1/; |
| 16 | #include "exynos4412.dtsi" |
Krzysztof Kozlowski | 7eec126 | 2014-09-24 01:22:49 +0900 | [diff] [blame] | 17 | #include <dt-bindings/gpio/gpio.h> |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 18 | |
| 19 | / { |
| 20 | model = "Samsung Trats 2 based on Exynos4412"; |
Sachin Kamat | 8bdb31b | 2014-03-21 02:17:22 +0900 | [diff] [blame] | 21 | compatible = "samsung,trats2", "samsung,exynos4412", "samsung,exynos4"; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 22 | |
Jacek Anaszewski | 9f1eaef | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 23 | aliases { |
Tomasz Stanislawski | 6af2ba9 | 2014-05-09 05:58:59 +0900 | [diff] [blame] | 24 | i2c9 = &i2c_ak8975; |
Beomho Seo | 85cb4e0 | 2014-05-22 07:56:53 +0900 | [diff] [blame] | 25 | i2c10 = &i2c_cm36651; |
Krzysztof Kozlowski | 7eec126 | 2014-09-24 01:22:49 +0900 | [diff] [blame] | 26 | i2c11 = &i2c_max77693; |
Jacek Anaszewski | 9f1eaef | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 27 | }; |
| 28 | |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 29 | memory { |
| 30 | reg = <0x40000000 0x40000000>; |
| 31 | }; |
| 32 | |
| 33 | chosen { |
| 34 | bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5"; |
| 35 | }; |
| 36 | |
| 37 | firmware@0204F000 { |
| 38 | compatible = "samsung,secure-firmware"; |
| 39 | reg = <0x0204F000 0x1000>; |
| 40 | }; |
| 41 | |
| 42 | fixed-rate-clocks { |
| 43 | xxti { |
| 44 | compatible = "samsung,clock-xxti", "fixed-clock"; |
| 45 | clock-frequency = <0>; |
| 46 | }; |
| 47 | |
| 48 | xusbxti { |
| 49 | compatible = "samsung,clock-xusbxti", "fixed-clock"; |
| 50 | clock-frequency = <24000000>; |
| 51 | }; |
| 52 | }; |
| 53 | |
| 54 | regulators { |
| 55 | compatible = "simple-bus"; |
| 56 | #address-cells = <1>; |
| 57 | #size-cells = <0>; |
| 58 | |
| 59 | vemmc_reg: regulator-0 { |
| 60 | compatible = "regulator-fixed"; |
| 61 | regulator-name = "VMEM_VDD_2.8V"; |
| 62 | regulator-min-microvolt = <2800000>; |
| 63 | regulator-max-microvolt = <2800000>; |
| 64 | gpio = <&gpk0 2 0>; |
| 65 | enable-active-high; |
| 66 | }; |
| 67 | |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 68 | cam_io_reg: voltage-regulator-1 { |
| 69 | compatible = "regulator-fixed"; |
| 70 | regulator-name = "CAM_SENSOR_A"; |
| 71 | regulator-min-microvolt = <2800000>; |
| 72 | regulator-max-microvolt = <2800000>; |
| 73 | gpio = <&gpm0 2 0>; |
| 74 | enable-active-high; |
| 75 | }; |
| 76 | |
Andrzej Hajda | 420ae84 | 2014-03-28 12:52:45 +0100 | [diff] [blame] | 77 | lcd_vdd3_reg: voltage-regulator-2 { |
| 78 | compatible = "regulator-fixed"; |
| 79 | regulator-name = "LCD_VDD_2.2V"; |
| 80 | regulator-min-microvolt = <2200000>; |
| 81 | regulator-max-microvolt = <2200000>; |
| 82 | gpio = <&gpc0 1 0>; |
| 83 | enable-active-high; |
| 84 | }; |
| 85 | |
Sylwester Nawrocki | 4cb3786 | 2014-05-09 06:01:40 +0900 | [diff] [blame] | 86 | cam_af_reg: voltage-regulator-3 { |
| 87 | compatible = "regulator-fixed"; |
| 88 | regulator-name = "CAM_AF"; |
| 89 | regulator-min-microvolt = <2800000>; |
| 90 | regulator-max-microvolt = <2800000>; |
| 91 | gpio = <&gpm0 4 0>; |
| 92 | enable-active-high; |
| 93 | }; |
| 94 | |
| 95 | cam_isp_core_reg: voltage-regulator-4 { |
| 96 | compatible = "regulator-fixed"; |
| 97 | regulator-name = "CAM_ISP_CORE_1.2V_EN"; |
| 98 | regulator-min-microvolt = <1200000>; |
| 99 | regulator-max-microvolt = <1200000>; |
| 100 | gpio = <&gpm0 3 0>; |
| 101 | enable-active-high; |
| 102 | regulator-always-on; |
| 103 | }; |
Beomho Seo | 85cb4e0 | 2014-05-22 07:56:53 +0900 | [diff] [blame] | 104 | |
| 105 | ps_als_reg: voltage-regulator-5 { |
| 106 | compatible = "regulator-fixed"; |
| 107 | regulator-name = "LED_A_3.0V"; |
| 108 | regulator-min-microvolt = <3000000>; |
| 109 | regulator-max-microvolt = <3000000>; |
| 110 | gpio = <&gpj0 5 0>; |
| 111 | enable-active-high; |
| 112 | }; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 113 | }; |
| 114 | |
| 115 | gpio-keys { |
| 116 | compatible = "gpio-keys"; |
| 117 | |
| 118 | key-down { |
Beomho Seo | 172ff6c | 2014-05-22 07:57:39 +0900 | [diff] [blame] | 119 | gpios = <&gpx3 3 1>; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 120 | linux,code = <114>; |
| 121 | label = "volume down"; |
| 122 | debounce-interval = <10>; |
| 123 | }; |
| 124 | |
| 125 | key-up { |
Beomho Seo | 172ff6c | 2014-05-22 07:57:39 +0900 | [diff] [blame] | 126 | gpios = <&gpx2 2 1>; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 127 | linux,code = <115>; |
| 128 | label = "volume up"; |
| 129 | debounce-interval = <10>; |
| 130 | }; |
| 131 | |
| 132 | key-power { |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 133 | gpios = <&gpx2 7 1>; |
| 134 | linux,code = <116>; |
| 135 | label = "power"; |
| 136 | debounce-interval = <10>; |
| 137 | gpio-key,wakeup; |
| 138 | }; |
Beomho Seo | 172ff6c | 2014-05-22 07:57:39 +0900 | [diff] [blame] | 139 | |
| 140 | key-ok { |
| 141 | gpios = <&gpx0 1 1>; |
| 142 | linux,code = <139>; |
| 143 | label = "ok"; |
| 144 | debounce-inteval = <10>; |
| 145 | gpio-key,wakeup; |
| 146 | }; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 147 | }; |
| 148 | |
Chanwoo Choi | 4f42378 | 2014-03-18 06:25:59 +0900 | [diff] [blame] | 149 | adc: adc@126C0000 { |
| 150 | vdd-supply = <&ldo3_reg>; |
| 151 | status = "okay"; |
| 152 | }; |
| 153 | |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 154 | i2c@13890000 { |
| 155 | samsung,i2c-sda-delay = <100>; |
| 156 | samsung,i2c-slave-addr = <0x10>; |
| 157 | samsung,i2c-max-bus-freq = <400000>; |
| 158 | pinctrl-0 = <&i2c3_bus>; |
| 159 | pinctrl-names = "default"; |
| 160 | status = "okay"; |
| 161 | |
| 162 | mms114-touchscreen@48 { |
| 163 | compatible = "melfas,mms114"; |
| 164 | reg = <0x48>; |
| 165 | interrupt-parent = <&gpm2>; |
| 166 | interrupts = <3 2>; |
| 167 | x-size = <720>; |
| 168 | y-size = <1280>; |
| 169 | avdd-supply = <&ldo23_reg>; |
| 170 | vdd-supply = <&ldo24_reg>; |
| 171 | }; |
| 172 | }; |
| 173 | |
Sylwester Nawrocki | 4cb3786 | 2014-05-09 06:01:40 +0900 | [diff] [blame] | 174 | i2c_0: i2c@13860000 { |
| 175 | samsung,i2c-sda-delay = <100>; |
| 176 | samsung,i2c-slave-addr = <0x10>; |
| 177 | samsung,i2c-max-bus-freq = <400000>; |
| 178 | pinctrl-0 = <&i2c0_bus>; |
| 179 | pinctrl-names = "default"; |
| 180 | status = "okay"; |
| 181 | |
| 182 | s5c73m3@3c { |
| 183 | compatible = "samsung,s5c73m3"; |
| 184 | reg = <0x3c>; |
| 185 | standby-gpios = <&gpm0 1 1>; /* ISP_STANDBY */ |
| 186 | xshutdown-gpios = <&gpf1 3 1>; /* ISP_RESET */ |
| 187 | vdd-int-supply = <&buck9_reg>; |
| 188 | vddio-cis-supply = <&ldo9_reg>; |
| 189 | vdda-supply = <&ldo17_reg>; |
| 190 | vddio-host-supply = <&ldo18_reg>; |
| 191 | vdd-af-supply = <&cam_af_reg>; |
| 192 | vdd-reg-supply = <&cam_io_reg>; |
| 193 | clock-frequency = <24000000>; |
| 194 | /* CAM_A_CLKOUT */ |
| 195 | clocks = <&camera 0>; |
| 196 | clock-names = "cis_extclk"; |
| 197 | port { |
| 198 | s5c73m3_ep: endpoint { |
| 199 | remote-endpoint = <&csis0_ep>; |
| 200 | data-lanes = <1 2 3 4>; |
| 201 | }; |
| 202 | }; |
| 203 | }; |
| 204 | }; |
| 205 | |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 206 | i2c@138D0000 { |
| 207 | samsung,i2c-sda-delay = <100>; |
| 208 | samsung,i2c-slave-addr = <0x10>; |
| 209 | samsung,i2c-max-bus-freq = <100000>; |
| 210 | pinctrl-0 = <&i2c7_bus>; |
| 211 | pinctrl-names = "default"; |
| 212 | status = "okay"; |
| 213 | |
| 214 | max77686_pmic@09 { |
| 215 | compatible = "maxim,max77686"; |
| 216 | interrupt-parent = <&gpx0>; |
| 217 | interrupts = <7 0>; |
| 218 | reg = <0x09>; |
Tomasz Figa | ada12c4 | 2013-12-12 17:07:21 +0100 | [diff] [blame] | 219 | #clock-cells = <1>; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 220 | |
| 221 | voltage-regulators { |
| 222 | ldo1_reg: ldo1 { |
| 223 | regulator-compatible = "LDO1"; |
| 224 | regulator-name = "VALIVE_1.0V_AP"; |
| 225 | regulator-min-microvolt = <1000000>; |
| 226 | regulator-max-microvolt = <1000000>; |
| 227 | regulator-always-on; |
| 228 | regulator-mem-on; |
| 229 | }; |
| 230 | |
| 231 | ldo2_reg: ldo2 { |
| 232 | regulator-compatible = "LDO2"; |
| 233 | regulator-name = "VM1M2_1.2V_AP"; |
| 234 | regulator-min-microvolt = <1200000>; |
| 235 | regulator-max-microvolt = <1200000>; |
| 236 | regulator-always-on; |
| 237 | regulator-mem-on; |
| 238 | }; |
| 239 | |
| 240 | ldo3_reg: ldo3 { |
| 241 | regulator-compatible = "LDO3"; |
| 242 | regulator-name = "VCC_1.8V_AP"; |
| 243 | regulator-min-microvolt = <1800000>; |
| 244 | regulator-max-microvolt = <1800000>; |
| 245 | regulator-always-on; |
| 246 | regulator-mem-on; |
| 247 | }; |
| 248 | |
| 249 | ldo4_reg: ldo4 { |
| 250 | regulator-compatible = "LDO4"; |
| 251 | regulator-name = "VCC_2.8V_AP"; |
| 252 | regulator-min-microvolt = <2800000>; |
| 253 | regulator-max-microvolt = <2800000>; |
| 254 | regulator-always-on; |
| 255 | regulator-mem-on; |
| 256 | }; |
| 257 | |
| 258 | ldo5_reg: ldo5 { |
| 259 | regulator-compatible = "LDO5"; |
| 260 | regulator-name = "VCC_1.8V_IO"; |
| 261 | regulator-min-microvolt = <1800000>; |
| 262 | regulator-max-microvolt = <1800000>; |
| 263 | regulator-always-on; |
| 264 | regulator-mem-on; |
| 265 | }; |
| 266 | |
| 267 | ldo6_reg: ldo6 { |
| 268 | regulator-compatible = "LDO6"; |
| 269 | regulator-name = "VMPLL_1.0V_AP"; |
| 270 | regulator-min-microvolt = <1000000>; |
| 271 | regulator-max-microvolt = <1000000>; |
| 272 | regulator-always-on; |
| 273 | regulator-mem-on; |
| 274 | }; |
| 275 | |
| 276 | ldo7_reg: ldo7 { |
| 277 | regulator-compatible = "LDO7"; |
| 278 | regulator-name = "VPLL_1.0V_AP"; |
| 279 | regulator-min-microvolt = <1000000>; |
| 280 | regulator-max-microvolt = <1000000>; |
| 281 | regulator-always-on; |
| 282 | regulator-mem-on; |
| 283 | }; |
| 284 | |
| 285 | ldo8_reg: ldo8 { |
| 286 | regulator-compatible = "LDO8"; |
| 287 | regulator-name = "VMIPI_1.0V"; |
| 288 | regulator-min-microvolt = <1000000>; |
| 289 | regulator-max-microvolt = <1000000>; |
| 290 | regulator-mem-off; |
| 291 | }; |
| 292 | |
| 293 | ldo9_reg: ldo9 { |
| 294 | regulator-compatible = "LDO9"; |
| 295 | regulator-name = "CAM_ISP_MIPI_1.2V"; |
| 296 | regulator-min-microvolt = <1200000>; |
| 297 | regulator-max-microvolt = <1200000>; |
| 298 | regulator-mem-idle; |
| 299 | }; |
| 300 | |
| 301 | ldo10_reg: ldo10 { |
| 302 | regulator-compatible = "LDO10"; |
| 303 | regulator-name = "VMIPI_1.8V"; |
| 304 | regulator-min-microvolt = <1800000>; |
| 305 | regulator-max-microvolt = <1800000>; |
| 306 | regulator-mem-off; |
| 307 | }; |
| 308 | |
| 309 | ldo11_reg: ldo11 { |
| 310 | regulator-compatible = "LDO11"; |
| 311 | regulator-name = "VABB1_1.95V"; |
| 312 | regulator-min-microvolt = <1950000>; |
| 313 | regulator-max-microvolt = <1950000>; |
| 314 | regulator-always-on; |
| 315 | regulator-mem-off; |
| 316 | }; |
| 317 | |
| 318 | ldo12_reg: ldo12 { |
| 319 | regulator-compatible = "LDO12"; |
| 320 | regulator-name = "VUOTG_3.0V"; |
| 321 | regulator-min-microvolt = <3000000>; |
| 322 | regulator-max-microvolt = <3000000>; |
| 323 | regulator-mem-off; |
| 324 | }; |
| 325 | |
| 326 | ldo13_reg: ldo13 { |
| 327 | regulator-compatible = "LDO13"; |
| 328 | regulator-name = "NFC_AVDD_1.8V"; |
| 329 | regulator-min-microvolt = <1800000>; |
| 330 | regulator-max-microvolt = <1800000>; |
| 331 | regulator-mem-idle; |
| 332 | }; |
| 333 | |
| 334 | ldo14_reg: ldo14 { |
| 335 | regulator-compatible = "LDO14"; |
| 336 | regulator-name = "VABB2_1.95V"; |
| 337 | regulator-min-microvolt = <1950000>; |
| 338 | regulator-max-microvolt = <1950000>; |
| 339 | regulator-always-on; |
| 340 | regulator-mem-off; |
| 341 | }; |
| 342 | |
| 343 | ldo15_reg: ldo15 { |
| 344 | regulator-compatible = "LDO15"; |
| 345 | regulator-name = "VHSIC_1.0V"; |
| 346 | regulator-min-microvolt = <1000000>; |
| 347 | regulator-max-microvolt = <1000000>; |
| 348 | regulator-mem-off; |
| 349 | }; |
| 350 | |
| 351 | ldo16_reg: ldo16 { |
| 352 | regulator-compatible = "LDO16"; |
| 353 | regulator-name = "VHSIC_1.8V"; |
| 354 | regulator-min-microvolt = <1800000>; |
| 355 | regulator-max-microvolt = <1800000>; |
| 356 | regulator-mem-off; |
| 357 | }; |
| 358 | |
| 359 | ldo17_reg: ldo17 { |
| 360 | regulator-compatible = "LDO17"; |
| 361 | regulator-name = "CAM_SENSOR_CORE_1.2V"; |
| 362 | regulator-min-microvolt = <1200000>; |
| 363 | regulator-max-microvolt = <1200000>; |
| 364 | regulator-mem-idle; |
| 365 | }; |
| 366 | |
| 367 | ldo18_reg: ldo18 { |
| 368 | regulator-compatible = "LDO18"; |
| 369 | regulator-name = "CAM_ISP_SEN_IO_1.8V"; |
| 370 | regulator-min-microvolt = <1800000>; |
| 371 | regulator-max-microvolt = <1800000>; |
| 372 | regulator-mem-idle; |
| 373 | }; |
| 374 | |
| 375 | ldo19_reg: ldo19 { |
| 376 | regulator-compatible = "LDO19"; |
| 377 | regulator-name = "VT_CAM_1.8V"; |
| 378 | regulator-min-microvolt = <1800000>; |
| 379 | regulator-max-microvolt = <1800000>; |
| 380 | regulator-mem-idle; |
| 381 | }; |
| 382 | |
| 383 | ldo20_reg: ldo20 { |
| 384 | regulator-compatible = "LDO20"; |
| 385 | regulator-name = "VDDQ_PRE_1.8V"; |
| 386 | regulator-min-microvolt = <1800000>; |
| 387 | regulator-max-microvolt = <1800000>; |
| 388 | regulator-mem-idle; |
| 389 | }; |
| 390 | |
| 391 | ldo21_reg: ldo21 { |
| 392 | regulator-compatible = "LDO21"; |
| 393 | regulator-name = "VTF_2.8V"; |
| 394 | regulator-min-microvolt = <2800000>; |
| 395 | regulator-max-microvolt = <2800000>; |
| 396 | regulator-mem-idle; |
| 397 | }; |
| 398 | |
| 399 | ldo22_reg: ldo22 { |
| 400 | regulator-compatible = "LDO22"; |
| 401 | regulator-name = "VMEM_VDD_2.8V"; |
| 402 | regulator-min-microvolt = <2800000>; |
| 403 | regulator-max-microvolt = <2800000>; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 404 | }; |
| 405 | |
| 406 | ldo23_reg: ldo23 { |
| 407 | regulator-compatible = "LDO23"; |
| 408 | regulator-name = "TSP_AVDD_3.3V"; |
| 409 | regulator-min-microvolt = <3300000>; |
| 410 | regulator-max-microvolt = <3300000>; |
| 411 | regulator-mem-idle; |
| 412 | }; |
| 413 | |
| 414 | ldo24_reg: ldo24 { |
| 415 | regulator-compatible = "LDO24"; |
| 416 | regulator-name = "TSP_VDD_1.8V"; |
| 417 | regulator-min-microvolt = <1800000>; |
| 418 | regulator-max-microvolt = <1800000>; |
| 419 | regulator-mem-idle; |
| 420 | }; |
| 421 | |
| 422 | ldo25_reg: ldo25 { |
| 423 | regulator-compatible = "LDO25"; |
| 424 | regulator-name = "LCD_VCC_3.3V"; |
| 425 | regulator-min-microvolt = <2800000>; |
| 426 | regulator-max-microvolt = <2800000>; |
| 427 | regulator-mem-idle; |
| 428 | }; |
| 429 | |
| 430 | ldo26_reg: ldo26 { |
| 431 | regulator-compatible = "LDO26"; |
| 432 | regulator-name = "MOTOR_VCC_3.0V"; |
| 433 | regulator-min-microvolt = <3000000>; |
| 434 | regulator-max-microvolt = <3000000>; |
| 435 | regulator-mem-idle; |
| 436 | }; |
| 437 | |
| 438 | buck1_reg: buck1 { |
| 439 | regulator-compatible = "BUCK1"; |
| 440 | regulator-name = "vdd_mif"; |
| 441 | regulator-min-microvolt = <850000>; |
| 442 | regulator-max-microvolt = <1100000>; |
| 443 | regulator-always-on; |
| 444 | regulator-boot-on; |
| 445 | regulator-mem-off; |
| 446 | }; |
| 447 | |
| 448 | buck2_reg: buck2 { |
| 449 | regulator-compatible = "BUCK2"; |
| 450 | regulator-name = "vdd_arm"; |
| 451 | regulator-min-microvolt = <850000>; |
| 452 | regulator-max-microvolt = <1500000>; |
| 453 | regulator-always-on; |
| 454 | regulator-boot-on; |
| 455 | regulator-mem-off; |
| 456 | }; |
| 457 | |
| 458 | buck3_reg: buck3 { |
| 459 | regulator-compatible = "BUCK3"; |
| 460 | regulator-name = "vdd_int"; |
| 461 | regulator-min-microvolt = <850000>; |
| 462 | regulator-max-microvolt = <1150000>; |
| 463 | regulator-always-on; |
| 464 | regulator-boot-on; |
| 465 | regulator-mem-off; |
| 466 | }; |
| 467 | |
| 468 | buck4_reg: buck4 { |
| 469 | regulator-compatible = "BUCK4"; |
| 470 | regulator-name = "vdd_g3d"; |
| 471 | regulator-min-microvolt = <850000>; |
| 472 | regulator-max-microvolt = <1150000>; |
| 473 | regulator-boot-on; |
| 474 | regulator-mem-off; |
| 475 | }; |
| 476 | |
| 477 | buck5_reg: buck5 { |
| 478 | regulator-compatible = "BUCK5"; |
| 479 | regulator-name = "VMEM_1.2V_AP"; |
| 480 | regulator-min-microvolt = <1200000>; |
| 481 | regulator-max-microvolt = <1200000>; |
| 482 | regulator-always-on; |
| 483 | }; |
| 484 | |
| 485 | buck6_reg: buck6 { |
| 486 | regulator-compatible = "BUCK6"; |
| 487 | regulator-name = "VCC_SUB_1.35V"; |
| 488 | regulator-min-microvolt = <1350000>; |
| 489 | regulator-max-microvolt = <1350000>; |
| 490 | regulator-always-on; |
| 491 | }; |
| 492 | |
| 493 | buck7_reg: buck7 { |
| 494 | regulator-compatible = "BUCK7"; |
| 495 | regulator-name = "VCC_SUB_2.0V"; |
| 496 | regulator-min-microvolt = <2000000>; |
| 497 | regulator-max-microvolt = <2000000>; |
| 498 | regulator-always-on; |
| 499 | }; |
| 500 | |
| 501 | buck8_reg: buck8 { |
| 502 | regulator-compatible = "BUCK8"; |
| 503 | regulator-name = "VMEM_VDDF_3.0V"; |
| 504 | regulator-min-microvolt = <2850000>; |
| 505 | regulator-max-microvolt = <2850000>; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 506 | }; |
| 507 | |
| 508 | buck9_reg: buck9 { |
| 509 | regulator-compatible = "BUCK9"; |
| 510 | regulator-name = "CAM_ISP_CORE_1.2V"; |
| 511 | regulator-min-microvolt = <1000000>; |
| 512 | regulator-max-microvolt = <1200000>; |
| 513 | regulator-mem-off; |
| 514 | }; |
| 515 | }; |
| 516 | }; |
| 517 | }; |
| 518 | |
Krzysztof Kozlowski | 7eec126 | 2014-09-24 01:22:49 +0900 | [diff] [blame] | 519 | i2c_max77693: i2c-gpio-1 { |
| 520 | compatible = "i2c-gpio"; |
| 521 | gpios = <&gpm2 0 GPIO_ACTIVE_HIGH>, <&gpm2 1 GPIO_ACTIVE_HIGH>; |
| 522 | i2c-gpio,delay-us = <2>; |
| 523 | #address-cells = <1>; |
| 524 | #size-cells = <0>; |
| 525 | status = "okay"; |
| 526 | |
| 527 | max77693@66 { |
| 528 | compatible = "maxim,max77693"; |
| 529 | interrupt-parent = <&gpx1>; |
| 530 | interrupts = <5 2>; |
| 531 | reg = <0x66>; |
| 532 | |
| 533 | regulators { |
| 534 | esafeout1_reg: ESAFEOUT1@1 { |
| 535 | regulator-name = "ESAFEOUT1"; |
| 536 | }; |
| 537 | esafeout2_reg: ESAFEOUT2@2 { |
| 538 | regulator-name = "ESAFEOUT2"; |
| 539 | }; |
| 540 | charger_reg: CHARGER@0 { |
| 541 | regulator-name = "CHARGER"; |
| 542 | regulator-min-microamp = <60000>; |
| 543 | regulator-max-microamp = <2580000>; |
| 544 | }; |
| 545 | }; |
Jaewon Kim | d9c6808 | 2014-11-22 23:19:22 +0900 | [diff] [blame] | 546 | |
| 547 | max77693_haptic { |
| 548 | compatible = "maxim,max77693-haptic"; |
| 549 | haptic-supply = <&ldo26_reg>; |
| 550 | pwms = <&pwm 0 38022 0>; |
| 551 | }; |
Krzysztof Kozlowski | 7eec126 | 2014-09-24 01:22:49 +0900 | [diff] [blame] | 552 | }; |
| 553 | }; |
| 554 | |
Tomasz Figa | ca7c11f | 2013-12-21 07:38:19 +0900 | [diff] [blame] | 555 | mmc@12550000 { |
| 556 | num-slots = <1>; |
Tomasz Figa | ca7c11f | 2013-12-21 07:38:19 +0900 | [diff] [blame] | 557 | broken-cd; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 558 | non-removable; |
Tomasz Figa | ca7c11f | 2013-12-21 07:38:19 +0900 | [diff] [blame] | 559 | card-detect-delay = <200>; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 560 | vmmc-supply = <&vemmc_reg>; |
Tomasz Figa | ca7c11f | 2013-12-21 07:38:19 +0900 | [diff] [blame] | 561 | clock-frequency = <400000000>; |
| 562 | samsung,dw-mshc-ciu-div = <0>; |
| 563 | samsung,dw-mshc-sdr-timing = <2 3>; |
| 564 | samsung,dw-mshc-ddr-timing = <1 2>; |
| 565 | pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; |
| 566 | pinctrl-names = "default"; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 567 | status = "okay"; |
Jaehoon Chung | aaa25a5 | 2014-08-18 11:55:32 -0500 | [diff] [blame] | 568 | bus-width = <8>; |
| 569 | cap-mmc-highspeed; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 570 | }; |
| 571 | |
Krzysztof Kozlowski | a427d15 | 2014-11-07 08:22:49 +0900 | [diff] [blame] | 572 | sdhci@12530000 { |
| 573 | bus-width = <4>; |
| 574 | cd-gpios = <&gpx3 4 0>; |
| 575 | cd-inverted; |
| 576 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>; |
| 577 | pinctrl-names = "default"; |
| 578 | vmmc-supply = <&ldo21_reg>; |
| 579 | status = "okay"; |
| 580 | }; |
| 581 | |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 582 | serial@13800000 { |
| 583 | status = "okay"; |
| 584 | }; |
| 585 | |
| 586 | serial@13810000 { |
| 587 | status = "okay"; |
| 588 | }; |
| 589 | |
| 590 | serial@13820000 { |
| 591 | status = "okay"; |
| 592 | }; |
| 593 | |
| 594 | serial@13830000 { |
| 595 | status = "okay"; |
| 596 | }; |
Jacek Anaszewski | 9f1eaef | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 597 | |
Lukasz Majewski | 432047f | 2014-11-22 22:58:09 +0900 | [diff] [blame] | 598 | tmu@100C0000 { |
| 599 | vtmu-supply = <&ldo10_reg>; |
| 600 | status = "okay"; |
| 601 | }; |
| 602 | |
Jacek Anaszewski | 9f1eaef | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 603 | i2c_ak8975: i2c-gpio-0 { |
| 604 | compatible = "i2c-gpio"; |
| 605 | gpios = <&gpy2 4 0>, <&gpy2 5 0>; |
| 606 | i2c-gpio,delay-us = <2>; |
| 607 | #address-cells = <1>; |
| 608 | #size-cells = <0>; |
| 609 | status = "okay"; |
| 610 | |
| 611 | ak8975@0c { |
Beomho Seo | 30cc798 | 2014-05-20 01:12:50 +0900 | [diff] [blame] | 612 | compatible = "asahi-kasei,ak8975"; |
Jacek Anaszewski | 9f1eaef | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 613 | reg = <0x0c>; |
| 614 | gpios = <&gpj0 7 0>; |
| 615 | }; |
| 616 | }; |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 617 | |
Beomho Seo | 85cb4e0 | 2014-05-22 07:56:53 +0900 | [diff] [blame] | 618 | i2c_cm36651: i2c-gpio-2 { |
| 619 | compatible = "i2c-gpio"; |
| 620 | gpios = <&gpf0 0 1>, <&gpf0 1 1>; |
| 621 | i2c-gpio,delay-us = <2>; |
| 622 | #address-cells = <1>; |
| 623 | #size-cells = <0>; |
| 624 | |
| 625 | cm36651@18 { |
| 626 | compatible = "capella,cm36651"; |
| 627 | reg = <0x18>; |
| 628 | interrupt-parent = <&gpx0>; |
| 629 | interrupts = <2 2>; |
| 630 | vled-supply = <&ps_als_reg>; |
| 631 | }; |
| 632 | }; |
| 633 | |
Andrzej Hajda | 201f126 | 2013-08-06 02:49:45 +0900 | [diff] [blame] | 634 | spi_1: spi@13930000 { |
| 635 | pinctrl-names = "default"; |
| 636 | pinctrl-0 = <&spi1_bus>; |
Naveen Krishna Chatradhi | e138d43 | 2014-07-16 17:19:10 +0200 | [diff] [blame] | 637 | cs-gpios = <&gpb 5 0>; |
Andrzej Hajda | 201f126 | 2013-08-06 02:49:45 +0900 | [diff] [blame] | 638 | status = "okay"; |
| 639 | |
| 640 | s5c73m3_spi: s5c73m3 { |
| 641 | compatible = "samsung,s5c73m3"; |
| 642 | spi-max-frequency = <50000000>; |
| 643 | reg = <0>; |
| 644 | controller-data { |
Andrzej Hajda | 201f126 | 2013-08-06 02:49:45 +0900 | [diff] [blame] | 645 | samsung,spi-feedback-delay = <2>; |
| 646 | }; |
| 647 | }; |
| 648 | }; |
| 649 | |
Jaewon Kim | 249358c | 2014-11-22 23:19:18 +0900 | [diff] [blame] | 650 | pwm: pwm@139D0000 { |
| 651 | pinctrl-0 = <&pwm0_out>; |
| 652 | pinctrl-names = "default"; |
| 653 | samsung,pwm-outputs = <0>; |
| 654 | status = "okay"; |
| 655 | }; |
| 656 | |
Andrzej Hajda | 420ae84 | 2014-03-28 12:52:45 +0100 | [diff] [blame] | 657 | dsi_0: dsi@11C80000 { |
| 658 | vddcore-supply = <&ldo8_reg>; |
| 659 | vddio-supply = <&ldo10_reg>; |
| 660 | samsung,pll-clock-frequency = <24000000>; |
| 661 | status = "okay"; |
| 662 | |
| 663 | ports { |
| 664 | #address-cells = <1>; |
| 665 | #size-cells = <0>; |
| 666 | |
| 667 | port@1 { |
| 668 | reg = <1>; |
| 669 | |
| 670 | dsi_out: endpoint { |
| 671 | remote-endpoint = <&dsi_in>; |
| 672 | samsung,burst-clock-frequency = <500000000>; |
| 673 | samsung,esc-clock-frequency = <20000000>; |
| 674 | }; |
| 675 | }; |
| 676 | }; |
| 677 | |
| 678 | panel@0 { |
| 679 | compatible = "samsung,s6e8aa0"; |
| 680 | reg = <0>; |
| 681 | vdd3-supply = <&lcd_vdd3_reg>; |
| 682 | vci-supply = <&ldo25_reg>; |
| 683 | reset-gpios = <&gpy4 5 0>; |
| 684 | power-on-delay= <50>; |
| 685 | reset-delay = <100>; |
| 686 | init-delay = <100>; |
| 687 | flip-horizontal; |
| 688 | flip-vertical; |
| 689 | panel-width-mm = <58>; |
| 690 | panel-height-mm = <103>; |
| 691 | |
| 692 | display-timings { |
| 693 | timing-0 { |
| 694 | clock-frequency = <0>; |
| 695 | hactive = <720>; |
| 696 | vactive = <1280>; |
| 697 | hfront-porch = <5>; |
| 698 | hback-porch = <5>; |
| 699 | hsync-len = <5>; |
| 700 | vfront-porch = <13>; |
| 701 | vback-porch = <1>; |
| 702 | vsync-len = <2>; |
| 703 | }; |
| 704 | }; |
| 705 | |
| 706 | port { |
| 707 | dsi_in: endpoint { |
| 708 | remote-endpoint = <&dsi_out>; |
| 709 | }; |
| 710 | }; |
| 711 | }; |
| 712 | }; |
| 713 | |
Andrzej Hajda | bbab1e3f | 2014-03-28 12:52:47 +0100 | [diff] [blame] | 714 | fimd@11c00000 { |
| 715 | status = "okay"; |
| 716 | }; |
| 717 | |
Sylwester Nawrocki | 4cb3786 | 2014-05-09 06:01:40 +0900 | [diff] [blame] | 718 | camera: camera { |
| 719 | pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>; |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 720 | pinctrl-names = "default"; |
| 721 | status = "okay"; |
Sylwester Nawrocki | 0357a44 | 2014-11-22 23:13:03 +0900 | [diff] [blame] | 722 | assigned-clocks = <&clock CLK_MOUT_CAM0>, |
| 723 | <&clock CLK_MOUT_CAM1>; |
| 724 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>, |
| 725 | <&clock CLK_MOUT_MPLL_USER_T>; |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 726 | |
| 727 | fimc_0: fimc@11800000 { |
| 728 | status = "okay"; |
Sylwester Nawrocki | 0357a44 | 2014-11-22 23:13:03 +0900 | [diff] [blame] | 729 | assigned-clocks = <&clock CLK_MOUT_FIMC0>, |
| 730 | <&clock CLK_SCLK_FIMC0>; |
| 731 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; |
| 732 | assigned-clock-rates = <0>, <176000000>; |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 733 | }; |
| 734 | |
| 735 | fimc_1: fimc@11810000 { |
| 736 | status = "okay"; |
Sylwester Nawrocki | 0357a44 | 2014-11-22 23:13:03 +0900 | [diff] [blame] | 737 | assigned-clocks = <&clock CLK_MOUT_FIMC1>, |
| 738 | <&clock CLK_SCLK_FIMC1>; |
| 739 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; |
| 740 | assigned-clock-rates = <0>, <176000000>; |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 741 | }; |
| 742 | |
| 743 | fimc_2: fimc@11820000 { |
| 744 | status = "okay"; |
Sylwester Nawrocki | 0357a44 | 2014-11-22 23:13:03 +0900 | [diff] [blame] | 745 | assigned-clocks = <&clock CLK_MOUT_FIMC2>, |
| 746 | <&clock CLK_SCLK_FIMC2>; |
| 747 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; |
| 748 | assigned-clock-rates = <0>, <176000000>; |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 749 | }; |
| 750 | |
| 751 | fimc_3: fimc@11830000 { |
| 752 | status = "okay"; |
Sylwester Nawrocki | 0357a44 | 2014-11-22 23:13:03 +0900 | [diff] [blame] | 753 | assigned-clocks = <&clock CLK_MOUT_FIMC3>, |
| 754 | <&clock CLK_SCLK_FIMC3>; |
| 755 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; |
| 756 | assigned-clock-rates = <0>, <176000000>; |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 757 | }; |
| 758 | |
Sylwester Nawrocki | 4cb3786 | 2014-05-09 06:01:40 +0900 | [diff] [blame] | 759 | csis_0: csis@11880000 { |
| 760 | status = "okay"; |
| 761 | vddcore-supply = <&ldo8_reg>; |
| 762 | vddio-supply = <&ldo10_reg>; |
Sylwester Nawrocki | 0357a44 | 2014-11-22 23:13:03 +0900 | [diff] [blame] | 763 | assigned-clocks = <&clock CLK_MOUT_CSIS0>, |
| 764 | <&clock CLK_SCLK_CSIS0>; |
| 765 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; |
| 766 | assigned-clock-rates = <0>, <176000000>; |
Sylwester Nawrocki | 4cb3786 | 2014-05-09 06:01:40 +0900 | [diff] [blame] | 767 | |
| 768 | /* Camera C (3) MIPI CSI-2 (CSIS0) */ |
| 769 | port@3 { |
| 770 | reg = <3>; |
| 771 | csis0_ep: endpoint { |
| 772 | remote-endpoint = <&s5c73m3_ep>; |
| 773 | data-lanes = <1 2 3 4>; |
| 774 | samsung,csis-hs-settle = <12>; |
| 775 | }; |
| 776 | }; |
| 777 | }; |
| 778 | |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 779 | csis_1: csis@11890000 { |
Sylwester Nawrocki | 0357a44 | 2014-11-22 23:13:03 +0900 | [diff] [blame] | 780 | status = "okay"; |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 781 | vddcore-supply = <&ldo8_reg>; |
| 782 | vddio-supply = <&ldo10_reg>; |
Sylwester Nawrocki | 0357a44 | 2014-11-22 23:13:03 +0900 | [diff] [blame] | 783 | assigned-clocks = <&clock CLK_MOUT_CSIS1>, |
| 784 | <&clock CLK_SCLK_CSIS1>; |
| 785 | assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>; |
| 786 | assigned-clock-rates = <0>, <176000000>; |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 787 | |
| 788 | /* Camera D (4) MIPI CSI-2 (CSIS1) */ |
| 789 | port@4 { |
| 790 | reg = <4>; |
| 791 | csis1_ep: endpoint { |
| 792 | remote-endpoint = <&is_s5k6a3_ep>; |
| 793 | data-lanes = <1>; |
| 794 | samsung,csis-hs-settle = <18>; |
| 795 | samsung,csis-wclk; |
| 796 | }; |
| 797 | }; |
| 798 | }; |
| 799 | |
| 800 | fimc_lite_0: fimc-lite@12390000 { |
| 801 | status = "okay"; |
| 802 | }; |
| 803 | |
| 804 | fimc_lite_1: fimc-lite@123A0000 { |
| 805 | status = "okay"; |
| 806 | }; |
| 807 | |
| 808 | fimc-is@12000000 { |
| 809 | pinctrl-0 = <&fimc_is_uart>; |
| 810 | pinctrl-names = "default"; |
| 811 | status = "okay"; |
| 812 | |
| 813 | i2c1_isp: i2c-isp@12140000 { |
| 814 | pinctrl-0 = <&fimc_is_i2c1>; |
| 815 | pinctrl-names = "default"; |
| 816 | |
| 817 | s5k6a3@10 { |
| 818 | compatible = "samsung,s5k6a3"; |
| 819 | reg = <0x10>; |
| 820 | svdda-supply = <&cam_io_reg>; |
| 821 | svddio-supply = <&ldo19_reg>; |
Sylwester Nawrocki | ee5eda6 | 2014-05-09 06:00:35 +0900 | [diff] [blame] | 822 | afvdd-supply = <&ldo19_reg>; |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 823 | clock-frequency = <24000000>; |
| 824 | /* CAM_B_CLKOUT */ |
Sylwester Nawrocki | ee5eda6 | 2014-05-09 06:00:35 +0900 | [diff] [blame] | 825 | clocks = <&camera 1>; |
| 826 | clock-names = "extclk"; |
Sylwester Nawrocki | b4fec64 | 2013-08-06 02:49:44 +0900 | [diff] [blame] | 827 | samsung,camclk-out = <1>; |
| 828 | gpios = <&gpm1 6 0>; |
| 829 | |
| 830 | port { |
| 831 | is_s5k6a3_ep: endpoint { |
| 832 | remote-endpoint = <&csis1_ep>; |
| 833 | data-lanes = <1>; |
| 834 | }; |
| 835 | }; |
| 836 | }; |
| 837 | }; |
| 838 | }; |
| 839 | }; |
Chanwoo Choi | 4f42378 | 2014-03-18 06:25:59 +0900 | [diff] [blame] | 840 | |
Chanho Park | 3c8977f | 2014-05-23 03:30:21 +0900 | [diff] [blame] | 841 | exynos-usbphy@125B0000 { |
| 842 | status = "okay"; |
| 843 | }; |
| 844 | |
| 845 | hsotg@12480000 { |
| 846 | vusb_d-supply = <&ldo15_reg>; |
| 847 | vusb_a-supply = <&ldo12_reg>; |
| 848 | status = "okay"; |
| 849 | }; |
| 850 | |
Chanwoo Choi | 4f42378 | 2014-03-18 06:25:59 +0900 | [diff] [blame] | 851 | thermistor-ap@0 { |
| 852 | compatible = "ntc,ncp15wb473"; |
| 853 | pullup-uv = <1800000>; /* VCC_1.8V_AP */ |
| 854 | pullup-ohm = <100000>; /* 100K */ |
| 855 | pulldown-ohm = <100000>; /* 100K */ |
| 856 | io-channels = <&adc 1>; /* AP temperature */ |
| 857 | }; |
| 858 | |
| 859 | thermistor-battery@1 { |
| 860 | compatible = "ntc,ncp15wb473"; |
| 861 | pullup-uv = <1800000>; /* VCC_1.8V_AP */ |
| 862 | pullup-ohm = <100000>; /* 100K */ |
| 863 | pulldown-ohm = <100000>; /* 100K */ |
| 864 | io-channels = <&adc 2>; /* Battery temperature */ |
| 865 | }; |
Tomasz Figa | 15dfdfa | 2013-07-24 13:41:45 +0900 | [diff] [blame] | 866 | }; |
Tomasz Figa | 09918a9 | 2014-09-24 01:20:03 +0900 | [diff] [blame] | 867 | |
| 868 | &pinctrl_0 { |
| 869 | pinctrl-names = "default"; |
| 870 | pinctrl-0 = <&sleep0>; |
| 871 | |
| 872 | sleep0: sleep-states { |
| 873 | PIN_SLP(gpa0-0, INPUT, NONE); |
| 874 | PIN_SLP(gpa0-1, OUT0, NONE); |
| 875 | PIN_SLP(gpa0-2, INPUT, NONE); |
| 876 | PIN_SLP(gpa0-3, INPUT, UP); |
| 877 | PIN_SLP(gpa0-4, INPUT, NONE); |
| 878 | PIN_SLP(gpa0-5, INPUT, DOWN); |
| 879 | PIN_SLP(gpa0-6, INPUT, DOWN); |
| 880 | PIN_SLP(gpa0-7, INPUT, UP); |
| 881 | |
| 882 | PIN_SLP(gpa1-0, INPUT, DOWN); |
| 883 | PIN_SLP(gpa1-1, INPUT, DOWN); |
| 884 | PIN_SLP(gpa1-2, INPUT, DOWN); |
| 885 | PIN_SLP(gpa1-3, INPUT, DOWN); |
| 886 | PIN_SLP(gpa1-4, INPUT, DOWN); |
| 887 | PIN_SLP(gpa1-5, INPUT, DOWN); |
| 888 | |
| 889 | PIN_SLP(gpb-0, INPUT, NONE); |
| 890 | PIN_SLP(gpb-1, INPUT, NONE); |
| 891 | PIN_SLP(gpb-2, INPUT, NONE); |
| 892 | PIN_SLP(gpb-3, INPUT, NONE); |
| 893 | PIN_SLP(gpb-4, INPUT, DOWN); |
| 894 | PIN_SLP(gpb-5, INPUT, UP); |
| 895 | PIN_SLP(gpb-6, INPUT, DOWN); |
| 896 | PIN_SLP(gpb-7, INPUT, DOWN); |
| 897 | |
| 898 | PIN_SLP(gpc0-0, INPUT, DOWN); |
| 899 | PIN_SLP(gpc0-1, INPUT, DOWN); |
| 900 | PIN_SLP(gpc0-2, INPUT, DOWN); |
| 901 | PIN_SLP(gpc0-3, INPUT, DOWN); |
| 902 | PIN_SLP(gpc0-4, INPUT, DOWN); |
| 903 | |
| 904 | PIN_SLP(gpc1-0, INPUT, NONE); |
| 905 | PIN_SLP(gpc1-1, PREV, NONE); |
| 906 | PIN_SLP(gpc1-2, INPUT, NONE); |
| 907 | PIN_SLP(gpc1-3, INPUT, NONE); |
| 908 | PIN_SLP(gpc1-4, INPUT, NONE); |
| 909 | |
| 910 | PIN_SLP(gpd0-0, INPUT, DOWN); |
| 911 | PIN_SLP(gpd0-1, INPUT, DOWN); |
| 912 | PIN_SLP(gpd0-2, INPUT, NONE); |
| 913 | PIN_SLP(gpd0-3, INPUT, NONE); |
| 914 | |
| 915 | PIN_SLP(gpd1-0, INPUT, DOWN); |
| 916 | PIN_SLP(gpd1-1, INPUT, DOWN); |
| 917 | PIN_SLP(gpd1-2, INPUT, NONE); |
| 918 | PIN_SLP(gpd1-3, INPUT, NONE); |
| 919 | |
| 920 | PIN_SLP(gpf0-0, INPUT, NONE); |
| 921 | PIN_SLP(gpf0-1, INPUT, NONE); |
| 922 | PIN_SLP(gpf0-2, INPUT, DOWN); |
| 923 | PIN_SLP(gpf0-3, INPUT, DOWN); |
| 924 | PIN_SLP(gpf0-4, INPUT, NONE); |
| 925 | PIN_SLP(gpf0-5, INPUT, DOWN); |
| 926 | PIN_SLP(gpf0-6, INPUT, NONE); |
| 927 | PIN_SLP(gpf0-7, INPUT, DOWN); |
| 928 | |
| 929 | PIN_SLP(gpf1-0, INPUT, DOWN); |
| 930 | PIN_SLP(gpf1-1, INPUT, DOWN); |
| 931 | PIN_SLP(gpf1-2, INPUT, DOWN); |
| 932 | PIN_SLP(gpf1-3, INPUT, DOWN); |
| 933 | PIN_SLP(gpf1-4, INPUT, NONE); |
| 934 | PIN_SLP(gpf1-5, INPUT, NONE); |
| 935 | PIN_SLP(gpf1-6, INPUT, DOWN); |
| 936 | PIN_SLP(gpf1-7, PREV, NONE); |
| 937 | |
| 938 | PIN_SLP(gpf2-0, PREV, NONE); |
| 939 | PIN_SLP(gpf2-1, INPUT, DOWN); |
| 940 | PIN_SLP(gpf2-2, INPUT, DOWN); |
| 941 | PIN_SLP(gpf2-3, INPUT, DOWN); |
| 942 | PIN_SLP(gpf2-4, INPUT, DOWN); |
| 943 | PIN_SLP(gpf2-5, INPUT, DOWN); |
| 944 | PIN_SLP(gpf2-6, INPUT, NONE); |
| 945 | PIN_SLP(gpf2-7, INPUT, NONE); |
| 946 | |
| 947 | PIN_SLP(gpf3-0, INPUT, NONE); |
| 948 | PIN_SLP(gpf3-1, PREV, NONE); |
| 949 | PIN_SLP(gpf3-2, PREV, NONE); |
| 950 | PIN_SLP(gpf3-3, PREV, NONE); |
| 951 | PIN_SLP(gpf3-4, OUT1, NONE); |
| 952 | PIN_SLP(gpf3-5, INPUT, DOWN); |
| 953 | |
| 954 | PIN_SLP(gpj0-0, PREV, NONE); |
| 955 | PIN_SLP(gpj0-1, PREV, NONE); |
| 956 | PIN_SLP(gpj0-2, PREV, NONE); |
| 957 | PIN_SLP(gpj0-3, INPUT, DOWN); |
| 958 | PIN_SLP(gpj0-4, PREV, NONE); |
| 959 | PIN_SLP(gpj0-5, PREV, NONE); |
| 960 | PIN_SLP(gpj0-6, INPUT, DOWN); |
| 961 | PIN_SLP(gpj0-7, INPUT, DOWN); |
| 962 | |
| 963 | PIN_SLP(gpj1-0, INPUT, DOWN); |
| 964 | PIN_SLP(gpj1-1, PREV, NONE); |
| 965 | PIN_SLP(gpj1-2, PREV, NONE); |
| 966 | PIN_SLP(gpj1-3, INPUT, DOWN); |
| 967 | PIN_SLP(gpj1-4, INPUT, DOWN); |
| 968 | }; |
| 969 | }; |
| 970 | |
| 971 | &pinctrl_1 { |
| 972 | pinctrl-names = "default"; |
| 973 | pinctrl-0 = <&sleep1>; |
| 974 | |
| 975 | sleep1: sleep-states { |
| 976 | PIN_SLP(gpk0-0, PREV, NONE); |
| 977 | PIN_SLP(gpk0-1, PREV, NONE); |
| 978 | PIN_SLP(gpk0-2, OUT0, NONE); |
| 979 | PIN_SLP(gpk0-3, PREV, NONE); |
| 980 | PIN_SLP(gpk0-4, PREV, NONE); |
| 981 | PIN_SLP(gpk0-5, PREV, NONE); |
| 982 | PIN_SLP(gpk0-6, PREV, NONE); |
| 983 | |
| 984 | PIN_SLP(gpk1-0, INPUT, DOWN); |
| 985 | PIN_SLP(gpk1-1, INPUT, DOWN); |
| 986 | PIN_SLP(gpk1-2, INPUT, DOWN); |
| 987 | PIN_SLP(gpk1-3, PREV, NONE); |
| 988 | PIN_SLP(gpk1-4, PREV, NONE); |
| 989 | PIN_SLP(gpk1-5, PREV, NONE); |
| 990 | PIN_SLP(gpk1-6, PREV, NONE); |
| 991 | |
| 992 | PIN_SLP(gpk2-0, INPUT, DOWN); |
| 993 | PIN_SLP(gpk2-1, INPUT, DOWN); |
| 994 | PIN_SLP(gpk2-2, INPUT, DOWN); |
| 995 | PIN_SLP(gpk2-3, INPUT, DOWN); |
| 996 | PIN_SLP(gpk2-4, INPUT, DOWN); |
| 997 | PIN_SLP(gpk2-5, INPUT, DOWN); |
| 998 | PIN_SLP(gpk2-6, INPUT, DOWN); |
| 999 | |
| 1000 | PIN_SLP(gpk3-0, OUT0, NONE); |
| 1001 | PIN_SLP(gpk3-1, INPUT, NONE); |
| 1002 | PIN_SLP(gpk3-2, INPUT, DOWN); |
| 1003 | PIN_SLP(gpk3-3, INPUT, NONE); |
| 1004 | PIN_SLP(gpk3-4, INPUT, NONE); |
| 1005 | PIN_SLP(gpk3-5, INPUT, NONE); |
| 1006 | PIN_SLP(gpk3-6, INPUT, NONE); |
| 1007 | |
| 1008 | PIN_SLP(gpl0-0, INPUT, DOWN); |
| 1009 | PIN_SLP(gpl0-1, INPUT, DOWN); |
| 1010 | PIN_SLP(gpl0-2, INPUT, DOWN); |
| 1011 | PIN_SLP(gpl0-3, INPUT, DOWN); |
| 1012 | PIN_SLP(gpl0-4, PREV, NONE); |
| 1013 | PIN_SLP(gpl0-6, PREV, NONE); |
| 1014 | |
| 1015 | PIN_SLP(gpl1-0, INPUT, DOWN); |
| 1016 | PIN_SLP(gpl1-1, INPUT, DOWN); |
| 1017 | PIN_SLP(gpl2-0, INPUT, DOWN); |
| 1018 | PIN_SLP(gpl2-1, INPUT, DOWN); |
| 1019 | PIN_SLP(gpl2-2, INPUT, DOWN); |
| 1020 | PIN_SLP(gpl2-3, INPUT, DOWN); |
| 1021 | PIN_SLP(gpl2-4, INPUT, DOWN); |
| 1022 | PIN_SLP(gpl2-5, INPUT, DOWN); |
| 1023 | PIN_SLP(gpl2-6, PREV, NONE); |
| 1024 | PIN_SLP(gpl2-7, INPUT, DOWN); |
| 1025 | |
| 1026 | PIN_SLP(gpm0-0, INPUT, DOWN); |
| 1027 | PIN_SLP(gpm0-1, INPUT, DOWN); |
| 1028 | PIN_SLP(gpm0-2, INPUT, DOWN); |
| 1029 | PIN_SLP(gpm0-3, INPUT, DOWN); |
| 1030 | PIN_SLP(gpm0-4, INPUT, DOWN); |
| 1031 | PIN_SLP(gpm0-5, INPUT, DOWN); |
| 1032 | PIN_SLP(gpm0-6, INPUT, DOWN); |
| 1033 | PIN_SLP(gpm0-7, INPUT, DOWN); |
| 1034 | |
| 1035 | PIN_SLP(gpm1-0, INPUT, DOWN); |
| 1036 | PIN_SLP(gpm1-1, INPUT, DOWN); |
| 1037 | PIN_SLP(gpm1-2, INPUT, NONE); |
| 1038 | PIN_SLP(gpm1-3, INPUT, NONE); |
| 1039 | PIN_SLP(gpm1-4, INPUT, NONE); |
| 1040 | PIN_SLP(gpm1-5, INPUT, NONE); |
| 1041 | PIN_SLP(gpm1-6, INPUT, DOWN); |
| 1042 | |
| 1043 | PIN_SLP(gpm2-0, INPUT, NONE); |
| 1044 | PIN_SLP(gpm2-1, INPUT, NONE); |
| 1045 | PIN_SLP(gpm2-2, INPUT, DOWN); |
| 1046 | PIN_SLP(gpm2-3, INPUT, DOWN); |
| 1047 | PIN_SLP(gpm2-4, INPUT, DOWN); |
| 1048 | |
| 1049 | PIN_SLP(gpm3-0, PREV, NONE); |
| 1050 | PIN_SLP(gpm3-1, PREV, NONE); |
| 1051 | PIN_SLP(gpm3-2, PREV, NONE); |
| 1052 | PIN_SLP(gpm3-3, OUT1, NONE); |
| 1053 | PIN_SLP(gpm3-4, INPUT, DOWN); |
| 1054 | PIN_SLP(gpm3-5, INPUT, DOWN); |
| 1055 | PIN_SLP(gpm3-6, INPUT, DOWN); |
| 1056 | PIN_SLP(gpm3-7, INPUT, DOWN); |
| 1057 | |
| 1058 | PIN_SLP(gpm4-0, INPUT, DOWN); |
| 1059 | PIN_SLP(gpm4-1, INPUT, DOWN); |
| 1060 | PIN_SLP(gpm4-2, INPUT, DOWN); |
| 1061 | PIN_SLP(gpm4-3, INPUT, DOWN); |
| 1062 | PIN_SLP(gpm4-4, INPUT, DOWN); |
| 1063 | PIN_SLP(gpm4-5, INPUT, DOWN); |
| 1064 | PIN_SLP(gpm4-6, INPUT, DOWN); |
| 1065 | PIN_SLP(gpm4-7, INPUT, DOWN); |
| 1066 | |
| 1067 | PIN_SLP(gpy0-0, INPUT, DOWN); |
| 1068 | PIN_SLP(gpy0-1, INPUT, DOWN); |
| 1069 | PIN_SLP(gpy0-2, INPUT, DOWN); |
| 1070 | PIN_SLP(gpy0-3, INPUT, DOWN); |
| 1071 | PIN_SLP(gpy0-4, INPUT, DOWN); |
| 1072 | PIN_SLP(gpy0-5, INPUT, DOWN); |
| 1073 | |
| 1074 | PIN_SLP(gpy1-0, INPUT, DOWN); |
| 1075 | PIN_SLP(gpy1-1, INPUT, DOWN); |
| 1076 | PIN_SLP(gpy1-2, INPUT, DOWN); |
| 1077 | PIN_SLP(gpy1-3, INPUT, DOWN); |
| 1078 | |
| 1079 | PIN_SLP(gpy2-0, PREV, NONE); |
| 1080 | PIN_SLP(gpy2-1, INPUT, DOWN); |
| 1081 | PIN_SLP(gpy2-2, INPUT, NONE); |
| 1082 | PIN_SLP(gpy2-3, INPUT, NONE); |
| 1083 | PIN_SLP(gpy2-4, INPUT, NONE); |
| 1084 | PIN_SLP(gpy2-5, INPUT, NONE); |
| 1085 | |
| 1086 | PIN_SLP(gpy3-0, INPUT, DOWN); |
| 1087 | PIN_SLP(gpy3-1, INPUT, DOWN); |
| 1088 | PIN_SLP(gpy3-2, INPUT, DOWN); |
| 1089 | PIN_SLP(gpy3-3, INPUT, DOWN); |
| 1090 | PIN_SLP(gpy3-4, INPUT, DOWN); |
| 1091 | PIN_SLP(gpy3-5, INPUT, DOWN); |
| 1092 | PIN_SLP(gpy3-6, INPUT, DOWN); |
| 1093 | PIN_SLP(gpy3-7, INPUT, DOWN); |
| 1094 | |
| 1095 | PIN_SLP(gpy4-0, INPUT, DOWN); |
| 1096 | PIN_SLP(gpy4-1, INPUT, DOWN); |
| 1097 | PIN_SLP(gpy4-2, INPUT, DOWN); |
| 1098 | PIN_SLP(gpy4-3, INPUT, DOWN); |
| 1099 | PIN_SLP(gpy4-4, INPUT, DOWN); |
| 1100 | PIN_SLP(gpy4-5, INPUT, DOWN); |
| 1101 | PIN_SLP(gpy4-6, INPUT, DOWN); |
| 1102 | PIN_SLP(gpy4-7, INPUT, DOWN); |
| 1103 | |
| 1104 | PIN_SLP(gpy5-0, INPUT, DOWN); |
| 1105 | PIN_SLP(gpy5-1, INPUT, DOWN); |
| 1106 | PIN_SLP(gpy5-2, INPUT, DOWN); |
| 1107 | PIN_SLP(gpy5-3, INPUT, DOWN); |
| 1108 | PIN_SLP(gpy5-4, INPUT, DOWN); |
| 1109 | PIN_SLP(gpy5-5, INPUT, DOWN); |
| 1110 | PIN_SLP(gpy5-6, INPUT, DOWN); |
| 1111 | PIN_SLP(gpy5-7, INPUT, DOWN); |
| 1112 | |
| 1113 | PIN_SLP(gpy6-0, INPUT, DOWN); |
| 1114 | PIN_SLP(gpy6-1, INPUT, DOWN); |
| 1115 | PIN_SLP(gpy6-2, INPUT, DOWN); |
| 1116 | PIN_SLP(gpy6-3, INPUT, DOWN); |
| 1117 | PIN_SLP(gpy6-4, INPUT, DOWN); |
| 1118 | PIN_SLP(gpy6-5, INPUT, DOWN); |
| 1119 | PIN_SLP(gpy6-6, INPUT, DOWN); |
| 1120 | PIN_SLP(gpy6-7, INPUT, DOWN); |
| 1121 | }; |
| 1122 | }; |
| 1123 | |
| 1124 | &pinctrl_2 { |
| 1125 | pinctrl-names = "default"; |
| 1126 | pinctrl-0 = <&sleep2>; |
| 1127 | |
| 1128 | sleep2: sleep-states { |
| 1129 | PIN_SLP(gpz-0, INPUT, DOWN); |
| 1130 | PIN_SLP(gpz-1, INPUT, DOWN); |
| 1131 | PIN_SLP(gpz-2, INPUT, DOWN); |
| 1132 | PIN_SLP(gpz-3, INPUT, DOWN); |
| 1133 | PIN_SLP(gpz-4, INPUT, DOWN); |
| 1134 | PIN_SLP(gpz-5, INPUT, DOWN); |
| 1135 | PIN_SLP(gpz-6, INPUT, DOWN); |
| 1136 | }; |
| 1137 | }; |
| 1138 | |
| 1139 | &pinctrl_3 { |
| 1140 | pinctrl-names = "default"; |
| 1141 | pinctrl-0 = <&sleep3>; |
| 1142 | |
| 1143 | sleep3: sleep-states { |
| 1144 | PIN_SLP(gpv0-0, INPUT, DOWN); |
| 1145 | PIN_SLP(gpv0-1, INPUT, DOWN); |
| 1146 | PIN_SLP(gpv0-2, INPUT, DOWN); |
| 1147 | PIN_SLP(gpv0-3, INPUT, DOWN); |
| 1148 | PIN_SLP(gpv0-4, INPUT, DOWN); |
| 1149 | PIN_SLP(gpv0-5, INPUT, DOWN); |
| 1150 | PIN_SLP(gpv0-6, INPUT, DOWN); |
| 1151 | PIN_SLP(gpv0-7, INPUT, DOWN); |
| 1152 | |
| 1153 | PIN_SLP(gpv1-0, INPUT, DOWN); |
| 1154 | PIN_SLP(gpv1-1, INPUT, DOWN); |
| 1155 | PIN_SLP(gpv1-2, INPUT, DOWN); |
| 1156 | PIN_SLP(gpv1-3, INPUT, DOWN); |
| 1157 | PIN_SLP(gpv1-4, INPUT, DOWN); |
| 1158 | PIN_SLP(gpv1-5, INPUT, DOWN); |
| 1159 | PIN_SLP(gpv1-6, INPUT, DOWN); |
| 1160 | PIN_SLP(gpv1-7, INPUT, DOWN); |
| 1161 | |
| 1162 | PIN_SLP(gpv2-0, INPUT, DOWN); |
| 1163 | PIN_SLP(gpv2-1, INPUT, DOWN); |
| 1164 | PIN_SLP(gpv2-2, INPUT, DOWN); |
| 1165 | PIN_SLP(gpv2-3, INPUT, DOWN); |
| 1166 | PIN_SLP(gpv2-4, INPUT, DOWN); |
| 1167 | PIN_SLP(gpv2-5, INPUT, DOWN); |
| 1168 | PIN_SLP(gpv2-6, INPUT, DOWN); |
| 1169 | PIN_SLP(gpv2-7, INPUT, DOWN); |
| 1170 | |
| 1171 | PIN_SLP(gpv3-0, INPUT, DOWN); |
| 1172 | PIN_SLP(gpv3-1, INPUT, DOWN); |
| 1173 | PIN_SLP(gpv3-2, INPUT, DOWN); |
| 1174 | PIN_SLP(gpv3-3, INPUT, DOWN); |
| 1175 | PIN_SLP(gpv3-4, INPUT, DOWN); |
| 1176 | PIN_SLP(gpv3-5, INPUT, DOWN); |
| 1177 | PIN_SLP(gpv3-6, INPUT, DOWN); |
| 1178 | PIN_SLP(gpv3-7, INPUT, DOWN); |
| 1179 | |
| 1180 | PIN_SLP(gpv4-0, INPUT, DOWN); |
| 1181 | }; |
| 1182 | }; |