blob: f18385d36dde56874d3507e3fc5010abbf220656 [file] [log] [blame]
Grant Likely8e267f32011-07-19 17:26:54 -06001/dts-v1/;
2
Grant Likely8e267f32011-07-19 17:26:54 -06003/include/ "tegra20.dtsi"
4
5/ {
6 model = "NVIDIA Tegra2 Harmony evaluation board";
7 compatible = "nvidia,harmony", "nvidia,tegra20";
8
Stephen Warrenf9eb26a2012-05-11 16:17:47 -06009 memory {
Stephen Warren95decf82012-05-11 16:11:38 -060010 reg = <0x00000000 0x40000000>;
Grant Likely8e267f32011-07-19 17:26:54 -060011 };
12
Stephen Warrenf9eb26a2012-05-11 16:17:47 -060013 pinmux {
Stephen Warrenecc295b2012-03-15 16:27:36 -060014 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>;
16
17 state_default: pinmux {
18 ata {
19 nvidia,pins = "ata";
20 nvidia,function = "ide";
21 };
22 atb {
23 nvidia,pins = "atb", "gma", "gme";
24 nvidia,function = "sdio4";
25 };
26 atc {
27 nvidia,pins = "atc";
28 nvidia,function = "nand";
29 };
30 atd {
31 nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
32 "spia", "spib", "spic";
33 nvidia,function = "gmi";
34 };
35 cdev1 {
36 nvidia,pins = "cdev1";
37 nvidia,function = "plla_out";
38 };
39 cdev2 {
40 nvidia,pins = "cdev2";
41 nvidia,function = "pllp_out4";
42 };
43 crtp {
44 nvidia,pins = "crtp";
45 nvidia,function = "crt";
46 };
47 csus {
48 nvidia,pins = "csus";
49 nvidia,function = "vi_sensor_clk";
50 };
51 dap1 {
52 nvidia,pins = "dap1";
53 nvidia,function = "dap1";
54 };
55 dap2 {
56 nvidia,pins = "dap2";
57 nvidia,function = "dap2";
58 };
59 dap3 {
60 nvidia,pins = "dap3";
61 nvidia,function = "dap3";
62 };
63 dap4 {
64 nvidia,pins = "dap4";
65 nvidia,function = "dap4";
66 };
67 ddc {
68 nvidia,pins = "ddc";
69 nvidia,function = "i2c2";
70 };
71 dta {
72 nvidia,pins = "dta", "dtd";
73 nvidia,function = "sdio2";
74 };
75 dtb {
76 nvidia,pins = "dtb", "dtc", "dte";
77 nvidia,function = "rsvd1";
78 };
79 dtf {
80 nvidia,pins = "dtf";
81 nvidia,function = "i2c3";
82 };
83 gmc {
84 nvidia,pins = "gmc";
85 nvidia,function = "uartd";
86 };
87 gpu7 {
88 nvidia,pins = "gpu7";
89 nvidia,function = "rtck";
90 };
91 gpv {
92 nvidia,pins = "gpv", "slxa", "slxk";
93 nvidia,function = "pcie";
94 };
95 hdint {
96 nvidia,pins = "hdint", "pta";
97 nvidia,function = "hdmi";
98 };
99 i2cp {
100 nvidia,pins = "i2cp";
101 nvidia,function = "i2cp";
102 };
103 irrx {
104 nvidia,pins = "irrx", "irtx";
105 nvidia,function = "uarta";
106 };
107 kbca {
108 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
109 "kbce", "kbcf";
110 nvidia,function = "kbc";
111 };
112 lcsn {
113 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
114 "ld3", "ld4", "ld5", "ld6", "ld7",
115 "ld8", "ld9", "ld10", "ld11", "ld12",
116 "ld13", "ld14", "ld15", "ld16", "ld17",
117 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
118 "lhs", "lm0", "lm1", "lpp", "lpw0",
119 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
120 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
121 "lvs";
122 nvidia,function = "displaya";
123 };
124 owc {
125 nvidia,pins = "owc", "spdi", "spdo", "uac";
126 nvidia,function = "rsvd2";
127 };
128 pmc {
129 nvidia,pins = "pmc";
130 nvidia,function = "pwr_on";
131 };
132 rm {
133 nvidia,pins = "rm";
134 nvidia,function = "i2c1";
135 };
136 sdb {
137 nvidia,pins = "sdb", "sdc", "sdd";
138 nvidia,function = "pwm";
139 };
140 sdio1 {
141 nvidia,pins = "sdio1";
142 nvidia,function = "sdio1";
143 };
144 slxc {
145 nvidia,pins = "slxc", "slxd";
146 nvidia,function = "spdif";
147 };
148 spid {
149 nvidia,pins = "spid", "spie", "spif";
150 nvidia,function = "spi1";
151 };
152 spig {
153 nvidia,pins = "spig", "spih";
154 nvidia,function = "spi2_alt";
155 };
156 uaa {
157 nvidia,pins = "uaa", "uab", "uda";
158 nvidia,function = "ulpi";
159 };
160 uad {
161 nvidia,pins = "uad";
162 nvidia,function = "irda";
163 };
164 uca {
165 nvidia,pins = "uca", "ucb";
166 nvidia,function = "uartc";
167 };
168 conf_ata {
169 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
Stephen Warren563da212012-04-13 16:35:20 -0600170 "cdev1", "cdev2", "dap1", "dtb", "gma",
171 "gmb", "gmc", "gmd", "gme", "gpu7",
172 "gpv", "i2cp", "pta", "rm", "slxa",
173 "slxk", "spia", "spib", "uac";
Stephen Warrenecc295b2012-03-15 16:27:36 -0600174 nvidia,pull = <0>;
175 nvidia,tristate = <0>;
176 };
Stephen Warrenecc295b2012-03-15 16:27:36 -0600177 conf_ck32 {
178 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
179 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
180 nvidia,pull = <0>;
181 };
Stephen Warren563da212012-04-13 16:35:20 -0600182 conf_csus {
183 nvidia,pins = "csus", "spid", "spif";
184 nvidia,pull = <1>;
185 nvidia,tristate = <1>;
186 };
Stephen Warrenecc295b2012-03-15 16:27:36 -0600187 conf_crtp {
188 nvidia,pins = "crtp", "dap2", "dap3", "dap4",
189 "dtc", "dte", "dtf", "gpu", "sdio1",
190 "slxc", "slxd", "spdi", "spdo", "spig",
Stephen Warren563da212012-04-13 16:35:20 -0600191 "uda";
Stephen Warrenecc295b2012-03-15 16:27:36 -0600192 nvidia,pull = <0>;
193 nvidia,tristate = <1>;
194 };
195 conf_ddc {
196 nvidia,pins = "ddc", "dta", "dtd", "kbca",
197 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
198 "sdc";
199 nvidia,pull = <2>;
200 nvidia,tristate = <0>;
201 };
202 conf_hdint {
203 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
204 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
205 "lvp0", "owc", "sdb";
206 nvidia,tristate = <1>;
207 };
208 conf_irrx {
209 nvidia,pins = "irrx", "irtx", "sdd", "spic",
210 "spie", "spih", "uaa", "uab", "uad",
211 "uca", "ucb";
212 nvidia,pull = <2>;
213 nvidia,tristate = <1>;
214 };
215 conf_lc {
216 nvidia,pins = "lc", "ls";
217 nvidia,pull = <2>;
218 };
219 conf_ld0 {
220 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
221 "ld5", "ld6", "ld7", "ld8", "ld9",
222 "ld10", "ld11", "ld12", "ld13", "ld14",
223 "ld15", "ld16", "ld17", "ldi", "lhp0",
224 "lhp1", "lhp2", "lhs", "lm0", "lpp",
225 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
226 "lvs", "pmc";
227 nvidia,tristate = <0>;
228 };
229 conf_ld17_0 {
230 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
231 "ld23_22";
232 nvidia,pull = <1>;
233 };
234 };
235 };
236
Stephen Warrenc04abb32012-05-11 17:03:26 -0600237 i2s@70002a00 {
238 status = "disable";
239 };
240
241 serial@70006000 {
242 status = "disable";
243 };
244
245 serial@70006040 {
246 status = "disable";
247 };
248
249 serial@70006200 {
250 status = "disable";
251 };
252
253 serial@70006300 {
254 clock-frequency = <216000000>;
255 };
256
257 serial@70006400 {
258 status = "disable";
Stephen Warrend17adfd2012-01-25 14:43:27 -0700259 };
260
Grant Likely8e267f32011-07-19 17:26:54 -0600261 i2c@7000c000 {
262 clock-frequency = <400000>;
263
Stephen Warren797acf72012-01-11 16:09:57 -0700264 wm8903: wm8903@1a {
Grant Likely8e267f32011-07-19 17:26:54 -0600265 compatible = "wlf,wm8903";
266 reg = <0x1a>;
Stephen Warren797acf72012-01-11 16:09:57 -0700267 interrupt-parent = <&gpio>;
Stephen Warren95decf82012-05-11 16:11:38 -0600268 interrupts = <187 0x04>;
Grant Likely8e267f32011-07-19 17:26:54 -0600269
270 gpio-controller;
271 #gpio-cells = <2>;
272
Stephen Warren797acf72012-01-11 16:09:57 -0700273 micdet-cfg = <0>;
274 micdet-delay = <100>;
Stephen Warren95decf82012-05-11 16:11:38 -0600275 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
Grant Likely8e267f32011-07-19 17:26:54 -0600276 };
277 };
278
279 i2c@7000c400 {
280 clock-frequency = <400000>;
281 };
282
283 i2c@7000c500 {
284 clock-frequency = <400000>;
285 };
286
287 i2c@7000d000 {
288 clock-frequency = <400000>;
289 };
290
Stephen Warrenc04abb32012-05-11 17:03:26 -0600291 pmc {
292 nvidia,invert-interrupt;
293 };
294
295 usb@c5004000 {
296 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
297 };
298
299 sdhci@c8000000 {
Stephen Warren797acf72012-01-11 16:09:57 -0700300 status = "disable";
301 };
Grant Likely8e267f32011-07-19 17:26:54 -0600302
Stephen Warrenc04abb32012-05-11 17:03:26 -0600303 sdhci@c8000200 {
304 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
305 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
306 power-gpios = <&gpio 155 0>; /* gpio PT3 */
307 };
308
309 sdhci@c8000400 {
310 status = "disable";
311 };
312
313 sdhci@c8000600 {
314 cd-gpios = <&gpio 58 0>; /* gpio PH2 */
315 wp-gpios = <&gpio 59 0>; /* gpio PH3 */
316 power-gpios = <&gpio 70 0>; /* gpio PI6 */
317 support-8bit;
318 };
319
Stephen Warren797acf72012-01-11 16:09:57 -0700320 sound {
321 compatible = "nvidia,tegra-audio-wm8903-harmony",
322 "nvidia,tegra-audio-wm8903";
323 nvidia,model = "NVIDIA Tegra Harmony";
324
325 nvidia,audio-routing =
326 "Headphone Jack", "HPOUTR",
327 "Headphone Jack", "HPOUTL",
328 "Int Spk", "ROP",
329 "Int Spk", "RON",
330 "Int Spk", "LOP",
331 "Int Spk", "LON",
332 "Mic Jack", "MICBIAS",
333 "IN1L", "Mic Jack";
334
335 nvidia,i2s-controller = <&tegra_i2s1>;
336 nvidia,audio-codec = <&wm8903>;
337
338 nvidia,spkr-en-gpios = <&wm8903 2 0>;
339 nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
340 nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
341 nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
Grant Likely8e267f32011-07-19 17:26:54 -0600342 };
Grant Likely8e267f32011-07-19 17:26:54 -0600343};