Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013-2016 Red Hat |
| 3 | * Author: Rob Clark <robdclark@gmail.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License version 2 as published by |
| 7 | * the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
Chris Wilson | f54d186 | 2016-10-25 13:00:45 +0100 | [diff] [blame] | 18 | #include <linux/dma-fence.h> |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 19 | |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 20 | #include "msm_drv.h" |
| 21 | #include "msm_fence.h" |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 22 | |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 23 | |
| 24 | struct msm_fence_context * |
| 25 | msm_fence_context_alloc(struct drm_device *dev, const char *name) |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 26 | { |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 27 | struct msm_fence_context *fctx; |
| 28 | |
| 29 | fctx = kzalloc(sizeof(*fctx), GFP_KERNEL); |
| 30 | if (!fctx) |
| 31 | return ERR_PTR(-ENOMEM); |
| 32 | |
| 33 | fctx->dev = dev; |
| 34 | fctx->name = name; |
Chris Wilson | f54d186 | 2016-10-25 13:00:45 +0100 | [diff] [blame] | 35 | fctx->context = dma_fence_context_alloc(1); |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 36 | init_waitqueue_head(&fctx->event); |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 37 | spin_lock_init(&fctx->spinlock); |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 38 | |
| 39 | return fctx; |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 40 | } |
| 41 | |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 42 | void msm_fence_context_free(struct msm_fence_context *fctx) |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 43 | { |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 44 | kfree(fctx); |
| 45 | } |
| 46 | |
| 47 | static inline bool fence_completed(struct msm_fence_context *fctx, uint32_t fence) |
| 48 | { |
| 49 | return (int32_t)(fctx->completed_fence - fence) >= 0; |
| 50 | } |
| 51 | |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 52 | /* legacy path for WAIT_FENCE ioctl: */ |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 53 | int msm_wait_fence(struct msm_fence_context *fctx, uint32_t fence, |
| 54 | ktime_t *timeout, bool interruptible) |
| 55 | { |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 56 | int ret; |
| 57 | |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 58 | if (fence > fctx->last_fence) { |
| 59 | DRM_ERROR("%s: waiting on invalid fence: %u (of %u)\n", |
| 60 | fctx->name, fence, fctx->last_fence); |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 61 | return -EINVAL; |
| 62 | } |
| 63 | |
| 64 | if (!timeout) { |
| 65 | /* no-wait: */ |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 66 | ret = fence_completed(fctx, fence) ? 0 : -EBUSY; |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 67 | } else { |
Rob Clark | 340ff41 | 2016-03-16 14:57:22 -0400 | [diff] [blame] | 68 | unsigned long remaining_jiffies = timeout_to_jiffies(timeout); |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 69 | |
| 70 | if (interruptible) |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 71 | ret = wait_event_interruptible_timeout(fctx->event, |
| 72 | fence_completed(fctx, fence), |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 73 | remaining_jiffies); |
| 74 | else |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 75 | ret = wait_event_timeout(fctx->event, |
| 76 | fence_completed(fctx, fence), |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 77 | remaining_jiffies); |
| 78 | |
| 79 | if (ret == 0) { |
| 80 | DBG("timeout waiting for fence: %u (completed: %u)", |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 81 | fence, fctx->completed_fence); |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 82 | ret = -ETIMEDOUT; |
| 83 | } else if (ret != -ERESTARTSYS) { |
| 84 | ret = 0; |
| 85 | } |
| 86 | } |
| 87 | |
| 88 | return ret; |
| 89 | } |
| 90 | |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 91 | /* called from workqueue */ |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 92 | void msm_update_fence(struct msm_fence_context *fctx, uint32_t fence) |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 93 | { |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 94 | spin_lock(&fctx->spinlock); |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 95 | fctx->completed_fence = max(fence, fctx->completed_fence); |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 96 | spin_unlock(&fctx->spinlock); |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 97 | |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 98 | wake_up_all(&fctx->event); |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 99 | } |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 100 | |
| 101 | struct msm_fence { |
| 102 | struct msm_fence_context *fctx; |
Chris Wilson | f54d186 | 2016-10-25 13:00:45 +0100 | [diff] [blame] | 103 | struct dma_fence base; |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 104 | }; |
| 105 | |
Chris Wilson | f54d186 | 2016-10-25 13:00:45 +0100 | [diff] [blame] | 106 | static inline struct msm_fence *to_msm_fence(struct dma_fence *fence) |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 107 | { |
| 108 | return container_of(fence, struct msm_fence, base); |
| 109 | } |
| 110 | |
Chris Wilson | f54d186 | 2016-10-25 13:00:45 +0100 | [diff] [blame] | 111 | static const char *msm_fence_get_driver_name(struct dma_fence *fence) |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 112 | { |
| 113 | return "msm"; |
| 114 | } |
| 115 | |
Chris Wilson | f54d186 | 2016-10-25 13:00:45 +0100 | [diff] [blame] | 116 | static const char *msm_fence_get_timeline_name(struct dma_fence *fence) |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 117 | { |
| 118 | struct msm_fence *f = to_msm_fence(fence); |
| 119 | return f->fctx->name; |
| 120 | } |
| 121 | |
Chris Wilson | f54d186 | 2016-10-25 13:00:45 +0100 | [diff] [blame] | 122 | static bool msm_fence_enable_signaling(struct dma_fence *fence) |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 123 | { |
| 124 | return true; |
| 125 | } |
| 126 | |
Chris Wilson | f54d186 | 2016-10-25 13:00:45 +0100 | [diff] [blame] | 127 | static bool msm_fence_signaled(struct dma_fence *fence) |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 128 | { |
| 129 | struct msm_fence *f = to_msm_fence(fence); |
| 130 | return fence_completed(f->fctx, f->base.seqno); |
| 131 | } |
| 132 | |
Chris Wilson | f54d186 | 2016-10-25 13:00:45 +0100 | [diff] [blame] | 133 | static void msm_fence_release(struct dma_fence *fence) |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 134 | { |
| 135 | struct msm_fence *f = to_msm_fence(fence); |
| 136 | kfree_rcu(f, base.rcu); |
| 137 | } |
| 138 | |
Chris Wilson | f54d186 | 2016-10-25 13:00:45 +0100 | [diff] [blame] | 139 | static const struct dma_fence_ops msm_fence_ops = { |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 140 | .get_driver_name = msm_fence_get_driver_name, |
| 141 | .get_timeline_name = msm_fence_get_timeline_name, |
| 142 | .enable_signaling = msm_fence_enable_signaling, |
| 143 | .signaled = msm_fence_signaled, |
Chris Wilson | f54d186 | 2016-10-25 13:00:45 +0100 | [diff] [blame] | 144 | .wait = dma_fence_default_wait, |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 145 | .release = msm_fence_release, |
| 146 | }; |
| 147 | |
Chris Wilson | f54d186 | 2016-10-25 13:00:45 +0100 | [diff] [blame] | 148 | struct dma_fence * |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 149 | msm_fence_alloc(struct msm_fence_context *fctx) |
| 150 | { |
| 151 | struct msm_fence *f; |
| 152 | |
| 153 | f = kzalloc(sizeof(*f), GFP_KERNEL); |
| 154 | if (!f) |
| 155 | return ERR_PTR(-ENOMEM); |
| 156 | |
| 157 | f->fctx = fctx; |
| 158 | |
Chris Wilson | f54d186 | 2016-10-25 13:00:45 +0100 | [diff] [blame] | 159 | dma_fence_init(&f->base, &msm_fence_ops, &fctx->spinlock, |
| 160 | fctx->context, ++fctx->last_fence); |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 161 | |
| 162 | return &f->base; |
| 163 | } |