blob: 4a61bd802491156ed1a4e93573c36f192d53bac1 [file] [log] [blame]
Sebastian Hesselbarth24409462013-09-09 14:17:52 +02001Marvell Berlin SoC Family Device Tree Bindings
2---------------------------------------------------------------
3
Antoine Tenartf07b4e42015-04-27 21:39:47 +02004Work in progress statement:
5
6Device tree files and bindings applying to Marvell Berlin SoCs and boards are
7considered "unstable". Any Marvell Berlin device tree binding may change at any
8time. Be sure to use a device tree binary and a kernel image generated from the
9same source tree.
10
11Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a
12stable binding/ABI.
13
14---------------------------------------------------------------
15
Sebastian Hesselbarth24409462013-09-09 14:17:52 +020016Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500
17shall have the following properties:
18
19* Required root node properties:
20compatible: must contain "marvell,berlin"
21
22In addition, the above compatible shall be extended with the specific
23SoC and board used. Currently known SoC compatibles are:
24 "marvell,berlin2" for Marvell Armada 1500 (BG2, 88DE3100),
25 "marvell,berlin2cd" for Marvell Armada 1500-mini (BG2CD, 88DE3005)
26 "marvell,berlin2ct" for Marvell Armada ? (BG2CT, 88DE????)
Antoine Tenart374ddcb2014-03-18 15:32:45 +010027 "marvell,berlin2q" for Marvell Armada 1500-pro (BG2Q, 88DE3114)
Sebastian Hesselbarth24409462013-09-09 14:17:52 +020028 "marvell,berlin3" for Marvell Armada ? (BG3, 88DE????)
29
30* Example:
31
32/ {
33 model = "Sony NSZ-GS7";
34 compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";
35
36 ...
37}
Sebastian Hesselbarth55a4b072014-05-10 13:46:12 +020038
Antoine Ténart9ab5fb82014-06-04 18:03:43 +020039* Marvell Berlin CPU control bindings
40
41CPU control register allows various operations on CPUs, like resetting them
42independently.
43
44Required properties:
45- compatible: should be "marvell,berlin-cpu-ctrl"
46- reg: address and length of the register set
47
48Example:
49
50cpu-ctrl@f7dd0000 {
51 compatible = "marvell,berlin-cpu-ctrl";
52 reg = <0xf7dd0000 0x10000>;
53};
54
Sebastian Hesselbarth55a4b072014-05-10 13:46:12 +020055* Marvell Berlin2 chip control binding
56
57Marvell Berlin SoCs have a chip control register set providing several
58individual registers dealing with pinmux, padmux, clock, reset, and secondary
59CPU boot address. Unfortunately, the individual registers are spread among the
60chip control registers, so there should be a single DT node only providing the
61different functions which are described below.
62
63Required properties:
Antoine Tenart7c90a5a2015-04-27 21:39:48 +020064- compatible:
65 * the first value should be one of:
66 "marvell,berlin2-chip-ctrl" for BG2
67 "marvell,berlin2cd-chip-ctrl" for BG2CD
68 "marvell,berlin2q-chip-ctrl" for BG2Q
69 * the second and third values must be:
70 "simple-mfd", "syscon"
Sebastian Hesselbarth55a4b072014-05-10 13:46:12 +020071- reg: address and length of following register sets for
72 BG2/BG2CD: chip control register set
73 BG2Q: chip control register set and cpu pll registers
74
Antoine Tenarte9673a72014-05-05 07:27:28 +020075* Marvell Berlin2 system control binding
76
77Marvell Berlin SoCs have a system control register set providing several
78individual registers dealing with pinmux, padmux, and reset.
79
80Required properties:
Antoine Tenart7c90a5a2015-04-27 21:39:48 +020081- compatible:
82 * the first value should be one of:
83 "marvell,berlin2-system-ctrl" for BG2
84 "marvell,berlin2cd-system-ctrl" for BG2CD
85 "marvell,berlin2q-system-ctrl" for BG2Q
86 * the second and third values must be:
87 "simple-mfd", "syscon"
Antoine Tenarte9673a72014-05-05 07:27:28 +020088- reg: address and length of the system control register set
89
Sebastian Hesselbarth55a4b072014-05-10 13:46:12 +020090Example:
91
92chip: chip-control@ea0000 {
Antoine Tenart7c90a5a2015-04-27 21:39:48 +020093 compatible = "marvell,berlin2-chip-ctrl", "simple-mfd", "syscon";
Sebastian Hesselbarth55a4b072014-05-10 13:46:12 +020094 reg = <0xea0000 0x400>;
Antoine Tenartc1f86f22015-04-07 16:45:02 +020095
96 /* sub-device nodes */
Antoine Tenarte9673a72014-05-05 07:27:28 +020097};
98
99sysctrl: system-controller@d000 {
Antoine Tenart7c90a5a2015-04-27 21:39:48 +0200100 compatible = "marvell,berlin2-system-ctrl", "simple-mfd", "syscon";
Antoine Tenarte9673a72014-05-05 07:27:28 +0200101 reg = <0xd000 0x100>;
Antoine Tenartc1f86f22015-04-07 16:45:02 +0200102
103 /* sub-device nodes */
Sebastian Hesselbarth55a4b072014-05-10 13:46:12 +0200104};