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Wenyou Yang76534862015-08-06 18:16:46 +08001/*
2 * Driver for Atmel SAMA5D4 Watchdog Timer
3 *
4 * Copyright (C) 2015 Atmel Corporation
5 *
6 * Licensed under GPLv2.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/io.h>
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/of.h>
14#include <linux/of_irq.h>
15#include <linux/platform_device.h>
16#include <linux/reboot.h>
17#include <linux/watchdog.h>
18
19#include "at91sam9_wdt.h"
20
21/* minimum and maximum watchdog timeout, in seconds */
22#define MIN_WDT_TIMEOUT 1
23#define MAX_WDT_TIMEOUT 16
24#define WDT_DEFAULT_TIMEOUT MAX_WDT_TIMEOUT
25
26#define WDT_SEC2TICKS(s) ((s) ? (((s) << 8) - 1) : 0)
27
28struct sama5d4_wdt {
29 struct watchdog_device wdd;
30 void __iomem *reg_base;
Alexandre Belloni722ce632017-01-30 18:18:47 +010031 u32 mr;
Wenyou Yang76534862015-08-06 18:16:46 +080032};
33
34static int wdt_timeout = WDT_DEFAULT_TIMEOUT;
35static bool nowayout = WATCHDOG_NOWAYOUT;
36
37module_param(wdt_timeout, int, 0);
38MODULE_PARM_DESC(wdt_timeout,
39 "Watchdog timeout in seconds. (default = "
40 __MODULE_STRING(WDT_DEFAULT_TIMEOUT) ")");
41
42module_param(nowayout, bool, 0);
43MODULE_PARM_DESC(nowayout,
44 "Watchdog cannot be stopped once started (default="
45 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
46
47#define wdt_read(wdt, field) \
48 readl_relaxed((wdt)->reg_base + (field))
49
50#define wdt_write(wtd, field, val) \
51 writel_relaxed((val), (wdt)->reg_base + (field))
52
53static int sama5d4_wdt_start(struct watchdog_device *wdd)
54{
55 struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
Wenyou Yang76534862015-08-06 18:16:46 +080056
Alexandre Belloni722ce632017-01-30 18:18:47 +010057 wdt->mr &= ~AT91_WDT_WDDIS;
58 wdt_write(wdt, AT91_WDT_MR, wdt->mr);
Wenyou Yang76534862015-08-06 18:16:46 +080059
60 return 0;
61}
62
63static int sama5d4_wdt_stop(struct watchdog_device *wdd)
64{
65 struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
Wenyou Yang76534862015-08-06 18:16:46 +080066
Alexandre Belloni722ce632017-01-30 18:18:47 +010067 wdt->mr |= AT91_WDT_WDDIS;
68 wdt_write(wdt, AT91_WDT_MR, wdt->mr);
Wenyou Yang76534862015-08-06 18:16:46 +080069
70 return 0;
71}
72
73static int sama5d4_wdt_ping(struct watchdog_device *wdd)
74{
75 struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
76
77 wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
78
79 return 0;
80}
81
82static int sama5d4_wdt_set_timeout(struct watchdog_device *wdd,
83 unsigned int timeout)
84{
85 struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
86 u32 value = WDT_SEC2TICKS(timeout);
Wenyou Yang76534862015-08-06 18:16:46 +080087
Alexandre Belloni722ce632017-01-30 18:18:47 +010088 wdt->mr &= ~AT91_WDT_WDV;
89 wdt->mr &= ~AT91_WDT_WDD;
90 wdt->mr |= AT91_WDT_SET_WDV(value);
91 wdt->mr |= AT91_WDT_SET_WDD(value);
92 wdt_write(wdt, AT91_WDT_MR, wdt->mr);
Wenyou Yang76534862015-08-06 18:16:46 +080093
94 wdd->timeout = timeout;
95
96 return 0;
97}
98
99static const struct watchdog_info sama5d4_wdt_info = {
100 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
101 .identity = "Atmel SAMA5D4 Watchdog",
102};
103
Bhumika Goyalb893e342017-01-28 13:11:17 +0530104static const struct watchdog_ops sama5d4_wdt_ops = {
Wenyou Yang76534862015-08-06 18:16:46 +0800105 .owner = THIS_MODULE,
106 .start = sama5d4_wdt_start,
107 .stop = sama5d4_wdt_stop,
108 .ping = sama5d4_wdt_ping,
109 .set_timeout = sama5d4_wdt_set_timeout,
110};
111
112static irqreturn_t sama5d4_wdt_irq_handler(int irq, void *dev_id)
113{
114 struct sama5d4_wdt *wdt = platform_get_drvdata(dev_id);
115
116 if (wdt_read(wdt, AT91_WDT_SR)) {
117 pr_crit("Atmel Watchdog Software Reset\n");
118 emergency_restart();
119 pr_crit("Reboot didn't succeed\n");
120 }
121
122 return IRQ_HANDLED;
123}
124
125static int of_sama5d4_wdt_init(struct device_node *np, struct sama5d4_wdt *wdt)
126{
127 const char *tmp;
128
Alexandre Belloni722ce632017-01-30 18:18:47 +0100129 wdt->mr = AT91_WDT_WDDIS;
Wenyou Yang76534862015-08-06 18:16:46 +0800130
131 if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
132 !strcmp(tmp, "software"))
Alexandre Belloni722ce632017-01-30 18:18:47 +0100133 wdt->mr |= AT91_WDT_WDFIEN;
Wenyou Yang76534862015-08-06 18:16:46 +0800134 else
Alexandre Belloni722ce632017-01-30 18:18:47 +0100135 wdt->mr |= AT91_WDT_WDRSTEN;
Wenyou Yang76534862015-08-06 18:16:46 +0800136
137 if (of_property_read_bool(np, "atmel,idle-halt"))
Alexandre Belloni722ce632017-01-30 18:18:47 +0100138 wdt->mr |= AT91_WDT_WDIDLEHLT;
Wenyou Yang76534862015-08-06 18:16:46 +0800139
140 if (of_property_read_bool(np, "atmel,dbg-halt"))
Alexandre Belloni722ce632017-01-30 18:18:47 +0100141 wdt->mr |= AT91_WDT_WDDBGHLT;
Wenyou Yang76534862015-08-06 18:16:46 +0800142
143 return 0;
144}
145
146static int sama5d4_wdt_init(struct sama5d4_wdt *wdt)
147{
148 struct watchdog_device *wdd = &wdt->wdd;
149 u32 value = WDT_SEC2TICKS(wdd->timeout);
150 u32 reg;
151
152 /*
153 * Because the fields WDV and WDD must not be modified when the WDDIS
154 * bit is set, so clear the WDDIS bit before writing the WDT_MR.
155 */
156 reg = wdt_read(wdt, AT91_WDT_MR);
157 reg &= ~AT91_WDT_WDDIS;
158 wdt_write(wdt, AT91_WDT_MR, reg);
159
Alexandre Belloni722ce632017-01-30 18:18:47 +0100160 wdt->mr |= AT91_WDT_SET_WDD(value);
161 wdt->mr |= AT91_WDT_SET_WDV(value);
Wenyou Yang76534862015-08-06 18:16:46 +0800162
Alexandre Belloni722ce632017-01-30 18:18:47 +0100163 wdt_write(wdt, AT91_WDT_MR, wdt->mr);
Wenyou Yang76534862015-08-06 18:16:46 +0800164
165 return 0;
166}
167
168static int sama5d4_wdt_probe(struct platform_device *pdev)
169{
170 struct watchdog_device *wdd;
171 struct sama5d4_wdt *wdt;
172 struct resource *res;
173 void __iomem *regs;
174 u32 irq = 0;
175 int ret;
176
177 wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
178 if (!wdt)
179 return -ENOMEM;
180
181 wdd = &wdt->wdd;
182 wdd->timeout = wdt_timeout;
183 wdd->info = &sama5d4_wdt_info;
184 wdd->ops = &sama5d4_wdt_ops;
185 wdd->min_timeout = MIN_WDT_TIMEOUT;
186 wdd->max_timeout = MAX_WDT_TIMEOUT;
187
188 watchdog_set_drvdata(wdd, wdt);
189
190 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
191 regs = devm_ioremap_resource(&pdev->dev, res);
192 if (IS_ERR(regs))
193 return PTR_ERR(regs);
194
195 wdt->reg_base = regs;
196
197 if (pdev->dev.of_node) {
198 irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
199 if (!irq)
200 dev_warn(&pdev->dev, "failed to get IRQ from DT\n");
201
202 ret = of_sama5d4_wdt_init(pdev->dev.of_node, wdt);
203 if (ret)
204 return ret;
205 }
206
Alexandre Belloni722ce632017-01-30 18:18:47 +0100207 if ((wdt->mr & AT91_WDT_WDFIEN) && irq) {
Wenyou Yang76534862015-08-06 18:16:46 +0800208 ret = devm_request_irq(&pdev->dev, irq, sama5d4_wdt_irq_handler,
209 IRQF_SHARED | IRQF_IRQPOLL |
210 IRQF_NO_SUSPEND, pdev->name, pdev);
211 if (ret) {
212 dev_err(&pdev->dev,
213 "cannot register interrupt handler\n");
214 return ret;
215 }
216 }
217
218 ret = watchdog_init_timeout(wdd, wdt_timeout, &pdev->dev);
219 if (ret) {
220 dev_err(&pdev->dev, "unable to set timeout value\n");
221 return ret;
222 }
223
224 ret = sama5d4_wdt_init(wdt);
225 if (ret)
226 return ret;
227
228 watchdog_set_nowayout(wdd, nowayout);
229
230 ret = watchdog_register_device(wdd);
231 if (ret) {
232 dev_err(&pdev->dev, "failed to register watchdog device\n");
233 return ret;
234 }
235
236 platform_set_drvdata(pdev, wdt);
237
238 dev_info(&pdev->dev, "initialized (timeout = %d sec, nowayout = %d)\n",
239 wdt_timeout, nowayout);
240
241 return 0;
242}
243
244static int sama5d4_wdt_remove(struct platform_device *pdev)
245{
246 struct sama5d4_wdt *wdt = platform_get_drvdata(pdev);
247
248 sama5d4_wdt_stop(&wdt->wdd);
249
250 watchdog_unregister_device(&wdt->wdd);
251
252 return 0;
253}
254
255static const struct of_device_id sama5d4_wdt_of_match[] = {
256 { .compatible = "atmel,sama5d4-wdt", },
257 { }
258};
259MODULE_DEVICE_TABLE(of, sama5d4_wdt_of_match);
260
Alexandre Bellonif2013532017-01-30 18:18:48 +0100261#ifdef CONFIG_PM_SLEEP
262static int sama5d4_wdt_resume(struct device *dev)
263{
264 struct sama5d4_wdt *wdt = dev_get_drvdata(dev);
265
266 wdt_write(wdt, AT91_WDT_MR, wdt->mr & ~AT91_WDT_WDDIS);
267 if (wdt->mr & AT91_WDT_WDDIS)
268 wdt_write(wdt, AT91_WDT_MR, wdt->mr);
269
270 return 0;
271}
272#endif
273
274static SIMPLE_DEV_PM_OPS(sama5d4_wdt_pm_ops, NULL,
275 sama5d4_wdt_resume);
276
Wenyou Yang76534862015-08-06 18:16:46 +0800277static struct platform_driver sama5d4_wdt_driver = {
278 .probe = sama5d4_wdt_probe,
279 .remove = sama5d4_wdt_remove,
280 .driver = {
281 .name = "sama5d4_wdt",
Alexandre Bellonif2013532017-01-30 18:18:48 +0100282 .pm = &sama5d4_wdt_pm_ops,
Wenyou Yang76534862015-08-06 18:16:46 +0800283 .of_match_table = sama5d4_wdt_of_match,
284 }
285};
286module_platform_driver(sama5d4_wdt_driver);
287
288MODULE_AUTHOR("Atmel Corporation");
289MODULE_DESCRIPTION("Atmel SAMA5D4 Watchdog Timer driver");
290MODULE_LICENSE("GPL v2");