Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2006, Intel Corporation. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms and conditions of the GNU General Public License, |
| 6 | * version 2, as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 11 | * more details. |
| 12 | * |
| 13 | * You should have received a copy of the GNU General Public License along with |
| 14 | * this program; if not, write to the Free Software Foundation, Inc., |
| 15 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 16 | * |
| 17 | */ |
| 18 | #ifndef _ASYNC_TX_H_ |
| 19 | #define _ASYNC_TX_H_ |
| 20 | #include <linux/dmaengine.h> |
| 21 | #include <linux/spinlock.h> |
| 22 | #include <linux/interrupt.h> |
| 23 | |
Dan Williams | 06164f3 | 2009-03-25 09:13:25 -0700 | [diff] [blame] | 24 | /* on architectures without dma-mapping capabilities we need to ensure |
| 25 | * that the asynchronous path compiles away |
| 26 | */ |
| 27 | #ifdef CONFIG_HAS_DMA |
| 28 | #define __async_inline |
| 29 | #else |
| 30 | #define __async_inline __always_inline |
| 31 | #endif |
| 32 | |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 33 | /** |
| 34 | * dma_chan_ref - object used to manage dma channels received from the |
| 35 | * dmaengine core. |
| 36 | * @chan - the channel being tracked |
| 37 | * @node - node for the channel to be placed on async_tx_master_list |
| 38 | * @rcu - for list_del_rcu |
| 39 | * @count - number of times this channel is listed in the pool |
| 40 | * (for channels with multiple capabiities) |
| 41 | */ |
| 42 | struct dma_chan_ref { |
| 43 | struct dma_chan *chan; |
| 44 | struct list_head node; |
| 45 | struct rcu_head rcu; |
| 46 | atomic_t count; |
| 47 | }; |
| 48 | |
| 49 | /** |
| 50 | * async_tx_flags - modifiers for the async_* calls |
| 51 | * @ASYNC_TX_XOR_ZERO_DST: this flag must be used for xor operations where the |
| 52 | * the destination address is not a source. The asynchronous case handles this |
| 53 | * implicitly, the synchronous case needs to zero the destination block. |
| 54 | * @ASYNC_TX_XOR_DROP_DST: this flag must be used if the destination address is |
| 55 | * also one of the source addresses. In the synchronous case the destination |
| 56 | * address is an implied source, whereas the asynchronous case it must be listed |
| 57 | * as a source. The destination address must be the first address in the source |
| 58 | * array. |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 59 | * @ASYNC_TX_ACK: immediately ack the descriptor, precludes setting up a |
| 60 | * dependency chain |
| 61 | * @ASYNC_TX_DEP_ACK: ack the dependency descriptor. Useful for chaining. |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 62 | */ |
| 63 | enum async_tx_flags { |
| 64 | ASYNC_TX_XOR_ZERO_DST = (1 << 0), |
| 65 | ASYNC_TX_XOR_DROP_DST = (1 << 1), |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 66 | ASYNC_TX_ACK = (1 << 3), |
| 67 | ASYNC_TX_DEP_ACK = (1 << 4), |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 68 | }; |
| 69 | |
| 70 | #ifdef CONFIG_DMA_ENGINE |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 71 | #define async_tx_issue_pending_all dma_issue_pending_all |
Dan Williams | 47437b2 | 2008-02-02 19:49:59 -0700 | [diff] [blame] | 72 | #ifdef CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
| 73 | #include <asm/async_tx.h> |
| 74 | #else |
| 75 | #define async_tx_find_channel(dep, type, dst, dst_count, src, src_count, len) \ |
| 76 | __async_tx_find_channel(dep, type) |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 77 | struct dma_chan * |
Dan Williams | 47437b2 | 2008-02-02 19:49:59 -0700 | [diff] [blame] | 78 | __async_tx_find_channel(struct dma_async_tx_descriptor *depend_tx, |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 79 | enum dma_transaction_type tx_type); |
Dan Williams | 47437b2 | 2008-02-02 19:49:59 -0700 | [diff] [blame] | 80 | #endif /* CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL */ |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 81 | #else |
| 82 | static inline void async_tx_issue_pending_all(void) |
| 83 | { |
| 84 | do { } while (0); |
| 85 | } |
| 86 | |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 87 | static inline struct dma_chan * |
| 88 | async_tx_find_channel(struct dma_async_tx_descriptor *depend_tx, |
Dan Williams | 47437b2 | 2008-02-02 19:49:59 -0700 | [diff] [blame] | 89 | enum dma_transaction_type tx_type, struct page **dst, int dst_count, |
| 90 | struct page **src, int src_count, size_t len) |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 91 | { |
| 92 | return NULL; |
| 93 | } |
| 94 | #endif |
| 95 | |
| 96 | /** |
| 97 | * async_tx_sync_epilog - actions to take if an operation is run synchronously |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 98 | * @cb_fn: function to call when the transaction completes |
| 99 | * @cb_fn_param: parameter to pass to the callback routine |
| 100 | */ |
| 101 | static inline void |
Dan Williams | 3dce017 | 2008-07-17 17:59:55 -0700 | [diff] [blame] | 102 | async_tx_sync_epilog(dma_async_tx_callback cb_fn, void *cb_fn_param) |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 103 | { |
| 104 | if (cb_fn) |
| 105 | cb_fn(cb_fn_param); |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 106 | } |
| 107 | |
| 108 | void |
| 109 | async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx, |
| 110 | enum async_tx_flags flags, struct dma_async_tx_descriptor *depend_tx, |
| 111 | dma_async_tx_callback cb_fn, void *cb_fn_param); |
| 112 | |
| 113 | struct dma_async_tx_descriptor * |
| 114 | async_xor(struct page *dest, struct page **src_list, unsigned int offset, |
| 115 | int src_cnt, size_t len, enum async_tx_flags flags, |
| 116 | struct dma_async_tx_descriptor *depend_tx, |
| 117 | dma_async_tx_callback cb_fn, void *cb_fn_param); |
| 118 | |
| 119 | struct dma_async_tx_descriptor * |
| 120 | async_xor_zero_sum(struct page *dest, struct page **src_list, |
| 121 | unsigned int offset, int src_cnt, size_t len, |
| 122 | u32 *result, enum async_tx_flags flags, |
| 123 | struct dma_async_tx_descriptor *depend_tx, |
| 124 | dma_async_tx_callback cb_fn, void *cb_fn_param); |
| 125 | |
| 126 | struct dma_async_tx_descriptor * |
| 127 | async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset, |
| 128 | unsigned int src_offset, size_t len, enum async_tx_flags flags, |
| 129 | struct dma_async_tx_descriptor *depend_tx, |
| 130 | dma_async_tx_callback cb_fn, void *cb_fn_param); |
| 131 | |
| 132 | struct dma_async_tx_descriptor * |
| 133 | async_memset(struct page *dest, int val, unsigned int offset, |
| 134 | size_t len, enum async_tx_flags flags, |
| 135 | struct dma_async_tx_descriptor *depend_tx, |
| 136 | dma_async_tx_callback cb_fn, void *cb_fn_param); |
| 137 | |
| 138 | struct dma_async_tx_descriptor * |
| 139 | async_trigger_callback(enum async_tx_flags flags, |
| 140 | struct dma_async_tx_descriptor *depend_tx, |
| 141 | dma_async_tx_callback cb_fn, void *cb_fn_param); |
Dan Williams | d2c52b7 | 2008-07-17 17:59:55 -0700 | [diff] [blame] | 142 | |
| 143 | void async_tx_quiesce(struct dma_async_tx_descriptor **tx); |
Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 144 | #endif /* _ASYNC_TX_H_ */ |