blob: ac0ea79d0f8b98c1d8123f1017256eb145cfc8f4 [file] [log] [blame]
Dan Streetman7011a122015-05-07 13:49:17 -04001
2#ifndef __NX_842_H__
3#define __NX_842_H__
4
5#include <linux/kernel.h>
6#include <linux/module.h>
Dan Streetman99182a422015-05-07 13:49:19 -04007#include <linux/sw842.h>
Dan Streetman7011a122015-05-07 13:49:17 -04008#include <linux/of.h>
9#include <linux/slab.h>
10#include <linux/io.h>
Dan Streetman99182a422015-05-07 13:49:19 -040011#include <linux/mm.h>
12#include <linux/ratelimit.h>
13
14/* Restrictions on Data Descriptor List (DDL) and Entry (DDE) buffers
15 *
16 * From NX P8 workbook, sec 4.9.1 "842 details"
17 * Each DDE buffer is 128 byte aligned
18 * Each DDE buffer size is a multiple of 32 bytes (except the last)
19 * The last DDE buffer size is a multiple of 8 bytes
20 */
21#define DDE_BUFFER_ALIGN (128)
22#define DDE_BUFFER_SIZE_MULT (32)
23#define DDE_BUFFER_LAST_MULT (8)
24
25/* Arbitrary DDL length limit
26 * Allows max buffer size of MAX-1 to MAX pages
27 * (depending on alignment)
28 */
29#define DDL_LEN_MAX (17)
30
31/* CCW 842 CI/FC masks
32 * NX P8 workbook, section 4.3.1, figure 4-6
33 * "CI/FC Boundary by NX CT type"
34 */
35#define CCW_CI_842 (0x00003ff8)
36#define CCW_FC_842 (0x00000007)
37
38/* CCW Function Codes (FC) for 842
39 * NX P8 workbook, section 4.9, table 4-28
40 * "Function Code Definitions for 842 Memory Compression"
41 */
42#define CCW_FC_842_COMP_NOCRC (0)
43#define CCW_FC_842_COMP_CRC (1)
44#define CCW_FC_842_DECOMP_NOCRC (2)
45#define CCW_FC_842_DECOMP_CRC (3)
46#define CCW_FC_842_MOVE (4)
47
48/* CSB CC Error Types for 842
49 * NX P8 workbook, section 4.10.3, table 4-30
50 * "Reported Error Types Summary Table"
51 */
52/* These are all duplicates of existing codes defined in icswx.h. */
53#define CSB_CC_TRANSLATION_DUP1 (80)
54#define CSB_CC_TRANSLATION_DUP2 (82)
55#define CSB_CC_TRANSLATION_DUP3 (84)
56#define CSB_CC_TRANSLATION_DUP4 (86)
57#define CSB_CC_TRANSLATION_DUP5 (92)
58#define CSB_CC_TRANSLATION_DUP6 (94)
59#define CSB_CC_PROTECTION_DUP1 (81)
60#define CSB_CC_PROTECTION_DUP2 (83)
61#define CSB_CC_PROTECTION_DUP3 (85)
62#define CSB_CC_PROTECTION_DUP4 (87)
63#define CSB_CC_PROTECTION_DUP5 (93)
64#define CSB_CC_PROTECTION_DUP6 (95)
65#define CSB_CC_RD_EXTERNAL_DUP1 (89)
66#define CSB_CC_RD_EXTERNAL_DUP2 (90)
67#define CSB_CC_RD_EXTERNAL_DUP3 (91)
68/* These are specific to NX */
69/* 842 codes */
70#define CSB_CC_TPBC_GT_SPBC (64) /* no error, but >1 comp ratio */
71#define CSB_CC_CRC_MISMATCH (65) /* decomp crc mismatch */
72#define CSB_CC_TEMPL_INVALID (66) /* decomp invalid template value */
73#define CSB_CC_TEMPL_OVERFLOW (67) /* decomp template shows data after end */
74/* sym crypt codes */
75#define CSB_CC_DECRYPT_OVERFLOW (64)
76/* asym crypt codes */
77#define CSB_CC_MINV_OVERFLOW (128)
78/* These are reserved for hypervisor use */
79#define CSB_CC_HYP_RESERVE_START (240)
80#define CSB_CC_HYP_RESERVE_END (253)
81#define CSB_CC_HYP_NO_HW (254)
82#define CSB_CC_HYP_HANG_ABORTED (255)
83
84/* CCB Completion Modes (CM) for 842
85 * NX P8 workbook, section 4.3, figure 4-5
86 * "CRB Details - Normal Cop_Req (CL=00, C=1)"
87 */
88#define CCB_CM_EXTRA_WRITE (CCB_CM0_ALL_COMPLETIONS & CCB_CM12_STORE)
89#define CCB_CM_INTERRUPT (CCB_CM0_ALL_COMPLETIONS & CCB_CM12_INTERRUPT)
90
Dan Streetmanc47d6302015-06-18 12:05:30 -040091#define LEN_ON_SIZE(pa, size) ((size) - ((pa) & ((size) - 1)))
92#define LEN_ON_PAGE(pa) LEN_ON_SIZE(pa, PAGE_SIZE)
Dan Streetman99182a422015-05-07 13:49:19 -040093
94static inline unsigned long nx842_get_pa(void *addr)
95{
96 if (!is_vmalloc_addr(addr))
97 return __pa(addr);
98
99 return page_to_phys(vmalloc_to_page(addr)) + offset_in_page(addr);
100}
101
102/* Get/Set bit fields */
103#define MASK_LSH(m) (__builtin_ffsl(m) - 1)
104#define GET_FIELD(v, m) (((v) & (m)) >> MASK_LSH(m))
105#define SET_FIELD(v, m, val) (((v) & ~(m)) | (((val) << MASK_LSH(m)) & (m)))
Dan Streetman7011a122015-05-07 13:49:17 -0400106
Dan Streetman32be6d32015-06-12 10:58:46 -0400107struct nx842_constraints {
108 int alignment;
109 int multiple;
110 int minimum;
111 int maximum;
112};
113
Dan Streetman7011a122015-05-07 13:49:17 -0400114struct nx842_driver {
Dan Streetman3e648cb2015-05-28 16:21:31 -0400115 char *name;
Dan Streetman7011a122015-05-07 13:49:17 -0400116 struct module *owner;
Dan Streetman2c6f6ea2015-06-12 10:58:47 -0400117 size_t workmem_size;
Dan Streetman7011a122015-05-07 13:49:17 -0400118
Dan Streetman959e6652015-05-07 13:49:18 -0400119 struct nx842_constraints *constraints;
120
Dan Streetman7011a122015-05-07 13:49:17 -0400121 int (*compress)(const unsigned char *in, unsigned int in_len,
122 unsigned char *out, unsigned int *out_len,
123 void *wrkmem);
124 int (*decompress)(const unsigned char *in, unsigned int in_len,
125 unsigned char *out, unsigned int *out_len,
126 void *wrkmem);
127};
128
Dan Streetman3e648cb2015-05-28 16:21:31 -0400129struct nx842_driver *nx842_platform_driver(void);
130bool nx842_platform_driver_set(struct nx842_driver *driver);
131void nx842_platform_driver_unset(struct nx842_driver *driver);
132bool nx842_platform_driver_get(void);
133void nx842_platform_driver_put(void);
Dan Streetman7011a122015-05-07 13:49:17 -0400134
Dan Streetman2c6f6ea2015-06-12 10:58:47 -0400135size_t nx842_workmem_size(void);
136
Dan Streetman32be6d32015-06-12 10:58:46 -0400137int nx842_constraints(struct nx842_constraints *constraints);
138
139int nx842_compress(const unsigned char *in, unsigned int in_len,
140 unsigned char *out, unsigned int *out_len, void *wrkmem);
141int nx842_decompress(const unsigned char *in, unsigned int in_len,
142 unsigned char *out, unsigned int *out_len, void *wrkmem);
143
Dan Streetman7011a122015-05-07 13:49:17 -0400144#endif /* __NX_842_H__ */