Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2015 Vishnu Patekar |
| 3 | * |
| 4 | * Vishnu Patekar <vishnupatekar0510@gmail.com> |
| 5 | * |
| 6 | * This file is dual-licensed: you can use it either under the terms |
| 7 | * of the GPL or the X11 license, at your option. Note that this dual |
| 8 | * licensing only applies to this file, and not this project as a |
| 9 | * whole. |
| 10 | * |
| 11 | * a) This file is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of the |
| 14 | * License, or (at your option) any later version. |
| 15 | * |
| 16 | * This file is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * Or, alternatively, |
| 22 | * |
| 23 | * b) Permission is hereby granted, free of charge, to any person |
| 24 | * obtaining a copy of this software and associated documentation |
| 25 | * files (the "Software"), to deal in the Software without |
| 26 | * restriction, including without limitation the rights to use, |
| 27 | * copy, modify, merge, publish, distribute, sublicense, and/or |
| 28 | * sell copies of the Software, and to permit persons to whom the |
| 29 | * Software is furnished to do so, subject to the following |
| 30 | * conditions: |
| 31 | * |
| 32 | * The above copyright notice and this permission notice shall be |
| 33 | * included in all copies or substantial portions of the Software. |
| 34 | * |
| 35 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 36 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
| 37 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 38 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
| 39 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
| 40 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 41 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 42 | * OTHER DEALINGS IN THE SOFTWARE. |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 43 | */ |
| 44 | |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 45 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 46 | |
Chen-Yu Tsai | c50f9fb | 2017-07-14 14:42:52 +0800 | [diff] [blame^] | 47 | #include <dt-bindings/clock/sun8i-a83t-ccu.h> |
Chen-Yu Tsai | 694ca10 | 2017-06-03 22:44:27 +0800 | [diff] [blame] | 48 | #include <dt-bindings/clock/sun8i-r-ccu.h> |
Chen-Yu Tsai | c50f9fb | 2017-07-14 14:42:52 +0800 | [diff] [blame^] | 49 | #include <dt-bindings/reset/sun8i-a83t-ccu.h> |
Chen-Yu Tsai | 694ca10 | 2017-06-03 22:44:27 +0800 | [diff] [blame] | 50 | |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 51 | / { |
| 52 | interrupt-parent = <&gic>; |
Chen-Yu Tsai | 802139d | 2017-04-18 12:22:03 +0800 | [diff] [blame] | 53 | #address-cells = <1>; |
| 54 | #size-cells = <1>; |
| 55 | |
| 56 | aliases { |
| 57 | }; |
| 58 | |
| 59 | chosen { |
| 60 | }; |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 61 | |
| 62 | cpus { |
| 63 | #address-cells = <1>; |
| 64 | #size-cells = <0>; |
| 65 | |
| 66 | cpu@0 { |
| 67 | compatible = "arm,cortex-a7"; |
| 68 | device_type = "cpu"; |
| 69 | reg = <0>; |
| 70 | }; |
| 71 | |
| 72 | cpu@1 { |
| 73 | compatible = "arm,cortex-a7"; |
| 74 | device_type = "cpu"; |
| 75 | reg = <1>; |
| 76 | }; |
| 77 | |
| 78 | cpu@2 { |
| 79 | compatible = "arm,cortex-a7"; |
| 80 | device_type = "cpu"; |
| 81 | reg = <2>; |
| 82 | }; |
| 83 | |
| 84 | cpu@3 { |
| 85 | compatible = "arm,cortex-a7"; |
| 86 | device_type = "cpu"; |
| 87 | reg = <3>; |
| 88 | }; |
| 89 | |
| 90 | cpu@100 { |
| 91 | compatible = "arm,cortex-a7"; |
| 92 | device_type = "cpu"; |
| 93 | reg = <0x100>; |
| 94 | }; |
| 95 | |
| 96 | cpu@101 { |
| 97 | compatible = "arm,cortex-a7"; |
| 98 | device_type = "cpu"; |
| 99 | reg = <0x101>; |
| 100 | }; |
| 101 | |
| 102 | cpu@102 { |
| 103 | compatible = "arm,cortex-a7"; |
| 104 | device_type = "cpu"; |
| 105 | reg = <0x102>; |
| 106 | }; |
| 107 | |
| 108 | cpu@103 { |
| 109 | compatible = "arm,cortex-a7"; |
| 110 | device_type = "cpu"; |
| 111 | reg = <0x103>; |
| 112 | }; |
| 113 | }; |
| 114 | |
| 115 | timer { |
| 116 | compatible = "arm,armv7-timer"; |
| 117 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, |
| 118 | <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, |
| 119 | <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, |
| 120 | <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; |
| 121 | }; |
| 122 | |
| 123 | clocks { |
| 124 | #address-cells = <1>; |
| 125 | #size-cells = <1>; |
| 126 | ranges; |
| 127 | |
Chen-Yu Tsai | c5dee34 | 2016-01-31 09:20:58 +0800 | [diff] [blame] | 128 | /* TODO: PRCM block has a mux for this. */ |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 129 | osc24M: osc24M_clk { |
| 130 | #clock-cells = <0>; |
| 131 | compatible = "fixed-clock"; |
| 132 | clock-frequency = <24000000>; |
Chen-Yu Tsai | c31d488 | 2017-05-19 15:06:11 +0800 | [diff] [blame] | 133 | clock-accuracy = <50000>; |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 134 | clock-output-names = "osc24M"; |
| 135 | }; |
| 136 | |
Chen-Yu Tsai | c5dee34 | 2016-01-31 09:20:58 +0800 | [diff] [blame] | 137 | /* |
| 138 | * This is called "internal OSC" in some places. |
| 139 | * It is an internal RC-based oscillator. |
| 140 | * TODO: Its controls are in the PRCM block. |
| 141 | */ |
| 142 | osc16M: osc16M_clk { |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 143 | #clock-cells = <0>; |
| 144 | compatible = "fixed-clock"; |
Chen-Yu Tsai | c5dee34 | 2016-01-31 09:20:58 +0800 | [diff] [blame] | 145 | clock-frequency = <16000000>; |
| 146 | clock-output-names = "osc16M"; |
| 147 | }; |
| 148 | |
| 149 | osc16Md512: osc16Md512_clk { |
| 150 | #clock-cells = <0>; |
| 151 | compatible = "fixed-factor-clock"; |
| 152 | clock-div = <512>; |
| 153 | clock-mult = <1>; |
| 154 | clocks = <&osc16M>; |
| 155 | clock-output-names = "osc16M-d512"; |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 156 | }; |
| 157 | }; |
| 158 | |
Chen-Yu Tsai | 802139d | 2017-04-18 12:22:03 +0800 | [diff] [blame] | 159 | memory { |
| 160 | reg = <0x40000000 0x80000000>; |
| 161 | device_type = "memory"; |
| 162 | }; |
| 163 | |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 164 | soc { |
| 165 | compatible = "simple-bus"; |
| 166 | #address-cells = <1>; |
| 167 | #size-cells = <1>; |
| 168 | ranges; |
| 169 | |
Corentin Labbe | 0e9d528 | 2017-06-07 19:33:44 +0200 | [diff] [blame] | 170 | syscon: syscon@1c00000 { |
| 171 | compatible = "allwinner,sun8i-a83t-system-controller", |
| 172 | "syscon"; |
| 173 | reg = <0x01c00000 0x1000>; |
| 174 | }; |
| 175 | |
Chen-Yu Tsai | 749b7a9 | 2017-05-22 14:25:50 +0800 | [diff] [blame] | 176 | dma: dma-controller@1c02000 { |
| 177 | compatible = "allwinner,sun8i-a83t-dma"; |
| 178 | reg = <0x01c02000 0x1000>; |
| 179 | interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; |
Chen-Yu Tsai | c50f9fb | 2017-07-14 14:42:52 +0800 | [diff] [blame^] | 180 | clocks = <&ccu CLK_BUS_DMA>; |
| 181 | resets = <&ccu RST_BUS_DMA>; |
Chen-Yu Tsai | 749b7a9 | 2017-05-22 14:25:50 +0800 | [diff] [blame] | 182 | #dma-cells = <1>; |
| 183 | }; |
| 184 | |
Chen-Yu Tsai | 1a8c176 | 2017-05-19 15:06:10 +0800 | [diff] [blame] | 185 | ccu: clock@1c20000 { |
| 186 | compatible = "allwinner,sun8i-a83t-ccu"; |
| 187 | reg = <0x01c20000 0x400>; |
| 188 | clocks = <&osc24M>, <&osc16Md512>; |
| 189 | clock-names = "hosc", "losc"; |
| 190 | #clock-cells = <1>; |
| 191 | #reset-cells = <1>; |
| 192 | }; |
| 193 | |
Chen-Yu Tsai | e407e25 | 2017-05-01 11:14:07 +0800 | [diff] [blame] | 194 | pio: pinctrl@1c20800 { |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 195 | compatible = "allwinner,sun8i-a83t-pinctrl"; |
| 196 | interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, |
| 197 | <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, |
| 198 | <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; |
| 199 | reg = <0x01c20800 0x400>; |
Chen-Yu Tsai | c50f9fb | 2017-07-14 14:42:52 +0800 | [diff] [blame^] | 200 | clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc16Md512>; |
Chen-Yu Tsai | 1a8c176 | 2017-05-19 15:06:10 +0800 | [diff] [blame] | 201 | clock-names = "apb", "hosc", "losc"; |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 202 | gpio-controller; |
| 203 | interrupt-controller; |
| 204 | #interrupt-cells = <3>; |
| 205 | #gpio-cells = <3>; |
| 206 | |
Chen-Yu Tsai | 62628be | 2017-05-01 11:14:08 +0800 | [diff] [blame] | 207 | mmc0_pins: mmc0-pins { |
Maxime Ripard | 1edcd36 | 2016-09-23 14:28:10 +0300 | [diff] [blame] | 208 | pins = "PF0", "PF1", "PF2", |
| 209 | "PF3", "PF4", "PF5"; |
| 210 | function = "mmc0"; |
| 211 | drive-strength = <30>; |
Chen-Yu Tsai | 80ee72e | 2016-11-17 17:34:38 +0800 | [diff] [blame] | 212 | bias-pull-up; |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 213 | }; |
| 214 | |
Chen-Yu Tsai | 9ecf123 | 2017-05-22 14:25:51 +0800 | [diff] [blame] | 215 | spdif_tx_pin: spdif-tx-pin { |
| 216 | pins = "PE18"; |
| 217 | function = "spdif"; |
| 218 | }; |
| 219 | |
Chen-Yu Tsai | 62628be | 2017-05-01 11:14:08 +0800 | [diff] [blame] | 220 | uart0_pb_pins: uart0-pb-pins { |
Chen-Yu Tsai | e53bfb0 | 2017-04-18 12:22:05 +0800 | [diff] [blame] | 221 | pins = "PB9", "PB10"; |
Maxime Ripard | 1edcd36 | 2016-09-23 14:28:10 +0300 | [diff] [blame] | 222 | function = "uart0"; |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 223 | }; |
| 224 | |
Chen-Yu Tsai | 62628be | 2017-05-01 11:14:08 +0800 | [diff] [blame] | 225 | uart0_pf_pins: uart0-pf-pins { |
Chen-Yu Tsai | e53bfb0 | 2017-04-18 12:22:05 +0800 | [diff] [blame] | 226 | pins = "PF2", "PF4"; |
Maxime Ripard | 1edcd36 | 2016-09-23 14:28:10 +0300 | [diff] [blame] | 227 | function = "uart0"; |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 228 | }; |
| 229 | }; |
| 230 | |
Chen-Yu Tsai | e407e25 | 2017-05-01 11:14:07 +0800 | [diff] [blame] | 231 | timer@1c20c00 { |
Vishnu Patekar | 85c19ac | 2016-01-17 00:24:55 +0800 | [diff] [blame] | 232 | compatible = "allwinner,sun4i-a10-timer"; |
| 233 | reg = <0x01c20c00 0xa0>; |
| 234 | interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, |
| 235 | <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; |
| 236 | clocks = <&osc24M>; |
| 237 | }; |
| 238 | |
Chen-Yu Tsai | e407e25 | 2017-05-01 11:14:07 +0800 | [diff] [blame] | 239 | watchdog@1c20ca0 { |
Chen-Yu Tsai | b1dc902 | 2016-01-17 00:24:56 +0800 | [diff] [blame] | 240 | compatible = "allwinner,sun6i-a31-wdt"; |
| 241 | reg = <0x01c20ca0 0x20>; |
| 242 | interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; |
| 243 | clocks = <&osc24M>; |
| 244 | }; |
| 245 | |
Chen-Yu Tsai | 9ecf123 | 2017-05-22 14:25:51 +0800 | [diff] [blame] | 246 | spdif: spdif@1c21000 { |
| 247 | #sound-dai-cells = <0>; |
| 248 | compatible = "allwinner,sun8i-a83t-spdif", |
| 249 | "allwinner,sun8i-h3-spdif"; |
| 250 | reg = <0x01c21000 0x400>; |
| 251 | interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; |
Chen-Yu Tsai | c50f9fb | 2017-07-14 14:42:52 +0800 | [diff] [blame^] | 252 | clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>; |
| 253 | resets = <&ccu RST_BUS_SPDIF>; |
Chen-Yu Tsai | 9ecf123 | 2017-05-22 14:25:51 +0800 | [diff] [blame] | 254 | clock-names = "apb", "spdif"; |
| 255 | dmas = <&dma 2>; |
| 256 | dma-names = "tx"; |
| 257 | pinctrl-names = "default"; |
| 258 | pinctrl-0 = <&spdif_tx_pin>; |
| 259 | status = "disabled"; |
| 260 | }; |
| 261 | |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 262 | uart0: serial@01c28000 { |
| 263 | compatible = "snps,dw-apb-uart"; |
| 264 | reg = <0x01c28000 0x400>; |
| 265 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; |
| 266 | reg-shift = <2>; |
| 267 | reg-io-width = <4>; |
Chen-Yu Tsai | c50f9fb | 2017-07-14 14:42:52 +0800 | [diff] [blame^] | 268 | clocks = <&ccu CLK_BUS_UART0>; |
| 269 | resets = <&ccu RST_BUS_UART0>; |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 270 | status = "disabled"; |
| 271 | }; |
| 272 | |
Chen-Yu Tsai | e407e25 | 2017-05-01 11:14:07 +0800 | [diff] [blame] | 273 | gic: interrupt-controller@1c81000 { |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 274 | compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; |
| 275 | reg = <0x01c81000 0x1000>, |
Marc Zyngier | 387720c | 2017-01-18 09:27:28 +0000 | [diff] [blame] | 276 | <0x01c82000 0x2000>, |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 277 | <0x01c84000 0x2000>, |
| 278 | <0x01c86000 0x2000>; |
| 279 | interrupt-controller; |
| 280 | #interrupt-cells = <3>; |
| 281 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; |
| 282 | }; |
Chen-Yu Tsai | c80aec5 | 2017-05-31 15:58:20 +0800 | [diff] [blame] | 283 | |
| 284 | r_ccu: clock@1f01400 { |
| 285 | compatible = "allwinner,sun8i-a83t-r-ccu"; |
| 286 | reg = <0x01f01400 0x400>; |
| 287 | clocks = <&osc24M>, <&osc16Md512>, <&osc16M>, |
| 288 | <&ccu 6>; |
| 289 | clock-names = "hosc", "losc", "iosc", "pll-periph"; |
| 290 | #clock-cells = <1>; |
| 291 | #reset-cells = <1>; |
| 292 | }; |
Chen-Yu Tsai | 694ca10 | 2017-06-03 22:44:27 +0800 | [diff] [blame] | 293 | |
| 294 | r_pio: pinctrl@1f02c00 { |
| 295 | compatible = "allwinner,sun8i-a83t-r-pinctrl"; |
| 296 | reg = <0x01f02c00 0x400>; |
| 297 | interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; |
| 298 | clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, |
| 299 | <&osc16Md512>; |
| 300 | clock-names = "apb", "hosc", "losc"; |
| 301 | gpio-controller; |
| 302 | #gpio-cells = <3>; |
| 303 | interrupt-controller; |
| 304 | #interrupt-cells = <3>; |
| 305 | }; |
Vishnu Patekar | 7c929aa | 2016-01-06 21:11:53 +0800 | [diff] [blame] | 306 | }; |
| 307 | }; |