Blame - drivers/gpu/drm/msm/Makefile - kernel/msm-4.19

blob: 065ad4138799927f35904e4f3d4cae8560a8688a [file] [log] [blame]

Rob Clark	c8afe68	2013-06-26 12:44:06 -0400	[diff] [blame]	1	ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/msm
Hai Li	5c82902	2015-08-13 17:45:52 -0400	[diff] [blame]	2	ccflags-$(CONFIG_DRM_MSM_DSI) += -Idrivers/gpu/drm/msm/dsi
Rob Clark	c8afe68	2013-06-26 12:44:06 -0400	[diff] [blame]	3
				4	msm-y := \
Rob Clark	bfd28b1	2014-09-05 13:06:37 -0400	[diff] [blame]	5	adreno/adreno_device.o \
Rob Clark	7198e6b	2013-07-19 12:59:32 -0400	[diff] [blame]	6	adreno/adreno_gpu.o \
				7	adreno/a3xx_gpu.o \
Aravind Ganesan	23bd62f	2014-09-08 13:40:16 -0600	[diff] [blame]	8	adreno/a4xx_gpu.o \
Rob Clark	c8afe68	2013-06-26 12:44:06 -0400	[diff] [blame]	9	hdmi/hdmi.o \
Rob Clark	c0c0d9e	2013-12-11 14:44:02 -0500	[diff] [blame]	10	hdmi/hdmi_audio.o \
Rob Clark	a3376e3	2013-08-30 13:02:15 -0400	[diff] [blame]	11	hdmi/hdmi_bridge.o \
Rob Clark	c8afe68	2013-06-26 12:44:06 -0400	[diff] [blame]	12	hdmi/hdmi_connector.o \
jilai wang	c6a57a5	2015-04-02 17:49:01 -0400	[diff] [blame]	13	hdmi/hdmi_hdcp.o \
Rob Clark	c8afe68	2013-06-26 12:44:06 -0400	[diff] [blame]	14	hdmi/hdmi_i2c.o \
				15	hdmi/hdmi_phy_8960.o \
				16	hdmi/hdmi_phy_8x60.o \
Rob Clark	dada25b	2013-12-01 12:12:54 -0500	[diff] [blame]	17	hdmi/hdmi_phy_8x74.o \
Hai Li	ab5b010	2015-01-07 18:47:44 -0500	[diff] [blame]	18	edp/edp.o \
				19	edp/edp_aux.o \
				20	edp/edp_bridge.o \
				21	edp/edp_connector.o \
				22	edp/edp_ctrl.o \
				23	edp/edp_phy.o \
Rob Clark	10a02eb	2013-11-30 14:58:23 -0500	[diff] [blame]	24	mdp/mdp_format.o \
Rob Clark	9e0efa6	2013-11-30 17:24:22 -0500	[diff] [blame]	25	mdp/mdp_kms.o \
Rob Clark	2e54a92	2013-11-30 12:37:42 -0500	[diff] [blame]	26	mdp/mdp4/mdp4_crtc.o \
				27	mdp/mdp4/mdp4_dtv_encoder.o \
Rob Clark	3e87599	2014-08-01 13:08:11 -0400	[diff] [blame]	28	mdp/mdp4/mdp4_lcdc_encoder.o \
				29	mdp/mdp4/mdp4_lvds_connector.o \
Rob Clark	2e54a92	2013-11-30 12:37:42 -0500	[diff] [blame]	30	mdp/mdp4/mdp4_irq.o \
				31	mdp/mdp4/mdp4_kms.o \
				32	mdp/mdp4/mdp4_plane.o \
Stephane Viau	2e362e1	2014-11-18 12:49:48 -0500	[diff] [blame]	33	mdp/mdp5/mdp5_cfg.o \
Stephane Viau	0deed25	2014-11-18 12:49:49 -0500	[diff] [blame]	34	mdp/mdp5/mdp5_ctl.o \
Rob Clark	06c0dd9	2013-11-30 17:51:47 -0500	[diff] [blame]	35	mdp/mdp5/mdp5_crtc.o \
				36	mdp/mdp5/mdp5_encoder.o \
				37	mdp/mdp5/mdp5_irq.o \
				38	mdp/mdp5/mdp5_kms.o \
				39	mdp/mdp5/mdp5_plane.o \
				40	mdp/mdp5/mdp5_smp.o \
Rob Clark	cf3a7e4	2014-11-08 13:21:06 -0500	[diff] [blame]	41	msm_atomic.o \
Rob Clark	c8afe68	2013-06-26 12:44:06 -0400	[diff] [blame]	42	msm_drv.o \
				43	msm_fb.o \
Rob Clark	7198e6b	2013-07-19 12:59:32 -0400	[diff] [blame]	44	msm_gem.o \
Rob Clark	05b8491	2013-09-28 11:28:35 -0400	[diff] [blame]	45	msm_gem_prime.o \
Rob Clark	7198e6b	2013-07-19 12:59:32 -0400	[diff] [blame]	46	msm_gem_submit.o \
				47	msm_gpu.o \
Rob Clark	871d812	2013-11-16 12:56:06 -0500	[diff] [blame]	48	msm_iommu.o \
Rob Clark	70c70f0	2014-05-30 14:49:43 -0400	[diff] [blame]	49	msm_perf.o \
Rob Clark	a7d3c95	2014-05-30 14:47:38 -0400	[diff] [blame]	50	msm_rd.o \
Rob Clark	7198e6b	2013-07-19 12:59:32 -0400	[diff] [blame]	51	msm_ringbuffer.o
Rob Clark	c8afe68	2013-06-26 12:44:06 -0400	[diff] [blame]	52
Archit Taneja	a9ee34b	2015-07-13 12:12:07 +0530	[diff] [blame]	53	msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
Rob Clark	3e87599	2014-08-01 13:08:11 -0400	[diff] [blame]	54	msm-$(CONFIG_COMMON_CLK) += mdp/mdp4/mdp4_lvds_pll.o
Hai Li	825637b	2015-05-15 13:04:04 -0400	[diff] [blame]	55
Hai Li	a689554	2015-03-31 14:36:33 -0400	[diff] [blame]	56	msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \
Vinay Simha BN	776638e	2015-10-19 12:27:11 +0530	[diff] [blame]	57	mdp/mdp4/mdp4_dsi_encoder.o \
Hai Li	d248b61	2015-08-13 17:49:29 -0400	[diff] [blame]	58	dsi/dsi_cfg.o \
Hai Li	a689554	2015-03-31 14:36:33 -0400	[diff] [blame]	59	dsi/dsi_host.o \
				60	dsi/dsi_manager.o \
Hai Li	5c82902	2015-08-13 17:45:52 -0400	[diff] [blame]	61	dsi/phy/dsi_phy.o \
Hai Li	d5af49c	2015-03-26 19:25:17 -0400	[diff] [blame]	62	mdp/mdp5/mdp5_cmd_encoder.o
Rob Clark	c8afe68	2013-06-26 12:44:06 -0400	[diff] [blame]	63
Hai Li	1bf4d7c	2015-08-13 17:45:53 -0400	[diff] [blame]	64	msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o
				65	msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o
Archit Taneja	225380b	2015-10-14 12:00:34 +0530	[diff] [blame]	66	msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o
Hai Li	1bf4d7c	2015-08-13 17:45:53 -0400	[diff] [blame]	67
				68	ifeq ($(CONFIG_DRM_MSM_DSI_PLL),y)
				69	msm-y += dsi/pll/dsi_pll.o
				70	msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/pll/dsi_pll_28nm.o
Archit Taneja	c6538de	2015-10-14 12:03:44 +0530	[diff] [blame^]	71	msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/pll/dsi_pll_28nm_8960.o
Hai Li	1bf4d7c	2015-08-13 17:45:53 -0400	[diff] [blame]	72	endif
Hai Li	825637b	2015-05-15 13:04:04 -0400	[diff] [blame]	73
Rob Clark	c8afe68	2013-06-26 12:44:06 -0400	[diff] [blame]	74	obj-$(CONFIG_DRM_MSM) += msm.o