blob: 0f2d4b415560f75fdc1132de3ae68c6f82e4628b [file] [log] [blame]
Andrew de Quincey6bca3582006-08-08 09:10:10 -03001 /*
2 Driver for Philips tda10086 DVBS Demodulator
3
4 (c) 2006 Andrew de Quincey
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20
21 */
22
23#include <linux/init.h>
24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/device.h>
27#include <linux/jiffies.h>
28#include <linux/string.h>
29#include <linux/slab.h>
30
31#include "dvb_frontend.h"
32#include "tda10086.h"
33
34#define SACLK 96000000
35
36struct tda10086_state {
37 struct i2c_adapter* i2c;
38 const struct tda10086_config* config;
39 struct dvb_frontend frontend;
40
41 /* private demod data */
42 u32 frequency;
43 u32 symbol_rate;
Oliver Endrissc6604152007-05-28 18:06:27 -030044 bool has_lock;
Andrew de Quincey6bca3582006-08-08 09:10:10 -030045};
46
Andrew de Quincey07e19c22006-08-08 09:10:11 -030047static int debug = 0;
Andrew de Quincey6bca3582006-08-08 09:10:10 -030048#define dprintk(args...) \
49 do { \
50 if (debug) printk(KERN_DEBUG "tda10086: " args); \
51 } while (0)
52
53static int tda10086_write_byte(struct tda10086_state *state, int reg, int data)
54{
55 int ret;
56 u8 b0[] = { reg, data };
57 struct i2c_msg msg = { .flags = 0, .buf = b0, .len = 2 };
58
59 msg.addr = state->config->demod_address;
60 ret = i2c_transfer(state->i2c, &msg, 1);
61
62 if (ret != 1)
63 dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n",
64 __FUNCTION__, reg, data, ret);
65
66 return (ret != 1) ? ret : 0;
67}
68
69static int tda10086_read_byte(struct tda10086_state *state, int reg)
70{
71 int ret;
72 u8 b0[] = { reg };
73 u8 b1[] = { 0 };
74 struct i2c_msg msg[] = {{ .flags = 0, .buf = b0, .len = 1 },
75 { .flags = I2C_M_RD, .buf = b1, .len = 1 }};
76
77 msg[0].addr = state->config->demod_address;
78 msg[1].addr = state->config->demod_address;
79 ret = i2c_transfer(state->i2c, msg, 2);
80
81 if (ret != 2) {
82 dprintk("%s: error reg=0x%x, ret=%i\n", __FUNCTION__, reg,
83 ret);
84 return ret;
85 }
86
87 return b1[0];
88}
89
90static int tda10086_write_mask(struct tda10086_state *state, int reg, int mask, int data)
91{
92 int val;
93
94 // read a byte and check
95 val = tda10086_read_byte(state, reg);
96 if (val < 0)
97 return val;
98
99 // mask if off
100 val = val & ~mask;
101 val |= data & 0xff;
102
103 // write it out again
104 return tda10086_write_byte(state, reg, val);
105}
106
107static int tda10086_init(struct dvb_frontend* fe)
108{
109 struct tda10086_state* state = fe->demodulator_priv;
110
111 dprintk ("%s\n", __FUNCTION__);
112
113 // reset
114 tda10086_write_byte(state, 0x00, 0x00);
115 msleep(10);
116
117 // misc setup
118 tda10086_write_byte(state, 0x01, 0x94);
119 tda10086_write_byte(state, 0x02, 0x35); // NOTE: TT drivers appear to disable CSWP
Oliver Endrissc6604152007-05-28 18:06:27 -0300120 tda10086_write_byte(state, 0x03, 0xe4);
Andrew de Quincey6bca3582006-08-08 09:10:10 -0300121 tda10086_write_byte(state, 0x04, 0x43);
122 tda10086_write_byte(state, 0x0c, 0x0c);
123 tda10086_write_byte(state, 0x1b, 0xb0); // noise threshold
124 tda10086_write_byte(state, 0x20, 0x89); // misc
125 tda10086_write_byte(state, 0x30, 0x04); // acquisition period length
126 tda10086_write_byte(state, 0x32, 0x00); // irq off
127 tda10086_write_byte(state, 0x31, 0x56); // setup AFC
128
129 // setup PLL (assumes 16Mhz XIN)
130 tda10086_write_byte(state, 0x55, 0x2c); // misc PLL setup
131 tda10086_write_byte(state, 0x3a, 0x0b); // M=12
132 tda10086_write_byte(state, 0x3b, 0x01); // P=2
133 tda10086_write_mask(state, 0x55, 0x20, 0x00); // powerup PLL
134
135 // setup TS interface
136 tda10086_write_byte(state, 0x11, 0x81);
137 tda10086_write_byte(state, 0x12, 0x81);
138 tda10086_write_byte(state, 0x19, 0x40); // parallel mode A + MSBFIRST
139 tda10086_write_byte(state, 0x56, 0x80); // powerdown WPLL - unused in the mode we use
140 tda10086_write_byte(state, 0x57, 0x08); // bypass WPLL - unused in the mode we use
141 tda10086_write_byte(state, 0x10, 0x2a);
142
143 // setup ADC
144 tda10086_write_byte(state, 0x58, 0x61); // ADC setup
145 tda10086_write_mask(state, 0x58, 0x01, 0x00); // powerup ADC
146
147 // setup AGC
148 tda10086_write_byte(state, 0x05, 0x0B);
149 tda10086_write_byte(state, 0x37, 0x63);
Oliver Endrissc6604152007-05-28 18:06:27 -0300150 tda10086_write_byte(state, 0x3f, 0x0a); // NOTE: flydvb varies it
Andrew de Quincey6bca3582006-08-08 09:10:10 -0300151 tda10086_write_byte(state, 0x40, 0x64);
152 tda10086_write_byte(state, 0x41, 0x4f);
153 tda10086_write_byte(state, 0x42, 0x43);
154
155 // setup viterbi
156 tda10086_write_byte(state, 0x1a, 0x11); // VBER 10^6, DVB, QPSK
157
158 // setup carrier recovery
159 tda10086_write_byte(state, 0x3d, 0x80);
160
161 // setup SEC
162 tda10086_write_byte(state, 0x36, 0x00); // all SEC off
163 tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000))); // } tone frequency
164 tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8); // }
165
166 return 0;
167}
168
169static void tda10086_diseqc_wait(struct tda10086_state *state)
170{
171 unsigned long timeout = jiffies + msecs_to_jiffies(200);
172 while (!(tda10086_read_byte(state, 0x50) & 0x01)) {
173 if(time_after(jiffies, timeout)) {
174 printk("%s: diseqc queue not ready, command may be lost.\n", __FUNCTION__);
175 break;
176 }
177 msleep(10);
178 }
179}
180
181static int tda10086_set_tone (struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
182{
183 struct tda10086_state* state = fe->demodulator_priv;
184
185 dprintk ("%s\n", __FUNCTION__);
186
187 switch(tone) {
188 case SEC_TONE_OFF:
189 tda10086_write_byte(state, 0x36, 0x00);
190 break;
191
192 case SEC_TONE_ON:
193 tda10086_write_byte(state, 0x36, 0x01);
194 break;
195 }
196
197 return 0;
198}
199
200static int tda10086_send_master_cmd (struct dvb_frontend* fe,
201 struct dvb_diseqc_master_cmd* cmd)
202{
203 struct tda10086_state* state = fe->demodulator_priv;
204 int i;
205 u8 oldval;
206
207 dprintk ("%s\n", __FUNCTION__);
208
209 if (cmd->msg_len > 6)
210 return -EINVAL;
211 oldval = tda10086_read_byte(state, 0x36);
212
213 for(i=0; i< cmd->msg_len; i++) {
214 tda10086_write_byte(state, 0x48+i, cmd->msg[i]);
215 }
Andreas Oberritterd420cb42007-04-01 19:29:16 -0300216 tda10086_write_byte(state, 0x36, 0x08 | ((cmd->msg_len - 1) << 4));
Andrew de Quincey6bca3582006-08-08 09:10:10 -0300217
218 tda10086_diseqc_wait(state);
219
220 tda10086_write_byte(state, 0x36, oldval);
221
222 return 0;
223}
224
225static int tda10086_send_burst (struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd)
226{
227 struct tda10086_state* state = fe->demodulator_priv;
228 u8 oldval = tda10086_read_byte(state, 0x36);
229
230 dprintk ("%s\n", __FUNCTION__);
231
232 switch(minicmd) {
233 case SEC_MINI_A:
234 tda10086_write_byte(state, 0x36, 0x04);
235 break;
236
237 case SEC_MINI_B:
238 tda10086_write_byte(state, 0x36, 0x06);
239 break;
240 }
241
242 tda10086_diseqc_wait(state);
243
244 tda10086_write_byte(state, 0x36, oldval);
245
246 return 0;
247}
248
249static int tda10086_set_inversion(struct tda10086_state *state,
250 struct dvb_frontend_parameters *fe_params)
251{
252 u8 invval = 0x80;
253
254 dprintk ("%s %i %i\n", __FUNCTION__, fe_params->inversion, state->config->invert);
255
256 switch(fe_params->inversion) {
257 case INVERSION_OFF:
258 if (state->config->invert)
259 invval = 0x40;
260 break;
261 case INVERSION_ON:
262 if (!state->config->invert)
263 invval = 0x40;
264 break;
265 case INVERSION_AUTO:
266 invval = 0x00;
267 break;
268 }
269 tda10086_write_mask(state, 0x0c, 0xc0, invval);
270
271 return 0;
272}
273
274static int tda10086_set_symbol_rate(struct tda10086_state *state,
275 struct dvb_frontend_parameters *fe_params)
276{
277 u8 dfn = 0;
278 u8 afs = 0;
279 u8 byp = 0;
280 u8 reg37 = 0x43;
281 u8 reg42 = 0x43;
282 u64 big;
283 u32 tmp;
284 u32 bdr;
285 u32 bdri;
286 u32 symbol_rate = fe_params->u.qpsk.symbol_rate;
287
288 dprintk ("%s %i\n", __FUNCTION__, symbol_rate);
289
290 // setup the decimation and anti-aliasing filters..
291 if (symbol_rate < (u32) (SACLK * 0.0137)) {
292 dfn=4;
293 afs=1;
294 } else if (symbol_rate < (u32) (SACLK * 0.0208)) {
295 dfn=4;
296 afs=0;
297 } else if (symbol_rate < (u32) (SACLK * 0.0270)) {
298 dfn=3;
299 afs=1;
300 } else if (symbol_rate < (u32) (SACLK * 0.0416)) {
301 dfn=3;
302 afs=0;
303 } else if (symbol_rate < (u32) (SACLK * 0.0550)) {
304 dfn=2;
305 afs=1;
306 } else if (symbol_rate < (u32) (SACLK * 0.0833)) {
307 dfn=2;
308 afs=0;
309 } else if (symbol_rate < (u32) (SACLK * 0.1100)) {
310 dfn=1;
311 afs=1;
312 } else if (symbol_rate < (u32) (SACLK * 0.1666)) {
313 dfn=1;
314 afs=0;
315 } else if (symbol_rate < (u32) (SACLK * 0.2200)) {
316 dfn=0;
317 afs=1;
318 } else if (symbol_rate < (u32) (SACLK * 0.3333)) {
319 dfn=0;
320 afs=0;
321 } else {
322 reg37 = 0x63;
323 reg42 = 0x4f;
324 byp=1;
325 }
326
327 // calculate BDR
328 big = (1ULL<<21) * ((u64) symbol_rate/1000ULL) * (1ULL<<dfn);
329 big += ((SACLK/1000ULL)-1ULL);
330 do_div(big, (SACLK/1000ULL));
331 bdr = big & 0xfffff;
332
333 // calculate BDRI
334 tmp = (1<<dfn)*(symbol_rate/1000);
335 bdri = ((32 * (SACLK/1000)) + (tmp-1)) / tmp;
336
337 tda10086_write_byte(state, 0x21, (afs << 7) | dfn);
338 tda10086_write_mask(state, 0x20, 0x08, byp << 3);
339 tda10086_write_byte(state, 0x06, bdr);
340 tda10086_write_byte(state, 0x07, bdr >> 8);
341 tda10086_write_byte(state, 0x08, bdr >> 16);
342 tda10086_write_byte(state, 0x09, bdri);
343 tda10086_write_byte(state, 0x37, reg37);
344 tda10086_write_byte(state, 0x42, reg42);
345
346 return 0;
347}
348
349static int tda10086_set_fec(struct tda10086_state *state,
350 struct dvb_frontend_parameters *fe_params)
351{
352 u8 fecval;
353
354 dprintk ("%s %i\n", __FUNCTION__, fe_params->u.qpsk.fec_inner);
355
356 switch(fe_params->u.qpsk.fec_inner) {
357 case FEC_1_2:
358 fecval = 0x00;
359 break;
360 case FEC_2_3:
361 fecval = 0x01;
362 break;
363 case FEC_3_4:
364 fecval = 0x02;
365 break;
366 case FEC_4_5:
367 fecval = 0x03;
368 break;
369 case FEC_5_6:
370 fecval = 0x04;
371 break;
372 case FEC_6_7:
373 fecval = 0x05;
374 break;
375 case FEC_7_8:
376 fecval = 0x06;
377 break;
378 case FEC_8_9:
379 fecval = 0x07;
380 break;
381 case FEC_AUTO:
382 fecval = 0x08;
383 break;
384 default:
385 return -1;
386 }
387 tda10086_write_byte(state, 0x0d, fecval);
388
389 return 0;
390}
391
392static int tda10086_set_frontend(struct dvb_frontend* fe,
393 struct dvb_frontend_parameters *fe_params)
394{
395 struct tda10086_state *state = fe->demodulator_priv;
396 int ret;
397 u32 freq = 0;
398 int freqoff;
399
400 dprintk ("%s\n", __FUNCTION__);
401
Oliver Endrissc6604152007-05-28 18:06:27 -0300402 // modify parameters for tuning
403 tda10086_write_byte(state, 0x02, 0x35);
404 state->has_lock = false;
405
Andrew de Quincey6bca3582006-08-08 09:10:10 -0300406 // set params
407 if (fe->ops.tuner_ops.set_params) {
408 fe->ops.tuner_ops.set_params(fe, fe_params);
409 if (fe->ops.i2c_gate_ctrl)
410 fe->ops.i2c_gate_ctrl(fe, 0);
411
412 if (fe->ops.tuner_ops.get_frequency)
413 fe->ops.tuner_ops.get_frequency(fe, &freq);
414 if (fe->ops.i2c_gate_ctrl)
415 fe->ops.i2c_gate_ctrl(fe, 0);
416 }
417
418 // calcluate the frequency offset (in *Hz* not kHz)
419 freqoff = fe_params->frequency - freq;
420 freqoff = ((1<<16) * freqoff) / (SACLK/1000);
421 tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f));
422 tda10086_write_byte(state, 0x3e, freqoff);
423
424 if ((ret = tda10086_set_inversion(state, fe_params)) < 0)
425 return ret;
426 if ((ret = tda10086_set_symbol_rate(state, fe_params)) < 0)
427 return ret;
428 if ((ret = tda10086_set_fec(state, fe_params)) < 0)
429 return ret;
430
431 // soft reset + disable TS output until lock
432 tda10086_write_mask(state, 0x10, 0x40, 0x40);
433 tda10086_write_mask(state, 0x00, 0x01, 0x00);
434
435 state->symbol_rate = fe_params->u.qpsk.symbol_rate;
436 state->frequency = fe_params->frequency;
437 return 0;
438}
439
440static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *fe_params)
441{
442 struct tda10086_state* state = fe->demodulator_priv;
443 u8 val;
444 int tmp;
445 u64 tmp64;
446
447 dprintk ("%s\n", __FUNCTION__);
448
Andrew de Quincey221a09d2006-11-22 18:01:21 -0300449 // check for invalid symbol rate
450 if (fe_params->u.qpsk.symbol_rate < 500000)
451 return -EINVAL;
452
Andrew de Quincey6bca3582006-08-08 09:10:10 -0300453 // calculate the updated frequency (note: we convert from Hz->kHz)
454 tmp64 = tda10086_read_byte(state, 0x52);
455 tmp64 |= (tda10086_read_byte(state, 0x51) << 8);
456 if (tmp64 & 0x8000)
457 tmp64 |= 0xffffffffffff0000ULL;
458 tmp64 = (tmp64 * (SACLK/1000ULL));
459 do_div(tmp64, (1ULL<<15) * (1ULL<<1));
460 fe_params->frequency = (int) state->frequency + (int) tmp64;
461
462 // the inversion
463 val = tda10086_read_byte(state, 0x0c);
464 if (val & 0x80) {
465 switch(val & 0x40) {
466 case 0x00:
467 fe_params->inversion = INVERSION_OFF;
468 if (state->config->invert)
469 fe_params->inversion = INVERSION_ON;
470 break;
471 default:
472 fe_params->inversion = INVERSION_ON;
473 if (state->config->invert)
474 fe_params->inversion = INVERSION_OFF;
475 break;
476 }
477 } else {
478 tda10086_read_byte(state, 0x0f);
479 switch(val & 0x02) {
480 case 0x00:
481 fe_params->inversion = INVERSION_OFF;
482 if (state->config->invert)
483 fe_params->inversion = INVERSION_ON;
484 break;
485 default:
486 fe_params->inversion = INVERSION_ON;
487 if (state->config->invert)
488 fe_params->inversion = INVERSION_OFF;
489 break;
490 }
491 }
492
493 // calculate the updated symbol rate
494 tmp = tda10086_read_byte(state, 0x1d);
495 if (tmp & 0x80)
496 tmp |= 0xffffff00;
497 tmp = (tmp * 480 * (1<<1)) / 128;
498 tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000);
499 fe_params->u.qpsk.symbol_rate = state->symbol_rate + tmp;
500
501 // the FEC
502 val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4;
503 switch(val) {
504 case 0x00:
505 fe_params->u.qpsk.fec_inner = FEC_1_2;
506 break;
507 case 0x01:
508 fe_params->u.qpsk.fec_inner = FEC_2_3;
509 break;
510 case 0x02:
511 fe_params->u.qpsk.fec_inner = FEC_3_4;
512 break;
513 case 0x03:
514 fe_params->u.qpsk.fec_inner = FEC_4_5;
515 break;
516 case 0x04:
517 fe_params->u.qpsk.fec_inner = FEC_5_6;
518 break;
519 case 0x05:
520 fe_params->u.qpsk.fec_inner = FEC_6_7;
521 break;
522 case 0x06:
523 fe_params->u.qpsk.fec_inner = FEC_7_8;
524 break;
525 case 0x07:
526 fe_params->u.qpsk.fec_inner = FEC_8_9;
527 break;
528 }
529
530 return 0;
531}
532
533static int tda10086_read_status(struct dvb_frontend* fe, fe_status_t *fe_status)
534{
535 struct tda10086_state* state = fe->demodulator_priv;
536 u8 val;
537
538 dprintk ("%s\n", __FUNCTION__);
539
540 val = tda10086_read_byte(state, 0x0e);
541 *fe_status = 0;
542 if (val & 0x01)
543 *fe_status |= FE_HAS_SIGNAL;
544 if (val & 0x02)
545 *fe_status |= FE_HAS_CARRIER;
546 if (val & 0x04)
547 *fe_status |= FE_HAS_VITERBI;
548 if (val & 0x08)
549 *fe_status |= FE_HAS_SYNC;
Oliver Endrissc6604152007-05-28 18:06:27 -0300550 if (val & 0x10) {
Andrew de Quincey6bca3582006-08-08 09:10:10 -0300551 *fe_status |= FE_HAS_LOCK;
Oliver Endrissc6604152007-05-28 18:06:27 -0300552 if (!state->has_lock) {
553 state->has_lock = true;
554 // modify parameters for stable reception
555 tda10086_write_byte(state, 0x02, 0x00);
556 }
557 }
Andrew de Quincey6bca3582006-08-08 09:10:10 -0300558
559 return 0;
560}
561
562static int tda10086_read_signal_strength(struct dvb_frontend* fe, u16 * signal)
563{
564 struct tda10086_state* state = fe->demodulator_priv;
565 u8 _str;
566
567 dprintk ("%s\n", __FUNCTION__);
568
Oliver Endrissc6604152007-05-28 18:06:27 -0300569 _str = 0xff - tda10086_read_byte(state, 0x43);
Andrew de Quincey6bca3582006-08-08 09:10:10 -0300570 *signal = (_str << 8) | _str;
571
572 return 0;
573}
574
575static int tda10086_read_snr(struct dvb_frontend* fe, u16 * snr)
576{
577 struct tda10086_state* state = fe->demodulator_priv;
578 u8 _snr;
579
580 dprintk ("%s\n", __FUNCTION__);
581
Oliver Endrissc6604152007-05-28 18:06:27 -0300582 _snr = 0xff - tda10086_read_byte(state, 0x1c);
Andrew de Quincey6bca3582006-08-08 09:10:10 -0300583 *snr = (_snr << 8) | _snr;
584
585 return 0;
586}
587
588static int tda10086_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
589{
590 struct tda10086_state* state = fe->demodulator_priv;
591
592 dprintk ("%s\n", __FUNCTION__);
593
594 // read it
595 *ucblocks = tda10086_read_byte(state, 0x18) & 0x7f;
596
597 // reset counter
598 tda10086_write_byte(state, 0x18, 0x00);
599 tda10086_write_byte(state, 0x18, 0x80);
600
601 return 0;
602}
603
604static int tda10086_read_ber(struct dvb_frontend* fe, u32* ber)
605{
606 struct tda10086_state* state = fe->demodulator_priv;
607
608 dprintk ("%s\n", __FUNCTION__);
609
610 // read it
611 *ber = 0;
612 *ber |= tda10086_read_byte(state, 0x15);
613 *ber |= tda10086_read_byte(state, 0x16) << 8;
614 *ber |= (tda10086_read_byte(state, 0x17) & 0xf) << 16;
615
616 return 0;
617}
618
619static int tda10086_sleep(struct dvb_frontend* fe)
620{
621 struct tda10086_state* state = fe->demodulator_priv;
622
623 dprintk ("%s\n", __FUNCTION__);
624
625 tda10086_write_mask(state, 0x00, 0x08, 0x08);
626
627 return 0;
628}
629
630static int tda10086_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
631{
632 struct tda10086_state* state = fe->demodulator_priv;
633
634 dprintk ("%s\n", __FUNCTION__);
635
636 if (enable) {
637 tda10086_write_mask(state, 0x00, 0x10, 0x10);
638 } else {
639 tda10086_write_mask(state, 0x00, 0x10, 0x00);
640 }
641
642 return 0;
643}
644
645static int tda10086_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
646{
647 if (fesettings->parameters.u.qpsk.symbol_rate > 20000000) {
648 fesettings->min_delay_ms = 50;
649 fesettings->step_size = 2000;
650 fesettings->max_drift = 8000;
651 } else if (fesettings->parameters.u.qpsk.symbol_rate > 12000000) {
652 fesettings->min_delay_ms = 100;
653 fesettings->step_size = 1500;
654 fesettings->max_drift = 9000;
655 } else if (fesettings->parameters.u.qpsk.symbol_rate > 8000000) {
656 fesettings->min_delay_ms = 100;
657 fesettings->step_size = 1000;
658 fesettings->max_drift = 8000;
659 } else if (fesettings->parameters.u.qpsk.symbol_rate > 4000000) {
660 fesettings->min_delay_ms = 100;
661 fesettings->step_size = 500;
662 fesettings->max_drift = 7000;
663 } else if (fesettings->parameters.u.qpsk.symbol_rate > 2000000) {
664 fesettings->min_delay_ms = 200;
665 fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000);
666 fesettings->max_drift = 14 * fesettings->step_size;
667 } else {
668 fesettings->min_delay_ms = 200;
669 fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000);
670 fesettings->max_drift = 18 * fesettings->step_size;
671 }
672
673 return 0;
674}
675
676static void tda10086_release(struct dvb_frontend* fe)
677{
678 struct tda10086_state *state = fe->demodulator_priv;
679 tda10086_sleep(fe);
680 kfree(state);
681}
682
683static struct dvb_frontend_ops tda10086_ops = {
684
685 .info = {
686 .name = "Philips TDA10086 DVB-S",
687 .type = FE_QPSK,
688 .frequency_min = 950000,
689 .frequency_max = 2150000,
690 .frequency_stepsize = 125, /* kHz for QPSK frontends */
691 .symbol_rate_min = 1000000,
692 .symbol_rate_max = 45000000,
693 .caps = FE_CAN_INVERSION_AUTO |
694 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
695 FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
696 FE_CAN_QPSK
697 },
698
699 .release = tda10086_release,
700
701 .init = tda10086_init,
702 .sleep = tda10086_sleep,
703 .i2c_gate_ctrl = tda10086_i2c_gate_ctrl,
704
705 .set_frontend = tda10086_set_frontend,
706 .get_frontend = tda10086_get_frontend,
707 .get_tune_settings = tda10086_get_tune_settings,
708
709 .read_status = tda10086_read_status,
710 .read_ber = tda10086_read_ber,
711 .read_signal_strength = tda10086_read_signal_strength,
712 .read_snr = tda10086_read_snr,
713 .read_ucblocks = tda10086_read_ucblocks,
714
715 .diseqc_send_master_cmd = tda10086_send_master_cmd,
716 .diseqc_send_burst = tda10086_send_burst,
717 .set_tone = tda10086_set_tone,
718};
719
720struct dvb_frontend* tda10086_attach(const struct tda10086_config* config,
721 struct i2c_adapter* i2c)
722{
723 struct tda10086_state *state;
724
725 dprintk ("%s\n", __FUNCTION__);
726
727 /* allocate memory for the internal state */
728 state = kmalloc(sizeof(struct tda10086_state), GFP_KERNEL);
729 if (!state)
730 return NULL;
731
732 /* setup the state */
733 state->config = config;
734 state->i2c = i2c;
735
736 /* check if the demod is there */
737 if (tda10086_read_byte(state, 0x1e) != 0xe1) {
738 kfree(state);
739 return NULL;
740 }
741
742 /* create dvb_frontend */
743 memcpy(&state->frontend.ops, &tda10086_ops, sizeof(struct dvb_frontend_ops));
744 state->frontend.demodulator_priv = state;
745 return &state->frontend;
746}
747
748module_param(debug, int, 0644);
749MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
750
751MODULE_DESCRIPTION("Philips TDA10086 DVB-S Demodulator");
752MODULE_AUTHOR("Andrew de Quincey");
753MODULE_LICENSE("GPL");
754
755EXPORT_SYMBOL(tda10086_attach);