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David Howells607ca462012-10-13 10:46:48 +01001/*
2 * VFIO API definition
3 *
4 * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
5 * Author: Alex Williamson <alex.williamson@redhat.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _UAPIVFIO_H
12#define _UAPIVFIO_H
13
14#include <linux/types.h>
15#include <linux/ioctl.h>
16
17#define VFIO_API_VERSION 0
18
19
20/* Kernel & User level defines for VFIO IOCTLs. */
21
22/* Extensions */
23
24#define VFIO_TYPE1_IOMMU 1
Alexey Kardashevskiy5ffd2292013-05-21 13:33:10 +100025#define VFIO_SPAPR_TCE_IOMMU 2
Alex Williamson1ef3e2b2014-02-26 11:38:36 -070026#define VFIO_TYPE1v2_IOMMU 3
Alex Williamsonaa429312014-02-26 11:38:37 -070027/*
28 * IOMMU enforces DMA cache coherence (ex. PCIe NoSnoop stripping). This
29 * capability is subject to change as groups are added or removed.
30 */
31#define VFIO_DMA_CC_IOMMU 4
David Howells607ca462012-10-13 10:46:48 +010032
Gavin Shan1b69be52014-06-10 11:41:57 +100033/* Check if EEH is supported */
34#define VFIO_EEH 5
35
Will Deaconf5c9ece2014-09-29 10:06:19 -060036/* Two-stage IOMMU */
37#define VFIO_TYPE1_NESTING_IOMMU 6 /* Implies v2 */
38
Alexey Kardashevskiy2157e7b2015-06-05 16:35:25 +100039#define VFIO_SPAPR_TCE_v2_IOMMU 7
40
David Howells607ca462012-10-13 10:46:48 +010041/*
Alex Williamson03a76b62015-12-21 15:13:33 -070042 * The No-IOMMU IOMMU offers no translation or isolation for devices and
43 * supports no ioctls outside of VFIO_CHECK_EXTENSION. Use of VFIO's No-IOMMU
44 * code will taint the host kernel and should be used with extreme caution.
45 */
46#define VFIO_NOIOMMU_IOMMU 8
47
48/*
David Howells607ca462012-10-13 10:46:48 +010049 * The IOCTL interface is designed for extensibility by embedding the
50 * structure length (argsz) and flags into structures passed between
51 * kernel and userspace. We therefore use the _IO() macro for these
52 * defines to avoid implicitly embedding a size into the ioctl request.
53 * As structure fields are added, argsz will increase to match and flag
54 * bits will be defined to indicate additional fields with valid data.
55 * It's *always* the caller's responsibility to indicate the size of
56 * the structure passed by setting argsz appropriately.
57 */
58
59#define VFIO_TYPE (';')
60#define VFIO_BASE 100
61
Alex Williamsonc84982a2016-02-22 16:02:32 -070062/*
63 * For extension of INFO ioctls, VFIO makes use of a capability chain
64 * designed after PCI/e capabilities. A flag bit indicates whether
65 * this capability chain is supported and a field defined in the fixed
66 * structure defines the offset of the first capability in the chain.
67 * This field is only valid when the corresponding bit in the flags
68 * bitmap is set. This offset field is relative to the start of the
69 * INFO buffer, as is the next field within each capability header.
70 * The id within the header is a shared address space per INFO ioctl,
71 * while the version field is specific to the capability id. The
72 * contents following the header are specific to the capability id.
73 */
74struct vfio_info_cap_header {
75 __u16 id; /* Identifies capability */
76 __u16 version; /* Version specific to the capability ID */
77 __u32 next; /* Offset of next capability */
78};
79
80/*
81 * Callers of INFO ioctls passing insufficiently sized buffers will see
82 * the capability chain flag bit set, a zero value for the first capability
83 * offset (if available within the provided argsz), and argsz will be
84 * updated to report the necessary buffer size. For compatibility, the
85 * INFO ioctl will not report error in this case, but the capability chain
86 * will not be available.
87 */
88
David Howells607ca462012-10-13 10:46:48 +010089/* -------- IOCTLs for VFIO file descriptor (/dev/vfio/vfio) -------- */
90
91/**
92 * VFIO_GET_API_VERSION - _IO(VFIO_TYPE, VFIO_BASE + 0)
93 *
94 * Report the version of the VFIO API. This allows us to bump the entire
95 * API version should we later need to add or change features in incompatible
96 * ways.
97 * Return: VFIO_API_VERSION
98 * Availability: Always
99 */
100#define VFIO_GET_API_VERSION _IO(VFIO_TYPE, VFIO_BASE + 0)
101
102/**
103 * VFIO_CHECK_EXTENSION - _IOW(VFIO_TYPE, VFIO_BASE + 1, __u32)
104 *
105 * Check whether an extension is supported.
106 * Return: 0 if not supported, 1 (or some other positive integer) if supported.
107 * Availability: Always
108 */
109#define VFIO_CHECK_EXTENSION _IO(VFIO_TYPE, VFIO_BASE + 1)
110
111/**
112 * VFIO_SET_IOMMU - _IOW(VFIO_TYPE, VFIO_BASE + 2, __s32)
113 *
114 * Set the iommu to the given type. The type must be supported by an
115 * iommu driver as verified by calling CHECK_EXTENSION using the same
116 * type. A group must be set to this file descriptor before this
117 * ioctl is available. The IOMMU interfaces enabled by this call are
118 * specific to the value set.
119 * Return: 0 on success, -errno on failure
120 * Availability: When VFIO group attached
121 */
122#define VFIO_SET_IOMMU _IO(VFIO_TYPE, VFIO_BASE + 2)
123
124/* -------- IOCTLs for GROUP file descriptors (/dev/vfio/$GROUP) -------- */
125
126/**
127 * VFIO_GROUP_GET_STATUS - _IOR(VFIO_TYPE, VFIO_BASE + 3,
128 * struct vfio_group_status)
129 *
130 * Retrieve information about the group. Fills in provided
131 * struct vfio_group_info. Caller sets argsz.
132 * Return: 0 on succes, -errno on failure.
133 * Availability: Always
134 */
135struct vfio_group_status {
136 __u32 argsz;
137 __u32 flags;
138#define VFIO_GROUP_FLAGS_VIABLE (1 << 0)
139#define VFIO_GROUP_FLAGS_CONTAINER_SET (1 << 1)
140};
141#define VFIO_GROUP_GET_STATUS _IO(VFIO_TYPE, VFIO_BASE + 3)
142
143/**
144 * VFIO_GROUP_SET_CONTAINER - _IOW(VFIO_TYPE, VFIO_BASE + 4, __s32)
145 *
146 * Set the container for the VFIO group to the open VFIO file
147 * descriptor provided. Groups may only belong to a single
148 * container. Containers may, at their discretion, support multiple
149 * groups. Only when a container is set are all of the interfaces
150 * of the VFIO file descriptor and the VFIO group file descriptor
151 * available to the user.
152 * Return: 0 on success, -errno on failure.
153 * Availability: Always
154 */
155#define VFIO_GROUP_SET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 4)
156
157/**
158 * VFIO_GROUP_UNSET_CONTAINER - _IO(VFIO_TYPE, VFIO_BASE + 5)
159 *
160 * Remove the group from the attached container. This is the
161 * opposite of the SET_CONTAINER call and returns the group to
162 * an initial state. All device file descriptors must be released
163 * prior to calling this interface. When removing the last group
164 * from a container, the IOMMU will be disabled and all state lost,
165 * effectively also returning the VFIO file descriptor to an initial
166 * state.
167 * Return: 0 on success, -errno on failure.
168 * Availability: When attached to container
169 */
170#define VFIO_GROUP_UNSET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 5)
171
172/**
173 * VFIO_GROUP_GET_DEVICE_FD - _IOW(VFIO_TYPE, VFIO_BASE + 6, char)
174 *
175 * Return a new file descriptor for the device object described by
176 * the provided string. The string should match a device listed in
177 * the devices subdirectory of the IOMMU group sysfs entry. The
178 * group containing the device must already be added to this context.
179 * Return: new file descriptor on success, -errno on failure.
180 * Availability: When attached to container
181 */
182#define VFIO_GROUP_GET_DEVICE_FD _IO(VFIO_TYPE, VFIO_BASE + 6)
183
184/* --------------- IOCTLs for DEVICE file descriptors --------------- */
185
186/**
187 * VFIO_DEVICE_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 7,
188 * struct vfio_device_info)
189 *
190 * Retrieve information about the device. Fills in provided
191 * struct vfio_device_info. Caller sets argsz.
192 * Return: 0 on success, -errno on failure.
193 */
194struct vfio_device_info {
195 __u32 argsz;
196 __u32 flags;
197#define VFIO_DEVICE_FLAGS_RESET (1 << 0) /* Device supports reset */
198#define VFIO_DEVICE_FLAGS_PCI (1 << 1) /* vfio-pci device */
Antonios Motakis9df85aa2015-03-16 14:08:43 -0600199#define VFIO_DEVICE_FLAGS_PLATFORM (1 << 2) /* vfio-platform device */
Antonios Motakis36fe4312015-03-16 14:08:44 -0600200#define VFIO_DEVICE_FLAGS_AMBA (1 << 3) /* vfio-amba device */
David Howells607ca462012-10-13 10:46:48 +0100201 __u32 num_regions; /* Max region index + 1 */
202 __u32 num_irqs; /* Max IRQ index + 1 */
203};
204#define VFIO_DEVICE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 7)
205
206/**
207 * VFIO_DEVICE_GET_REGION_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 8,
208 * struct vfio_region_info)
209 *
210 * Retrieve information about a device region. Caller provides
211 * struct vfio_region_info with index value set. Caller sets argsz.
212 * Implementation of region mapping is bus driver specific. This is
213 * intended to describe MMIO, I/O port, as well as bus specific
214 * regions (ex. PCI config space). Zero sized regions may be used
215 * to describe unimplemented regions (ex. unimplemented PCI BARs).
216 * Return: 0 on success, -errno on failure.
217 */
218struct vfio_region_info {
219 __u32 argsz;
220 __u32 flags;
221#define VFIO_REGION_INFO_FLAG_READ (1 << 0) /* Region supports read */
222#define VFIO_REGION_INFO_FLAG_WRITE (1 << 1) /* Region supports write */
223#define VFIO_REGION_INFO_FLAG_MMAP (1 << 2) /* Region supports mmap */
224 __u32 index; /* Region index */
225 __u32 resv; /* Reserved for alignment */
226 __u64 size; /* Region size (bytes) */
227 __u64 offset; /* Region offset from start of device fd */
228};
229#define VFIO_DEVICE_GET_REGION_INFO _IO(VFIO_TYPE, VFIO_BASE + 8)
230
231/**
232 * VFIO_DEVICE_GET_IRQ_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 9,
233 * struct vfio_irq_info)
234 *
235 * Retrieve information about a device IRQ. Caller provides
236 * struct vfio_irq_info with index value set. Caller sets argsz.
237 * Implementation of IRQ mapping is bus driver specific. Indexes
238 * using multiple IRQs are primarily intended to support MSI-like
239 * interrupt blocks. Zero count irq blocks may be used to describe
240 * unimplemented interrupt types.
241 *
242 * The EVENTFD flag indicates the interrupt index supports eventfd based
243 * signaling.
244 *
245 * The MASKABLE flags indicates the index supports MASK and UNMASK
246 * actions described below.
247 *
248 * AUTOMASKED indicates that after signaling, the interrupt line is
249 * automatically masked by VFIO and the user needs to unmask the line
250 * to receive new interrupts. This is primarily intended to distinguish
251 * level triggered interrupts.
252 *
253 * The NORESIZE flag indicates that the interrupt lines within the index
254 * are setup as a set and new subindexes cannot be enabled without first
255 * disabling the entire index. This is used for interrupts like PCI MSI
256 * and MSI-X where the driver may only use a subset of the available
257 * indexes, but VFIO needs to enable a specific number of vectors
258 * upfront. In the case of MSI-X, where the user can enable MSI-X and
259 * then add and unmask vectors, it's up to userspace to make the decision
260 * whether to allocate the maximum supported number of vectors or tear
261 * down setup and incrementally increase the vectors as each is enabled.
262 */
263struct vfio_irq_info {
264 __u32 argsz;
265 __u32 flags;
266#define VFIO_IRQ_INFO_EVENTFD (1 << 0)
267#define VFIO_IRQ_INFO_MASKABLE (1 << 1)
268#define VFIO_IRQ_INFO_AUTOMASKED (1 << 2)
269#define VFIO_IRQ_INFO_NORESIZE (1 << 3)
270 __u32 index; /* IRQ index */
271 __u32 count; /* Number of IRQs within this index */
272};
273#define VFIO_DEVICE_GET_IRQ_INFO _IO(VFIO_TYPE, VFIO_BASE + 9)
274
275/**
276 * VFIO_DEVICE_SET_IRQS - _IOW(VFIO_TYPE, VFIO_BASE + 10, struct vfio_irq_set)
277 *
278 * Set signaling, masking, and unmasking of interrupts. Caller provides
279 * struct vfio_irq_set with all fields set. 'start' and 'count' indicate
280 * the range of subindexes being specified.
281 *
282 * The DATA flags specify the type of data provided. If DATA_NONE, the
283 * operation performs the specified action immediately on the specified
284 * interrupt(s). For example, to unmask AUTOMASKED interrupt [0,0]:
285 * flags = (DATA_NONE|ACTION_UNMASK), index = 0, start = 0, count = 1.
286 *
287 * DATA_BOOL allows sparse support for the same on arrays of interrupts.
288 * For example, to mask interrupts [0,1] and [0,3] (but not [0,2]):
289 * flags = (DATA_BOOL|ACTION_MASK), index = 0, start = 1, count = 3,
290 * data = {1,0,1}
291 *
292 * DATA_EVENTFD binds the specified ACTION to the provided __s32 eventfd.
293 * A value of -1 can be used to either de-assign interrupts if already
294 * assigned or skip un-assigned interrupts. For example, to set an eventfd
295 * to be trigger for interrupts [0,0] and [0,2]:
296 * flags = (DATA_EVENTFD|ACTION_TRIGGER), index = 0, start = 0, count = 3,
297 * data = {fd1, -1, fd2}
298 * If index [0,1] is previously set, two count = 1 ioctls calls would be
299 * required to set [0,0] and [0,2] without changing [0,1].
300 *
301 * Once a signaling mechanism is set, DATA_BOOL or DATA_NONE can be used
302 * with ACTION_TRIGGER to perform kernel level interrupt loopback testing
303 * from userspace (ie. simulate hardware triggering).
304 *
305 * Setting of an event triggering mechanism to userspace for ACTION_TRIGGER
306 * enables the interrupt index for the device. Individual subindex interrupts
307 * can be disabled using the -1 value for DATA_EVENTFD or the index can be
308 * disabled as a whole with: flags = (DATA_NONE|ACTION_TRIGGER), count = 0.
309 *
310 * Note that ACTION_[UN]MASK specify user->kernel signaling (irqfds) while
311 * ACTION_TRIGGER specifies kernel->user signaling.
312 */
313struct vfio_irq_set {
314 __u32 argsz;
315 __u32 flags;
316#define VFIO_IRQ_SET_DATA_NONE (1 << 0) /* Data not present */
317#define VFIO_IRQ_SET_DATA_BOOL (1 << 1) /* Data is bool (u8) */
318#define VFIO_IRQ_SET_DATA_EVENTFD (1 << 2) /* Data is eventfd (s32) */
319#define VFIO_IRQ_SET_ACTION_MASK (1 << 3) /* Mask interrupt */
320#define VFIO_IRQ_SET_ACTION_UNMASK (1 << 4) /* Unmask interrupt */
321#define VFIO_IRQ_SET_ACTION_TRIGGER (1 << 5) /* Trigger interrupt */
322 __u32 index;
323 __u32 start;
324 __u32 count;
325 __u8 data[];
326};
327#define VFIO_DEVICE_SET_IRQS _IO(VFIO_TYPE, VFIO_BASE + 10)
328
329#define VFIO_IRQ_SET_DATA_TYPE_MASK (VFIO_IRQ_SET_DATA_NONE | \
330 VFIO_IRQ_SET_DATA_BOOL | \
331 VFIO_IRQ_SET_DATA_EVENTFD)
332#define VFIO_IRQ_SET_ACTION_TYPE_MASK (VFIO_IRQ_SET_ACTION_MASK | \
333 VFIO_IRQ_SET_ACTION_UNMASK | \
334 VFIO_IRQ_SET_ACTION_TRIGGER)
335/**
336 * VFIO_DEVICE_RESET - _IO(VFIO_TYPE, VFIO_BASE + 11)
337 *
338 * Reset a device.
339 */
340#define VFIO_DEVICE_RESET _IO(VFIO_TYPE, VFIO_BASE + 11)
341
342/*
343 * The VFIO-PCI bus driver makes use of the following fixed region and
344 * IRQ index mapping. Unimplemented regions return a size of zero.
345 * Unimplemented IRQ types return a count of zero.
346 */
347
348enum {
349 VFIO_PCI_BAR0_REGION_INDEX,
350 VFIO_PCI_BAR1_REGION_INDEX,
351 VFIO_PCI_BAR2_REGION_INDEX,
352 VFIO_PCI_BAR3_REGION_INDEX,
353 VFIO_PCI_BAR4_REGION_INDEX,
354 VFIO_PCI_BAR5_REGION_INDEX,
355 VFIO_PCI_ROM_REGION_INDEX,
356 VFIO_PCI_CONFIG_REGION_INDEX,
Alex Williamson84237a82013-02-18 10:11:13 -0700357 /*
358 * Expose VGA regions defined for PCI base class 03, subclass 00.
359 * This includes I/O port ranges 0x3b0 to 0x3bb and 0x3c0 to 0x3df
360 * as well as the MMIO range 0xa0000 to 0xbffff. Each implemented
361 * range is found at it's identity mapped offset from the region
362 * offset, for example 0x3b0 is region_info.offset + 0x3b0. Areas
363 * between described ranges are unimplemented.
364 */
365 VFIO_PCI_VGA_REGION_INDEX,
David Howells607ca462012-10-13 10:46:48 +0100366 VFIO_PCI_NUM_REGIONS
367};
368
369enum {
370 VFIO_PCI_INTX_IRQ_INDEX,
371 VFIO_PCI_MSI_IRQ_INDEX,
372 VFIO_PCI_MSIX_IRQ_INDEX,
Vijay Mohan Pandarathildad9f892013-03-11 09:31:22 -0600373 VFIO_PCI_ERR_IRQ_INDEX,
Alex Williamson6140a8f2015-02-06 15:05:08 -0700374 VFIO_PCI_REQ_IRQ_INDEX,
David Howells607ca462012-10-13 10:46:48 +0100375 VFIO_PCI_NUM_IRQS
376};
377
Alex Williamson8b27ee62013-09-04 11:28:04 -0600378/**
379 * VFIO_DEVICE_GET_PCI_HOT_RESET_INFO - _IORW(VFIO_TYPE, VFIO_BASE + 12,
380 * struct vfio_pci_hot_reset_info)
381 *
382 * Return: 0 on success, -errno on failure:
383 * -enospc = insufficient buffer, -enodev = unsupported for device.
384 */
385struct vfio_pci_dependent_device {
386 __u32 group_id;
387 __u16 segment;
388 __u8 bus;
389 __u8 devfn; /* Use PCI_SLOT/PCI_FUNC */
390};
391
392struct vfio_pci_hot_reset_info {
393 __u32 argsz;
394 __u32 flags;
395 __u32 count;
396 struct vfio_pci_dependent_device devices[];
397};
398
399#define VFIO_DEVICE_GET_PCI_HOT_RESET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
400
401/**
402 * VFIO_DEVICE_PCI_HOT_RESET - _IOW(VFIO_TYPE, VFIO_BASE + 13,
403 * struct vfio_pci_hot_reset)
404 *
405 * Return: 0 on success, -errno on failure.
406 */
407struct vfio_pci_hot_reset {
408 __u32 argsz;
409 __u32 flags;
410 __u32 count;
411 __s32 group_fds[];
412};
413
414#define VFIO_DEVICE_PCI_HOT_RESET _IO(VFIO_TYPE, VFIO_BASE + 13)
415
David Howells607ca462012-10-13 10:46:48 +0100416/* -------- API for Type1 VFIO IOMMU -------- */
417
418/**
419 * VFIO_IOMMU_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 12, struct vfio_iommu_info)
420 *
421 * Retrieve information about the IOMMU object. Fills in provided
422 * struct vfio_iommu_info. Caller sets argsz.
423 *
424 * XXX Should we do these by CHECK_EXTENSION too?
425 */
426struct vfio_iommu_type1_info {
427 __u32 argsz;
428 __u32 flags;
429#define VFIO_IOMMU_INFO_PGSIZES (1 << 0) /* supported page sizes info */
430 __u64 iova_pgsizes; /* Bitmap of supported page sizes */
431};
432
433#define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
434
435/**
436 * VFIO_IOMMU_MAP_DMA - _IOW(VFIO_TYPE, VFIO_BASE + 13, struct vfio_dma_map)
437 *
438 * Map process virtual addresses to IO virtual addresses using the
439 * provided struct vfio_dma_map. Caller sets argsz. READ &/ WRITE required.
440 */
441struct vfio_iommu_type1_dma_map {
442 __u32 argsz;
443 __u32 flags;
444#define VFIO_DMA_MAP_FLAG_READ (1 << 0) /* readable from device */
445#define VFIO_DMA_MAP_FLAG_WRITE (1 << 1) /* writable from device */
446 __u64 vaddr; /* Process virtual address */
447 __u64 iova; /* IO virtual address */
448 __u64 size; /* Size of mapping (bytes) */
449};
450
451#define VFIO_IOMMU_MAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 13)
452
453/**
Alex Williamson166fd7d2013-06-21 09:38:02 -0600454 * VFIO_IOMMU_UNMAP_DMA - _IOWR(VFIO_TYPE, VFIO_BASE + 14,
455 * struct vfio_dma_unmap)
David Howells607ca462012-10-13 10:46:48 +0100456 *
457 * Unmap IO virtual addresses using the provided struct vfio_dma_unmap.
Alex Williamson166fd7d2013-06-21 09:38:02 -0600458 * Caller sets argsz. The actual unmapped size is returned in the size
459 * field. No guarantee is made to the user that arbitrary unmaps of iova
460 * or size different from those used in the original mapping call will
461 * succeed.
David Howells607ca462012-10-13 10:46:48 +0100462 */
463struct vfio_iommu_type1_dma_unmap {
464 __u32 argsz;
465 __u32 flags;
466 __u64 iova; /* IO virtual address */
467 __u64 size; /* Size of mapping (bytes) */
468};
469
470#define VFIO_IOMMU_UNMAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 14)
471
Alexey Kardashevskiy5ffd2292013-05-21 13:33:10 +1000472/*
473 * IOCTLs to enable/disable IOMMU container usage.
474 * No parameters are supported.
475 */
476#define VFIO_IOMMU_ENABLE _IO(VFIO_TYPE, VFIO_BASE + 15)
477#define VFIO_IOMMU_DISABLE _IO(VFIO_TYPE, VFIO_BASE + 16)
478
479/* -------- Additional API for SPAPR TCE (Server POWERPC) IOMMU -------- */
480
481/*
Alexey Kardashevskiye633bc82015-06-05 16:35:26 +1000482 * The SPAPR TCE DDW info struct provides the information about
483 * the details of Dynamic DMA window capability.
484 *
485 * @pgsizes contains a page size bitmask, 4K/64K/16M are supported.
486 * @max_dynamic_windows_supported tells the maximum number of windows
487 * which the platform can create.
488 * @levels tells the maximum number of levels in multi-level IOMMU tables;
489 * this allows splitting a table into smaller chunks which reduces
490 * the amount of physically contiguous memory required for the table.
491 */
492struct vfio_iommu_spapr_tce_ddw_info {
493 __u64 pgsizes; /* Bitmap of supported page sizes */
494 __u32 max_dynamic_windows_supported;
495 __u32 levels;
496};
497
498/*
Alexey Kardashevskiy5ffd2292013-05-21 13:33:10 +1000499 * The SPAPR TCE info struct provides the information about the PCI bus
500 * address ranges available for DMA, these values are programmed into
501 * the hardware so the guest has to know that information.
502 *
503 * The DMA 32 bit window start is an absolute PCI bus address.
504 * The IOVA address passed via map/unmap ioctls are absolute PCI bus
505 * addresses too so the window works as a filter rather than an offset
506 * for IOVA addresses.
507 *
Alexey Kardashevskiye633bc82015-06-05 16:35:26 +1000508 * Flags supported:
509 * - VFIO_IOMMU_SPAPR_INFO_DDW: informs the userspace that dynamic DMA windows
510 * (DDW) support is present. @ddw is only supported when DDW is present.
Alexey Kardashevskiy5ffd2292013-05-21 13:33:10 +1000511 */
512struct vfio_iommu_spapr_tce_info {
513 __u32 argsz;
Alexey Kardashevskiye633bc82015-06-05 16:35:26 +1000514 __u32 flags;
515#define VFIO_IOMMU_SPAPR_INFO_DDW (1 << 0) /* DDW supported */
Alexey Kardashevskiy5ffd2292013-05-21 13:33:10 +1000516 __u32 dma32_window_start; /* 32 bit window start (bytes) */
517 __u32 dma32_window_size; /* 32 bit window size (bytes) */
Alexey Kardashevskiye633bc82015-06-05 16:35:26 +1000518 struct vfio_iommu_spapr_tce_ddw_info ddw;
Alexey Kardashevskiy5ffd2292013-05-21 13:33:10 +1000519};
520
521#define VFIO_IOMMU_SPAPR_TCE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
522
Gavin Shan1b69be52014-06-10 11:41:57 +1000523/*
524 * EEH PE operation struct provides ways to:
525 * - enable/disable EEH functionality;
526 * - unfreeze IO/DMA for frozen PE;
527 * - read PE state;
528 * - reset PE;
Gavin Shan68cbbc32015-03-26 16:42:09 +1100529 * - configure PE;
530 * - inject EEH error.
Gavin Shan1b69be52014-06-10 11:41:57 +1000531 */
Gavin Shan68cbbc32015-03-26 16:42:09 +1100532struct vfio_eeh_pe_err {
533 __u32 type;
534 __u32 func;
535 __u64 addr;
536 __u64 mask;
537};
538
Gavin Shan1b69be52014-06-10 11:41:57 +1000539struct vfio_eeh_pe_op {
540 __u32 argsz;
541 __u32 flags;
542 __u32 op;
Gavin Shan68cbbc32015-03-26 16:42:09 +1100543 union {
544 struct vfio_eeh_pe_err err;
545 };
Gavin Shan1b69be52014-06-10 11:41:57 +1000546};
547
548#define VFIO_EEH_PE_DISABLE 0 /* Disable EEH functionality */
549#define VFIO_EEH_PE_ENABLE 1 /* Enable EEH functionality */
550#define VFIO_EEH_PE_UNFREEZE_IO 2 /* Enable IO for frozen PE */
551#define VFIO_EEH_PE_UNFREEZE_DMA 3 /* Enable DMA for frozen PE */
552#define VFIO_EEH_PE_GET_STATE 4 /* PE state retrieval */
553#define VFIO_EEH_PE_STATE_NORMAL 0 /* PE in functional state */
554#define VFIO_EEH_PE_STATE_RESET 1 /* PE reset in progress */
555#define VFIO_EEH_PE_STATE_STOPPED 2 /* Stopped DMA and IO */
556#define VFIO_EEH_PE_STATE_STOPPED_DMA 4 /* Stopped DMA only */
557#define VFIO_EEH_PE_STATE_UNAVAIL 5 /* State unavailable */
558#define VFIO_EEH_PE_RESET_DEACTIVATE 5 /* Deassert PE reset */
559#define VFIO_EEH_PE_RESET_HOT 6 /* Assert hot reset */
560#define VFIO_EEH_PE_RESET_FUNDAMENTAL 7 /* Assert fundamental reset */
561#define VFIO_EEH_PE_CONFIGURE 8 /* PE configuration */
Gavin Shan68cbbc32015-03-26 16:42:09 +1100562#define VFIO_EEH_PE_INJECT_ERR 9 /* Inject EEH error */
Gavin Shan1b69be52014-06-10 11:41:57 +1000563
564#define VFIO_EEH_PE_OP _IO(VFIO_TYPE, VFIO_BASE + 21)
565
Alexey Kardashevskiy2157e7b2015-06-05 16:35:25 +1000566/**
567 * VFIO_IOMMU_SPAPR_REGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 17, struct vfio_iommu_spapr_register_memory)
568 *
569 * Registers user space memory where DMA is allowed. It pins
570 * user pages and does the locked memory accounting so
571 * subsequent VFIO_IOMMU_MAP_DMA/VFIO_IOMMU_UNMAP_DMA calls
572 * get faster.
573 */
574struct vfio_iommu_spapr_register_memory {
575 __u32 argsz;
576 __u32 flags;
577 __u64 vaddr; /* Process virtual address */
578 __u64 size; /* Size of mapping (bytes) */
579};
580#define VFIO_IOMMU_SPAPR_REGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 17)
581
582/**
583 * VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 18, struct vfio_iommu_spapr_register_memory)
584 *
585 * Unregisters user space memory registered with
586 * VFIO_IOMMU_SPAPR_REGISTER_MEMORY.
587 * Uses vfio_iommu_spapr_register_memory for parameters.
588 */
589#define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 18)
590
Alexey Kardashevskiye633bc82015-06-05 16:35:26 +1000591/**
592 * VFIO_IOMMU_SPAPR_TCE_CREATE - _IOWR(VFIO_TYPE, VFIO_BASE + 19, struct vfio_iommu_spapr_tce_create)
593 *
594 * Creates an additional TCE table and programs it (sets a new DMA window)
595 * to every IOMMU group in the container. It receives page shift, window
596 * size and number of levels in the TCE table being created.
597 *
598 * It allocates and returns an offset on a PCI bus of the new DMA window.
599 */
600struct vfio_iommu_spapr_tce_create {
601 __u32 argsz;
602 __u32 flags;
603 /* in */
604 __u32 page_shift;
Alexey Kardashevskiy77d6bd42015-12-18 12:35:47 +1100605 __u32 __resv1;
Alexey Kardashevskiye633bc82015-06-05 16:35:26 +1000606 __u64 window_size;
607 __u32 levels;
Alexey Kardashevskiy77d6bd42015-12-18 12:35:47 +1100608 __u32 __resv2;
Alexey Kardashevskiye633bc82015-06-05 16:35:26 +1000609 /* out */
610 __u64 start_addr;
611};
612#define VFIO_IOMMU_SPAPR_TCE_CREATE _IO(VFIO_TYPE, VFIO_BASE + 19)
613
614/**
615 * VFIO_IOMMU_SPAPR_TCE_REMOVE - _IOW(VFIO_TYPE, VFIO_BASE + 20, struct vfio_iommu_spapr_tce_remove)
616 *
617 * Unprograms a TCE table from all groups in the container and destroys it.
618 * It receives a PCI bus offset as a window id.
619 */
620struct vfio_iommu_spapr_tce_remove {
621 __u32 argsz;
622 __u32 flags;
623 /* in */
624 __u64 start_addr;
625};
626#define VFIO_IOMMU_SPAPR_TCE_REMOVE _IO(VFIO_TYPE, VFIO_BASE + 20)
627
Alexey Kardashevskiy5ffd2292013-05-21 13:33:10 +1000628/* ***************************************************************** */
629
David Howells607ca462012-10-13 10:46:48 +0100630#endif /* _UAPIVFIO_H */