Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-pxa/mainstone.c |
| 3 | * |
| 4 | * Support for the Intel HCDDBBVA0 Development Platform. |
| 5 | * (go figure how they came up with such name...) |
| 6 | * |
| 7 | * Author: Nicolas Pitre |
| 8 | * Created: Nov 05, 2002 |
| 9 | * Copyright: MontaVista Software Inc. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License version 2 as |
| 13 | * published by the Free Software Foundation. |
| 14 | */ |
| 15 | |
| 16 | #include <linux/init.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 17 | #include <linux/platform_device.h> |
Nicolas Pitre | 22f11c4 | 2005-06-16 21:23:56 +0100 | [diff] [blame] | 18 | #include <linux/sysdev.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/sched.h> |
| 21 | #include <linux/bitops.h> |
| 22 | #include <linux/fb.h> |
Todd Poynor | 74ec71e | 2005-11-04 17:15:45 +0000 | [diff] [blame] | 23 | #include <linux/ioport.h> |
| 24 | #include <linux/mtd/mtd.h> |
| 25 | #include <linux/mtd/partitions.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | |
| 27 | #include <asm/types.h> |
| 28 | #include <asm/setup.h> |
| 29 | #include <asm/memory.h> |
| 30 | #include <asm/mach-types.h> |
| 31 | #include <asm/hardware.h> |
| 32 | #include <asm/irq.h> |
Todd Poynor | 74ec71e | 2005-11-04 17:15:45 +0000 | [diff] [blame] | 33 | #include <asm/sizes.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | |
| 35 | #include <asm/mach/arch.h> |
| 36 | #include <asm/mach/map.h> |
| 37 | #include <asm/mach/irq.h> |
Todd Poynor | 74ec71e | 2005-11-04 17:15:45 +0000 | [diff] [blame] | 38 | #include <asm/mach/flash.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | |
| 40 | #include <asm/arch/pxa-regs.h> |
| 41 | #include <asm/arch/mainstone.h> |
| 42 | #include <asm/arch/audio.h> |
| 43 | #include <asm/arch/pxafb.h> |
| 44 | #include <asm/arch/mmc.h> |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 45 | #include <asm/arch/irda.h> |
Richard Purdie | 81f280e | 2005-11-12 14:22:11 +0000 | [diff] [blame] | 46 | #include <asm/arch/ohci.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | |
| 48 | #include "generic.h" |
Russell King | 46c41e6 | 2007-05-15 15:39:36 +0100 | [diff] [blame] | 49 | #include "devices.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | |
| 51 | |
| 52 | static unsigned long mainstone_irq_enabled; |
| 53 | |
| 54 | static void mainstone_mask_irq(unsigned int irq) |
| 55 | { |
| 56 | int mainstone_irq = (irq - MAINSTONE_IRQ(0)); |
| 57 | MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq)); |
| 58 | } |
| 59 | |
| 60 | static void mainstone_unmask_irq(unsigned int irq) |
| 61 | { |
| 62 | int mainstone_irq = (irq - MAINSTONE_IRQ(0)); |
| 63 | /* the irq can be acknowledged only if deasserted, so it's done here */ |
| 64 | MST_INTSETCLR &= ~(1 << mainstone_irq); |
| 65 | MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq)); |
| 66 | } |
| 67 | |
David Brownell | 38c677c | 2006-08-01 22:26:25 +0100 | [diff] [blame] | 68 | static struct irq_chip mainstone_irq_chip = { |
| 69 | .name = "FPGA", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | .ack = mainstone_mask_irq, |
| 71 | .mask = mainstone_mask_irq, |
| 72 | .unmask = mainstone_unmask_irq, |
| 73 | }; |
| 74 | |
Russell King | 10dd5ce | 2006-11-23 11:41:32 +0000 | [diff] [blame] | 75 | static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | { |
| 77 | unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; |
| 78 | do { |
| 79 | GEDR(0) = GPIO_bit(0); /* clear useless edge notification */ |
| 80 | if (likely(pending)) { |
| 81 | irq = MAINSTONE_IRQ(0) + __ffs(pending); |
| 82 | desc = irq_desc + irq; |
Linus Torvalds | 0cd61b6 | 2006-10-06 10:53:39 -0700 | [diff] [blame] | 83 | desc_handle_irq(irq, desc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 84 | } |
| 85 | pending = MST_INTSETCLR & mainstone_irq_enabled; |
| 86 | } while (pending); |
| 87 | } |
| 88 | |
| 89 | static void __init mainstone_init_irq(void) |
| 90 | { |
| 91 | int irq; |
| 92 | |
Eric Miao | cd49104 | 2007-06-22 04:14:09 +0100 | [diff] [blame] | 93 | pxa27x_init_irq(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | |
| 95 | /* setup extra Mainstone irqs */ |
| 96 | for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) { |
| 97 | set_irq_chip(irq, &mainstone_irq_chip); |
Russell King | 10dd5ce | 2006-11-23 11:41:32 +0000 | [diff] [blame] | 98 | set_irq_handler(irq, handle_level_irq); |
Thomas Gleixner | ec64152 | 2006-05-17 20:14:29 +0100 | [diff] [blame] | 99 | if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14)) |
| 100 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN); |
| 101 | else |
| 102 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 103 | } |
| 104 | set_irq_flags(MAINSTONE_IRQ(8), 0); |
| 105 | set_irq_flags(MAINSTONE_IRQ(12), 0); |
| 106 | |
| 107 | MST_INTMSKENA = 0; |
| 108 | MST_INTSETCLR = 0; |
| 109 | |
| 110 | set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler); |
| 111 | set_irq_type(IRQ_GPIO(0), IRQT_FALLING); |
| 112 | } |
| 113 | |
Nicolas Pitre | 22f11c4 | 2005-06-16 21:23:56 +0100 | [diff] [blame] | 114 | #ifdef CONFIG_PM |
| 115 | |
| 116 | static int mainstone_irq_resume(struct sys_device *dev) |
| 117 | { |
| 118 | MST_INTMSKENA = mainstone_irq_enabled; |
| 119 | return 0; |
| 120 | } |
| 121 | |
| 122 | static struct sysdev_class mainstone_irq_sysclass = { |
| 123 | set_kset_name("cpld_irq"), |
| 124 | .resume = mainstone_irq_resume, |
| 125 | }; |
| 126 | |
| 127 | static struct sys_device mainstone_irq_device = { |
| 128 | .cls = &mainstone_irq_sysclass, |
| 129 | }; |
| 130 | |
| 131 | static int __init mainstone_irq_device_init(void) |
| 132 | { |
| 133 | int ret = sysdev_class_register(&mainstone_irq_sysclass); |
| 134 | if (ret == 0) |
| 135 | ret = sysdev_register(&mainstone_irq_device); |
| 136 | return ret; |
| 137 | } |
| 138 | |
| 139 | device_initcall(mainstone_irq_device_init); |
| 140 | |
| 141 | #endif |
| 142 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 143 | |
| 144 | static struct resource smc91x_resources[] = { |
| 145 | [0] = { |
| 146 | .start = (MST_ETH_PHYS + 0x300), |
| 147 | .end = (MST_ETH_PHYS + 0xfffff), |
| 148 | .flags = IORESOURCE_MEM, |
| 149 | }, |
| 150 | [1] = { |
| 151 | .start = MAINSTONE_IRQ(3), |
| 152 | .end = MAINSTONE_IRQ(3), |
| 153 | .flags = IORESOURCE_IRQ, |
| 154 | } |
| 155 | }; |
| 156 | |
| 157 | static struct platform_device smc91x_device = { |
| 158 | .name = "smc91x", |
| 159 | .id = 0, |
| 160 | .num_resources = ARRAY_SIZE(smc91x_resources), |
| 161 | .resource = smc91x_resources, |
| 162 | }; |
| 163 | |
Takashi Iwai | f7cbb7f | 2006-01-13 18:48:06 +0100 | [diff] [blame] | 164 | static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 165 | { |
| 166 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
| 167 | MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF; |
| 168 | return 0; |
| 169 | } |
| 170 | |
Takashi Iwai | f7cbb7f | 2006-01-13 18:48:06 +0100 | [diff] [blame] | 171 | static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 172 | { |
| 173 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
| 174 | MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; |
| 175 | } |
| 176 | |
| 177 | static long mst_audio_suspend_mask; |
| 178 | |
| 179 | static void mst_audio_suspend(void *priv) |
| 180 | { |
| 181 | mst_audio_suspend_mask = MST_MSCWR2; |
| 182 | MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; |
| 183 | } |
| 184 | |
| 185 | static void mst_audio_resume(void *priv) |
| 186 | { |
| 187 | MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF; |
| 188 | } |
| 189 | |
| 190 | static pxa2xx_audio_ops_t mst_audio_ops = { |
| 191 | .startup = mst_audio_startup, |
| 192 | .shutdown = mst_audio_shutdown, |
| 193 | .suspend = mst_audio_suspend, |
| 194 | .resume = mst_audio_resume, |
| 195 | }; |
| 196 | |
| 197 | static struct platform_device mst_audio_device = { |
| 198 | .name = "pxa2xx-ac97", |
| 199 | .id = -1, |
| 200 | .dev = { .platform_data = &mst_audio_ops }, |
| 201 | }; |
| 202 | |
Todd Poynor | 74ec71e | 2005-11-04 17:15:45 +0000 | [diff] [blame] | 203 | static struct resource flash_resources[] = { |
| 204 | [0] = { |
| 205 | .start = PXA_CS0_PHYS, |
| 206 | .end = PXA_CS0_PHYS + SZ_64M - 1, |
| 207 | .flags = IORESOURCE_MEM, |
| 208 | }, |
| 209 | [1] = { |
| 210 | .start = PXA_CS1_PHYS, |
| 211 | .end = PXA_CS1_PHYS + SZ_64M - 1, |
| 212 | .flags = IORESOURCE_MEM, |
| 213 | }, |
| 214 | }; |
| 215 | |
| 216 | static struct mtd_partition mainstoneflash0_partitions[] = { |
| 217 | { |
| 218 | .name = "Bootloader", |
| 219 | .size = 0x00040000, |
| 220 | .offset = 0, |
| 221 | .mask_flags = MTD_WRITEABLE /* force read-only */ |
| 222 | },{ |
| 223 | .name = "Kernel", |
| 224 | .size = 0x00400000, |
| 225 | .offset = 0x00040000, |
| 226 | },{ |
| 227 | .name = "Filesystem", |
| 228 | .size = MTDPART_SIZ_FULL, |
| 229 | .offset = 0x00440000 |
| 230 | } |
| 231 | }; |
| 232 | |
| 233 | static struct flash_platform_data mst_flash_data[2] = { |
| 234 | { |
| 235 | .map_name = "cfi_probe", |
| 236 | .parts = mainstoneflash0_partitions, |
| 237 | .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions), |
| 238 | }, { |
| 239 | .map_name = "cfi_probe", |
| 240 | .parts = NULL, |
| 241 | .nr_parts = 0, |
| 242 | } |
| 243 | }; |
| 244 | |
| 245 | static struct platform_device mst_flash_device[2] = { |
| 246 | { |
| 247 | .name = "pxa2xx-flash", |
| 248 | .id = 0, |
| 249 | .dev = { |
| 250 | .platform_data = &mst_flash_data[0], |
| 251 | }, |
| 252 | .resource = &flash_resources[0], |
| 253 | .num_resources = 1, |
| 254 | }, |
| 255 | { |
| 256 | .name = "pxa2xx-flash", |
| 257 | .id = 1, |
| 258 | .dev = { |
| 259 | .platform_data = &mst_flash_data[1], |
| 260 | }, |
| 261 | .resource = &flash_resources[1], |
| 262 | .num_resources = 1, |
| 263 | }, |
| 264 | }; |
| 265 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 266 | static void mainstone_backlight_power(int on) |
| 267 | { |
| 268 | if (on) { |
| 269 | pxa_gpio_mode(GPIO16_PWM0_MD); |
Eric Miao | 7053acb | 2007-04-05 04:07:20 +0100 | [diff] [blame] | 270 | pxa_set_cken(CKEN_PWM0, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 271 | PWM_CTRL0 = 0; |
| 272 | PWM_PWDUTY0 = 0x3ff; |
| 273 | PWM_PERVAL0 = 0x3ff; |
| 274 | } else { |
| 275 | PWM_CTRL0 = 0; |
| 276 | PWM_PWDUTY0 = 0x0; |
| 277 | PWM_PERVAL0 = 0x3FF; |
Eric Miao | 7053acb | 2007-04-05 04:07:20 +0100 | [diff] [blame] | 278 | pxa_set_cken(CKEN_PWM0, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 279 | } |
| 280 | } |
| 281 | |
Richard Purdie | d14b272 | 2006-09-20 22:54:21 +0100 | [diff] [blame] | 282 | static struct pxafb_mode_info toshiba_ltm04c380k_mode = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 283 | .pixclock = 50000, |
| 284 | .xres = 640, |
| 285 | .yres = 480, |
| 286 | .bpp = 16, |
| 287 | .hsync_len = 1, |
| 288 | .left_margin = 0x9f, |
| 289 | .right_margin = 1, |
| 290 | .vsync_len = 44, |
| 291 | .upper_margin = 0, |
| 292 | .lower_margin = 0, |
| 293 | .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 294 | }; |
| 295 | |
Richard Purdie | d14b272 | 2006-09-20 22:54:21 +0100 | [diff] [blame] | 296 | static struct pxafb_mode_info toshiba_ltm035a776c_mode = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 297 | .pixclock = 110000, |
| 298 | .xres = 240, |
| 299 | .yres = 320, |
| 300 | .bpp = 16, |
| 301 | .hsync_len = 4, |
| 302 | .left_margin = 8, |
| 303 | .right_margin = 20, |
| 304 | .vsync_len = 3, |
| 305 | .upper_margin = 1, |
| 306 | .lower_margin = 10, |
| 307 | .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, |
Richard Purdie | d14b272 | 2006-09-20 22:54:21 +0100 | [diff] [blame] | 308 | }; |
| 309 | |
| 310 | static struct pxafb_mach_info mainstone_pxafb_info = { |
| 311 | .num_modes = 1, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 312 | .lccr0 = LCCR0_Act, |
| 313 | .lccr3 = LCCR3_PCP, |
| 314 | .pxafb_backlight_power = mainstone_backlight_power, |
| 315 | }; |
| 316 | |
David Howells | 40220c1 | 2006-10-09 12:19:47 +0100 | [diff] [blame] | 317 | static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 318 | { |
| 319 | int err; |
| 320 | |
| 321 | /* |
| 322 | * setup GPIO for PXA27x MMC controller |
| 323 | */ |
| 324 | pxa_gpio_mode(GPIO32_MMCCLK_MD); |
| 325 | pxa_gpio_mode(GPIO112_MMCCMD_MD); |
| 326 | pxa_gpio_mode(GPIO92_MMCDAT0_MD); |
| 327 | pxa_gpio_mode(GPIO109_MMCDAT1_MD); |
| 328 | pxa_gpio_mode(GPIO110_MMCDAT2_MD); |
| 329 | pxa_gpio_mode(GPIO111_MMCDAT3_MD); |
| 330 | |
| 331 | /* make sure SD/Memory Stick multiplexer's signals |
| 332 | * are routed to MMC controller |
| 333 | */ |
| 334 | MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; |
| 335 | |
Thomas Gleixner | 52e405e | 2006-07-03 02:20:05 +0200 | [diff] [blame] | 336 | err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 337 | "MMC card detect", data); |
| 338 | if (err) { |
| 339 | printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); |
| 340 | return -1; |
| 341 | } |
| 342 | |
| 343 | return 0; |
| 344 | } |
| 345 | |
| 346 | static void mainstone_mci_setpower(struct device *dev, unsigned int vdd) |
| 347 | { |
| 348 | struct pxamci_platform_data* p_d = dev->platform_data; |
| 349 | |
| 350 | if (( 1 << vdd) & p_d->ocr_mask) { |
| 351 | printk(KERN_DEBUG "%s: on\n", __FUNCTION__); |
| 352 | MST_MSCWR1 |= MST_MSCWR1_MMC_ON; |
| 353 | MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; |
| 354 | } else { |
| 355 | printk(KERN_DEBUG "%s: off\n", __FUNCTION__); |
| 356 | MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON; |
| 357 | } |
| 358 | } |
| 359 | |
| 360 | static void mainstone_mci_exit(struct device *dev, void *data) |
| 361 | { |
| 362 | free_irq(MAINSTONE_MMC_IRQ, data); |
| 363 | } |
| 364 | |
| 365 | static struct pxamci_platform_data mainstone_mci_platform_data = { |
| 366 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
| 367 | .init = mainstone_mci_init, |
| 368 | .setpower = mainstone_mci_setpower, |
| 369 | .exit = mainstone_mci_exit, |
| 370 | }; |
| 371 | |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 372 | static void mainstone_irda_transceiver_mode(struct device *dev, int mode) |
| 373 | { |
| 374 | unsigned long flags; |
| 375 | |
| 376 | local_irq_save(flags); |
| 377 | if (mode & IR_SIRMODE) { |
| 378 | MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR; |
| 379 | } else if (mode & IR_FIRMODE) { |
| 380 | MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR; |
| 381 | } |
| 382 | if (mode & IR_OFF) { |
| 383 | MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF; |
| 384 | } else { |
| 385 | MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL; |
| 386 | } |
| 387 | local_irq_restore(flags); |
| 388 | } |
| 389 | |
| 390 | static struct pxaficp_platform_data mainstone_ficp_platform_data = { |
| 391 | .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, |
| 392 | .transceiver_mode = mainstone_irda_transceiver_mode, |
| 393 | }; |
| 394 | |
Todd Poynor | 74ec71e | 2005-11-04 17:15:45 +0000 | [diff] [blame] | 395 | static struct platform_device *platform_devices[] __initdata = { |
| 396 | &smc91x_device, |
| 397 | &mst_audio_device, |
| 398 | &mst_flash_device[0], |
| 399 | &mst_flash_device[1], |
| 400 | }; |
| 401 | |
Richard Purdie | 81f280e | 2005-11-12 14:22:11 +0000 | [diff] [blame] | 402 | static int mainstone_ohci_init(struct device *dev) |
| 403 | { |
| 404 | /* setup Port1 GPIO pin. */ |
| 405 | pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */ |
| 406 | pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */ |
| 407 | |
| 408 | /* Set the Power Control Polarity Low and Power Sense |
| 409 | Polarity Low to active low. */ |
| 410 | UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) & |
| 411 | ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE); |
| 412 | |
| 413 | return 0; |
| 414 | } |
| 415 | |
| 416 | static struct pxaohci_platform_data mainstone_ohci_platform_data = { |
| 417 | .port_mode = PMM_PERPORT_MODE, |
| 418 | .init = mainstone_ohci_init, |
| 419 | }; |
| 420 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 421 | static void __init mainstone_init(void) |
| 422 | { |
Todd Poynor | 74ec71e | 2005-11-04 17:15:45 +0000 | [diff] [blame] | 423 | int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */ |
| 424 | |
| 425 | mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; |
| 426 | mst_flash_data[1].width = 4; |
| 427 | |
| 428 | /* Compensate for SW7 which swaps the flash banks */ |
| 429 | mst_flash_data[SW7].name = "processor-flash"; |
| 430 | mst_flash_data[SW7 ^ 1].name = "mainboard-flash"; |
| 431 | |
| 432 | printk(KERN_NOTICE "Mainstone configured to boot from %s\n", |
| 433 | mst_flash_data[0].name); |
| 434 | |
Jared Hulbert | 5b2e98c | 2006-01-05 21:12:26 +0000 | [diff] [blame] | 435 | /* system bus arbiter setting |
| 436 | * - Core_Park |
| 437 | * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4 |
| 438 | */ |
| 439 | ARB_CNTRL = ARB_CORE_PARK | 0x234; |
| 440 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 441 | /* |
| 442 | * On Mainstone, we route AC97_SYSCLK via GPIO45 to |
| 443 | * the audio daughter card |
| 444 | */ |
| 445 | pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD); |
| 446 | |
Todd Poynor | 74ec71e | 2005-11-04 17:15:45 +0000 | [diff] [blame] | 447 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 448 | |
| 449 | /* reading Mainstone's "Virtual Configuration Register" |
| 450 | might be handy to select LCD type here */ |
| 451 | if (0) |
Richard Purdie | d14b272 | 2006-09-20 22:54:21 +0100 | [diff] [blame] | 452 | mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 453 | else |
Richard Purdie | d14b272 | 2006-09-20 22:54:21 +0100 | [diff] [blame] | 454 | mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode; |
| 455 | |
| 456 | set_pxa_fb_info(&mainstone_pxafb_info); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 457 | |
| 458 | pxa_set_mci_info(&mainstone_mci_platform_data); |
Nicolas Pitre | 6f475c0 | 2005-10-28 16:39:33 +0100 | [diff] [blame] | 459 | pxa_set_ficp_info(&mainstone_ficp_platform_data); |
Richard Purdie | 81f280e | 2005-11-12 14:22:11 +0000 | [diff] [blame] | 460 | pxa_set_ohci_info(&mainstone_ohci_platform_data); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 461 | } |
| 462 | |
| 463 | |
| 464 | static struct map_desc mainstone_io_desc[] __initdata = { |
Deepak Saxena | 6f9182e | 2005-10-28 15:19:01 +0100 | [diff] [blame] | 465 | { /* CPLD */ |
| 466 | .virtual = MST_FPGA_VIRT, |
| 467 | .pfn = __phys_to_pfn(MST_FPGA_PHYS), |
| 468 | .length = 0x00100000, |
| 469 | .type = MT_DEVICE |
| 470 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 471 | }; |
| 472 | |
| 473 | static void __init mainstone_map_io(void) |
| 474 | { |
| 475 | pxa_map_io(); |
| 476 | iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc)); |
| 477 | |
| 478 | /* initialize sleep mode regs (wake-up sources, etc) */ |
| 479 | PGSR0 = 0x00008800; |
| 480 | PGSR1 = 0x00000002; |
| 481 | PGSR2 = 0x0001FC00; |
| 482 | PGSR3 = 0x00001F81; |
| 483 | PWER = 0xC0000002; |
| 484 | PRER = 0x00000002; |
| 485 | PFER = 0x00000002; |
Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 486 | /* for use I SRAM as framebuffer. */ |
| 487 | PSLR |= 0xF04; |
| 488 | PCFR = 0x66; |
| 489 | /* For Keypad wakeup. */ |
| 490 | KPC &=~KPC_ASACT; |
| 491 | KPC |=KPC_AS; |
| 492 | PKWR = 0x000FD000; |
| 493 | /* Need read PKWR back after set it. */ |
| 494 | PKWR; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 495 | } |
| 496 | |
| 497 | MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") |
Russell King | e9dea0c | 2005-07-03 17:38:58 +0100 | [diff] [blame] | 498 | /* Maintainer: MontaVista Software Inc. */ |
Russell King | e9dea0c | 2005-07-03 17:38:58 +0100 | [diff] [blame] | 499 | .phys_io = 0x40000000, |
Steve Yang | a7d14f8 | 2006-06-05 19:47:17 +0100 | [diff] [blame] | 500 | .boot_params = 0xa0000100, /* BLOB boot parameter setting */ |
Russell King | 68070bd | 2005-07-04 10:44:34 +0100 | [diff] [blame] | 501 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, |
Russell King | e9dea0c | 2005-07-03 17:38:58 +0100 | [diff] [blame] | 502 | .map_io = mainstone_map_io, |
| 503 | .init_irq = mainstone_init_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 504 | .timer = &pxa_timer, |
Russell King | e9dea0c | 2005-07-03 17:38:58 +0100 | [diff] [blame] | 505 | .init_machine = mainstone_init, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 506 | MACHINE_END |