blob: e3bc8d3f7302fa7bd9326ea34d39d60b6a2c1dfe [file] [log] [blame]
dea31012005-04-17 16:05:31 -05001/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -04003 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2005 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
dea31012005-04-17 16:05:31 -05006 * www.emulex.com *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -04007 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea31012005-04-17 16:05:31 -05008 * *
9 * This program is free software; you can redistribute it and/or *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -040010 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea31012005-04-17 16:05:31 -050020 *******************************************************************/
21
dea31012005-04-17 16:05:31 -050022#include <linux/blkdev.h>
23#include <linux/pci.h>
24#include <linux/interrupt.h>
25
James.Smart@Emulex.Comf888ba32005-08-10 15:03:01 -040026#include <scsi/scsi_device.h>
27#include <scsi/scsi_transport_fc.h>
28
James.Smart@Emulex.Com91886522005-08-10 15:03:09 -040029#include <scsi/scsi.h>
30
dea31012005-04-17 16:05:31 -050031#include "lpfc_hw.h"
32#include "lpfc_sli.h"
33#include "lpfc_disc.h"
34#include "lpfc_scsi.h"
35#include "lpfc.h"
36#include "lpfc_logmsg.h"
37#include "lpfc_crtn.h"
38#include "lpfc_compat.h"
39
40/**********************************************/
41
42/* mailbox command */
43/**********************************************/
44void
45lpfc_dump_mem(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint16_t offset)
46{
47 MAILBOX_t *mb;
48 void *ctx;
49
50 mb = &pmb->mb;
51 ctx = pmb->context2;
52
53 /* Setup to dump VPD region */
54 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
55 mb->mbxCommand = MBX_DUMP_MEMORY;
56 mb->un.varDmp.cv = 1;
57 mb->un.varDmp.type = DMP_NV_PARAMS;
58 mb->un.varDmp.entry_index = offset;
59 mb->un.varDmp.region_id = DMP_REGION_VPD;
60 mb->un.varDmp.word_cnt = (DMP_RSP_SIZE / sizeof (uint32_t));
61 mb->un.varDmp.co = 0;
62 mb->un.varDmp.resp_offset = 0;
63 pmb->context2 = ctx;
64 mb->mbxOwner = OWN_HOST;
65 return;
66}
67
68/**********************************************/
69/* lpfc_read_nv Issue a READ NVPARAM */
70/* mailbox command */
71/**********************************************/
72void
73lpfc_read_nv(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
74{
75 MAILBOX_t *mb;
76
77 mb = &pmb->mb;
78 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
79 mb->mbxCommand = MBX_READ_NV;
80 mb->mbxOwner = OWN_HOST;
81 return;
82}
83
84/**********************************************/
85/* lpfc_read_la Issue a READ LA */
86/* mailbox command */
87/**********************************************/
88int
89lpfc_read_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, struct lpfc_dmabuf *mp)
90{
91 MAILBOX_t *mb;
92 struct lpfc_sli *psli;
93
94 psli = &phba->sli;
95 mb = &pmb->mb;
96 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
97
98 INIT_LIST_HEAD(&mp->list);
99 mb->mbxCommand = MBX_READ_LA64;
100 mb->un.varReadLA.un.lilpBde64.tus.f.bdeSize = 128;
101 mb->un.varReadLA.un.lilpBde64.addrHigh = putPaddrHigh(mp->phys);
102 mb->un.varReadLA.un.lilpBde64.addrLow = putPaddrLow(mp->phys);
103
104 /* Save address for later completion and set the owner to host so that
105 * the FW knows this mailbox is available for processing.
106 */
107 pmb->context1 = (uint8_t *) mp;
108 mb->mbxOwner = OWN_HOST;
109 return (0);
110}
111
112/**********************************************/
113/* lpfc_clear_la Issue a CLEAR LA */
114/* mailbox command */
115/**********************************************/
116void
117lpfc_clear_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
118{
119 MAILBOX_t *mb;
120
121 mb = &pmb->mb;
122 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
123
124 mb->un.varClearLA.eventTag = phba->fc_eventTag;
125 mb->mbxCommand = MBX_CLEAR_LA;
126 mb->mbxOwner = OWN_HOST;
127 return;
128}
129
130/**************************************************/
131/* lpfc_config_link Issue a CONFIG LINK */
132/* mailbox command */
133/**************************************************/
134void
135lpfc_config_link(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
136{
137 MAILBOX_t *mb = &pmb->mb;
138 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
139
140 /* NEW_FEATURE
141 * SLI-2, Coalescing Response Feature.
142 */
143 if (phba->cfg_cr_delay) {
144 mb->un.varCfgLnk.cr = 1;
145 mb->un.varCfgLnk.ci = 1;
146 mb->un.varCfgLnk.cr_delay = phba->cfg_cr_delay;
147 mb->un.varCfgLnk.cr_count = phba->cfg_cr_count;
148 }
149
150 mb->un.varCfgLnk.myId = phba->fc_myDID;
151 mb->un.varCfgLnk.edtov = phba->fc_edtov;
152 mb->un.varCfgLnk.arbtov = phba->fc_arbtov;
153 mb->un.varCfgLnk.ratov = phba->fc_ratov;
154 mb->un.varCfgLnk.rttov = phba->fc_rttov;
155 mb->un.varCfgLnk.altov = phba->fc_altov;
156 mb->un.varCfgLnk.crtov = phba->fc_crtov;
157 mb->un.varCfgLnk.citov = phba->fc_citov;
158
159 if (phba->cfg_ack0)
160 mb->un.varCfgLnk.ack0_enable = 1;
161
162 mb->mbxCommand = MBX_CONFIG_LINK;
163 mb->mbxOwner = OWN_HOST;
164 return;
165}
166
167/**********************************************/
168/* lpfc_init_link Issue an INIT LINK */
169/* mailbox command */
170/**********************************************/
171void
172lpfc_init_link(struct lpfc_hba * phba,
173 LPFC_MBOXQ_t * pmb, uint32_t topology, uint32_t linkspeed)
174{
175 lpfc_vpd_t *vpd;
176 struct lpfc_sli *psli;
177 MAILBOX_t *mb;
178
179 mb = &pmb->mb;
180 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
181
182 psli = &phba->sli;
183 switch (topology) {
184 case FLAGS_TOPOLOGY_MODE_LOOP_PT:
185 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
186 mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
187 break;
188 case FLAGS_TOPOLOGY_MODE_PT_PT:
189 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
190 break;
191 case FLAGS_TOPOLOGY_MODE_LOOP:
192 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
193 break;
194 case FLAGS_TOPOLOGY_MODE_PT_LOOP:
195 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
196 mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
197 break;
198 }
199
200 /* NEW_FEATURE
201 * Setting up the link speed
202 */
203 vpd = &phba->vpd;
204 if (vpd->rev.feaLevelHigh >= 0x02){
205 switch(linkspeed){
206 case LINK_SPEED_1G:
207 case LINK_SPEED_2G:
208 case LINK_SPEED_4G:
209 mb->un.varInitLnk.link_flags |=
210 FLAGS_LINK_SPEED;
211 mb->un.varInitLnk.link_speed = linkspeed;
212 break;
213 case LINK_SPEED_AUTO:
214 default:
215 mb->un.varInitLnk.link_speed =
216 LINK_SPEED_AUTO;
217 break;
218 }
219
220 }
221 else
222 mb->un.varInitLnk.link_speed = LINK_SPEED_AUTO;
223
224 mb->mbxCommand = (volatile uint8_t)MBX_INIT_LINK;
225 mb->mbxOwner = OWN_HOST;
226 mb->un.varInitLnk.fabric_AL_PA = phba->fc_pref_ALPA;
227 return;
228}
229
230/**********************************************/
231/* lpfc_read_sparam Issue a READ SPARAM */
232/* mailbox command */
233/**********************************************/
234int
235lpfc_read_sparam(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
236{
237 struct lpfc_dmabuf *mp;
238 MAILBOX_t *mb;
239 struct lpfc_sli *psli;
240
241 psli = &phba->sli;
242 mb = &pmb->mb;
243 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
244
245 mb->mbxOwner = OWN_HOST;
246
247 /* Get a buffer to hold the HBAs Service Parameters */
248
249 if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == 0) ||
250 ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
Jesper Juhlc9475cb2005-11-07 01:01:26 -0800251 kfree(mp);
dea31012005-04-17 16:05:31 -0500252 mb->mbxCommand = MBX_READ_SPARM64;
253 /* READ_SPARAM: no buffers */
254 lpfc_printf_log(phba,
255 KERN_WARNING,
256 LOG_MBOX,
257 "%d:0301 READ_SPARAM: no buffers\n",
258 phba->brd_no);
259 return (1);
260 }
261 INIT_LIST_HEAD(&mp->list);
262 mb->mbxCommand = MBX_READ_SPARM64;
263 mb->un.varRdSparm.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
264 mb->un.varRdSparm.un.sp64.addrHigh = putPaddrHigh(mp->phys);
265 mb->un.varRdSparm.un.sp64.addrLow = putPaddrLow(mp->phys);
266
267 /* save address for completion */
268 pmb->context1 = mp;
269
270 return (0);
271}
272
273/********************************************/
274/* lpfc_unreg_did Issue a UNREG_DID */
275/* mailbox command */
276/********************************************/
277void
278lpfc_unreg_did(struct lpfc_hba * phba, uint32_t did, LPFC_MBOXQ_t * pmb)
279{
280 MAILBOX_t *mb;
281
282 mb = &pmb->mb;
283 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
284
285 mb->un.varUnregDID.did = did;
286
287 mb->mbxCommand = MBX_UNREG_D_ID;
288 mb->mbxOwner = OWN_HOST;
289 return;
290}
291
292/***********************************************/
293
294/* command to write slim */
295/***********************************************/
296void
297lpfc_set_slim(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint32_t addr,
298 uint32_t value)
299{
300 MAILBOX_t *mb;
301
302 mb = &pmb->mb;
303 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
304
305 /* addr = 0x090597 is AUTO ABTS disable for ELS commands */
306 /* addr = 0x052198 is DELAYED ABTS enable for ELS commands */
307
308 /*
309 * Always turn on DELAYED ABTS for ELS timeouts
310 */
311 if ((addr == 0x052198) && (value == 0))
312 value = 1;
313
314 mb->un.varWords[0] = addr;
315 mb->un.varWords[1] = value;
316
317 mb->mbxCommand = MBX_SET_SLIM;
318 mb->mbxOwner = OWN_HOST;
319 return;
320}
321
322/**********************************************/
323/* lpfc_read_nv Issue a READ CONFIG */
324/* mailbox command */
325/**********************************************/
326void
327lpfc_read_config(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
328{
329 MAILBOX_t *mb;
330
331 mb = &pmb->mb;
332 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
333
334 mb->mbxCommand = MBX_READ_CONFIG;
335 mb->mbxOwner = OWN_HOST;
336 return;
337}
338
339/********************************************/
340/* lpfc_reg_login Issue a REG_LOGIN */
341/* mailbox command */
342/********************************************/
343int
344lpfc_reg_login(struct lpfc_hba * phba,
345 uint32_t did, uint8_t * param, LPFC_MBOXQ_t * pmb, uint32_t flag)
346{
347 uint8_t *sparam;
348 struct lpfc_dmabuf *mp;
349 MAILBOX_t *mb;
350 struct lpfc_sli *psli;
351
352 psli = &phba->sli;
353 mb = &pmb->mb;
354 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
355
356 mb->un.varRegLogin.rpi = 0;
357 mb->un.varRegLogin.did = did;
358 mb->un.varWords[30] = flag; /* Set flag to issue action on cmpl */
359
360 mb->mbxOwner = OWN_HOST;
361
362 /* Get a buffer to hold NPorts Service Parameters */
363 if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == NULL) ||
364 ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
Jesper Juhlc9475cb2005-11-07 01:01:26 -0800365 kfree(mp);
dea31012005-04-17 16:05:31 -0500366 mb->mbxCommand = MBX_REG_LOGIN64;
367 /* REG_LOGIN: no buffers */
368 lpfc_printf_log(phba,
369 KERN_WARNING,
370 LOG_MBOX,
371 "%d:0302 REG_LOGIN: no buffers Data x%x x%x\n",
372 phba->brd_no,
373 (uint32_t) did, (uint32_t) flag);
374 return (1);
375 }
376 INIT_LIST_HEAD(&mp->list);
377 sparam = mp->virt;
378
379 /* Copy param's into a new buffer */
380 memcpy(sparam, param, sizeof (struct serv_parm));
381
382 /* save address for completion */
383 pmb->context1 = (uint8_t *) mp;
384
385 mb->mbxCommand = MBX_REG_LOGIN64;
386 mb->un.varRegLogin.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
387 mb->un.varRegLogin.un.sp64.addrHigh = putPaddrHigh(mp->phys);
388 mb->un.varRegLogin.un.sp64.addrLow = putPaddrLow(mp->phys);
389
390 return (0);
391}
392
393/**********************************************/
394/* lpfc_unreg_login Issue a UNREG_LOGIN */
395/* mailbox command */
396/**********************************************/
397void
398lpfc_unreg_login(struct lpfc_hba * phba, uint32_t rpi, LPFC_MBOXQ_t * pmb)
399{
400 MAILBOX_t *mb;
401
402 mb = &pmb->mb;
403 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
404
405 mb->un.varUnregLogin.rpi = (uint16_t) rpi;
406 mb->un.varUnregLogin.rsvd1 = 0;
407
408 mb->mbxCommand = MBX_UNREG_LOGIN;
409 mb->mbxOwner = OWN_HOST;
410 return;
411}
412
413static void
414lpfc_config_pcb_setup(struct lpfc_hba * phba)
415{
416 struct lpfc_sli *psli = &phba->sli;
417 struct lpfc_sli_ring *pring;
418 PCB_t *pcbp = &phba->slim2p->pcb;
419 dma_addr_t pdma_addr;
420 uint32_t offset;
421 uint32_t iocbCnt;
422 int i;
423
dea31012005-04-17 16:05:31 -0500424 pcbp->maxRing = (psli->num_rings - 1);
425
426 iocbCnt = 0;
427 for (i = 0; i < psli->num_rings; i++) {
428 pring = &psli->ring[i];
429 /* A ring MUST have both cmd and rsp entries defined to be
430 valid */
431 if ((pring->numCiocb == 0) || (pring->numRiocb == 0)) {
432 pcbp->rdsc[i].cmdEntries = 0;
433 pcbp->rdsc[i].rspEntries = 0;
434 pcbp->rdsc[i].cmdAddrHigh = 0;
435 pcbp->rdsc[i].rspAddrHigh = 0;
436 pcbp->rdsc[i].cmdAddrLow = 0;
437 pcbp->rdsc[i].rspAddrLow = 0;
438 pring->cmdringaddr = NULL;
439 pring->rspringaddr = NULL;
440 continue;
441 }
442 /* Command ring setup for ring */
443 pring->cmdringaddr =
444 (void *)&phba->slim2p->IOCBs[iocbCnt];
445 pcbp->rdsc[i].cmdEntries = pring->numCiocb;
446
447 offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
448 (uint8_t *)phba->slim2p;
449 pdma_addr = phba->slim2p_mapping + offset;
450 pcbp->rdsc[i].cmdAddrHigh = putPaddrHigh(pdma_addr);
451 pcbp->rdsc[i].cmdAddrLow = putPaddrLow(pdma_addr);
452 iocbCnt += pring->numCiocb;
453
454 /* Response ring setup for ring */
455 pring->rspringaddr =
456 (void *)&phba->slim2p->IOCBs[iocbCnt];
457
458 pcbp->rdsc[i].rspEntries = pring->numRiocb;
459 offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
460 (uint8_t *)phba->slim2p;
461 pdma_addr = phba->slim2p_mapping + offset;
462 pcbp->rdsc[i].rspAddrHigh = putPaddrHigh(pdma_addr);
463 pcbp->rdsc[i].rspAddrLow = putPaddrLow(pdma_addr);
464 iocbCnt += pring->numRiocb;
465 }
466}
467
468void
469lpfc_read_rev(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
470{
471 MAILBOX_t *mb;
472
473 mb = &pmb->mb;
474 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
475 mb->un.varRdRev.cv = 1;
476 mb->mbxCommand = MBX_READ_REV;
477 mb->mbxOwner = OWN_HOST;
478 return;
479}
480
481void
482lpfc_config_ring(struct lpfc_hba * phba, int ring, LPFC_MBOXQ_t * pmb)
483{
484 int i;
485 MAILBOX_t *mb = &pmb->mb;
486 struct lpfc_sli *psli;
487 struct lpfc_sli_ring *pring;
488
489 memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
490
491 mb->un.varCfgRing.ring = ring;
492 mb->un.varCfgRing.maxOrigXchg = 0;
493 mb->un.varCfgRing.maxRespXchg = 0;
494 mb->un.varCfgRing.recvNotify = 1;
495
496 psli = &phba->sli;
497 pring = &psli->ring[ring];
498 mb->un.varCfgRing.numMask = pring->num_mask;
499 mb->mbxCommand = MBX_CONFIG_RING;
500 mb->mbxOwner = OWN_HOST;
501
502 /* Is this ring configured for a specific profile */
503 if (pring->prt[0].profile) {
504 mb->un.varCfgRing.profile = pring->prt[0].profile;
505 return;
506 }
507
508 /* Otherwise we setup specific rctl / type masks for this ring */
509 for (i = 0; i < pring->num_mask; i++) {
510 mb->un.varCfgRing.rrRegs[i].rval = pring->prt[i].rctl;
511 if (mb->un.varCfgRing.rrRegs[i].rval != FC_ELS_REQ)
512 mb->un.varCfgRing.rrRegs[i].rmask = 0xff;
513 else
514 mb->un.varCfgRing.rrRegs[i].rmask = 0xfe;
515 mb->un.varCfgRing.rrRegs[i].tval = pring->prt[i].type;
516 mb->un.varCfgRing.rrRegs[i].tmask = 0xff;
517 }
518
519 return;
520}
521
522void
523lpfc_config_port(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
524{
525 MAILBOX_t *mb = &pmb->mb;
526 dma_addr_t pdma_addr;
527 uint32_t bar_low, bar_high;
528 size_t offset;
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400529 struct lpfc_hgp hgp;
dea31012005-04-17 16:05:31 -0500530 void __iomem *to_slim;
James.Smart@Emulex.Comf91b3922005-10-28 20:29:28 -0400531 int i;
dea31012005-04-17 16:05:31 -0500532
533 memset(pmb, 0, sizeof(LPFC_MBOXQ_t));
534 mb->mbxCommand = MBX_CONFIG_PORT;
535 mb->mbxOwner = OWN_HOST;
536
537 mb->un.varCfgPort.pcbLen = sizeof(PCB_t);
538
539 offset = (uint8_t *)&phba->slim2p->pcb - (uint8_t *)phba->slim2p;
540 pdma_addr = phba->slim2p_mapping + offset;
541 mb->un.varCfgPort.pcbLow = putPaddrLow(pdma_addr);
542 mb->un.varCfgPort.pcbHigh = putPaddrHigh(pdma_addr);
543
544 /* Now setup pcb */
545 phba->slim2p->pcb.type = TYPE_NATIVE_SLI2;
546 phba->slim2p->pcb.feature = FEATURE_INITIAL_SLI2;
547
548 /* Setup Mailbox pointers */
549 phba->slim2p->pcb.mailBoxSize = sizeof(MAILBOX_t);
550 offset = (uint8_t *)&phba->slim2p->mbx - (uint8_t *)phba->slim2p;
551 pdma_addr = phba->slim2p_mapping + offset;
552 phba->slim2p->pcb.mbAddrHigh = putPaddrHigh(pdma_addr);
553 phba->slim2p->pcb.mbAddrLow = putPaddrLow(pdma_addr);
554
555 /*
556 * Setup Host Group ring pointer.
557 *
558 * For efficiency reasons, the ring get/put pointers can be
559 * placed in adapter memory (SLIM) rather than in host memory.
560 * This allows firmware to avoid PCI reads/writes when updating
561 * and checking pointers.
562 *
563 * The firmware recognizes the use of SLIM memory by comparing
564 * the address of the get/put pointers structure with that of
565 * the SLIM BAR (BAR0).
566 *
567 * Caution: be sure to use the PCI config space value of BAR0/BAR1
568 * (the hardware's view of the base address), not the OS's
569 * value of pci_resource_start() as the OS value may be a cookie
570 * for ioremap/iomap.
571 */
572
573
574 pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_0, &bar_low);
575 pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_1, &bar_high);
576
577
578 /* mask off BAR0's flag bits 0 - 3 */
579 phba->slim2p->pcb.hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) +
580 (SLIMOFF*sizeof(uint32_t));
581 if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64)
582 phba->slim2p->pcb.hgpAddrHigh = bar_high;
583 else
584 phba->slim2p->pcb.hgpAddrHigh = 0;
585 /* write HGP data to SLIM at the required longword offset */
James.Smart@Emulex.Com4cc2da12005-06-25 10:34:00 -0400586 memset(&hgp, 0, sizeof(struct lpfc_hgp));
dea31012005-04-17 16:05:31 -0500587 to_slim = phba->MBslimaddr + (SLIMOFF*sizeof (uint32_t));
James.Smart@Emulex.Comf91b3922005-10-28 20:29:28 -0400588
589 for (i=0; i < phba->sli.num_rings; i++) {
590 lpfc_memcpy_to_slim(to_slim, &hgp, sizeof(struct lpfc_hgp));
591 to_slim += sizeof (struct lpfc_hgp);
592 }
dea31012005-04-17 16:05:31 -0500593
594 /* Setup Port Group ring pointer */
595 offset = (uint8_t *)&phba->slim2p->mbx.us.s2.port -
596 (uint8_t *)phba->slim2p;
597 pdma_addr = phba->slim2p_mapping + offset;
598 phba->slim2p->pcb.pgpAddrHigh = putPaddrHigh(pdma_addr);
599 phba->slim2p->pcb.pgpAddrLow = putPaddrLow(pdma_addr);
600
601 /* Use callback routine to setp rings in the pcb */
602 lpfc_config_pcb_setup(phba);
603
604 /* special handling for LC HBAs */
605 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
606 uint32_t hbainit[5];
607
608 lpfc_hba_init(phba, hbainit);
609
610 memcpy(&mb->un.varCfgPort.hbainit, hbainit, 20);
611 }
612
613 /* Swap PCB if needed */
614 lpfc_sli_pcimem_bcopy(&phba->slim2p->pcb, &phba->slim2p->pcb,
615 sizeof (PCB_t));
616
617 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
618 "%d:0405 Service Level Interface (SLI) 2 selected\n",
619 phba->brd_no);
620}
621
622void
623lpfc_mbox_put(struct lpfc_hba * phba, LPFC_MBOXQ_t * mbq)
624{
625 struct lpfc_sli *psli;
626
627 psli = &phba->sli;
628
629 list_add_tail(&mbq->list, &psli->mboxq);
630
631 psli->mboxq_cnt++;
632
633 return;
634}
635
636LPFC_MBOXQ_t *
637lpfc_mbox_get(struct lpfc_hba * phba)
638{
639 LPFC_MBOXQ_t *mbq = NULL;
640 struct lpfc_sli *psli = &phba->sli;
641
642 list_remove_head((&psli->mboxq), mbq, LPFC_MBOXQ_t,
643 list);
644 if (mbq) {
645 psli->mboxq_cnt--;
646 }
647
648 return mbq;
649}