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Jean-Christophe PLAGNIOL-VILLARDee867d82012-10-18 14:10:21 +08001/*
2 * pm9g45.dts - Device Tree file for Ronetix pm9g45 board
3 *
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2.
7 */
8/dts-v1/;
Jean-Christophe PLAGNIOL-VILLARD6db64d22013-05-15 01:21:50 +08009#include "at91sam9g45.dtsi"
Jean-Christophe PLAGNIOL-VILLARDee867d82012-10-18 14:10:21 +080010
11/ {
12 model = "Ronetix pm9g45";
13 compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9";
14
15 chosen {
16 bootargs = "console=ttyS0,115200";
17 };
18
19 memory {
20 reg = <0x70000000 0x8000000>;
21 };
22
23 clocks {
24 #address-cells = <1>;
25 #size-cells = <1>;
26 ranges;
27
28 main_clock: clock@0 {
29 compatible = "atmel,osc", "fixed-clock";
30 clock-frequency = <12000000>;
31 };
32 };
33
34 ahb {
35 apb {
36 dbgu: serial@ffffee00 {
37 status = "okay";
38 };
39
40 pinctrl@fffff200 {
41
42 board {
43 pinctrl_board_nand: nand0-board {
44 atmel,pins =
Jean-Christophe PLAGNIOL-VILLARDc9d0f312013-04-24 08:34:25 +080045 <AT91_PIOD 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD3 gpio RDY pin pull_up*/
46 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
Jean-Christophe PLAGNIOL-VILLARDee867d82012-10-18 14:10:21 +080047 };
48 };
Jean-Christophe PLAGNIOL-VILLARDc12a8192012-11-20 00:46:24 +080049
50 mmc {
51 pinctrl_board_mmc: mmc0-board {
52 atmel,pins =
Jean-Christophe PLAGNIOL-VILLARDc9d0f312013-04-24 08:34:25 +080053 <AT91_PIOD 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD6 gpio CD pin pull_up and deglitch */
Jean-Christophe PLAGNIOL-VILLARDc12a8192012-11-20 00:46:24 +080054 };
55 };
56 };
57
58 mmc0: mmc@fff80000 {
59 pinctrl-0 = <
60 &pinctrl_board_mmc
61 &pinctrl_mmc0_slot0_clk_cmd_dat0
62 &pinctrl_mmc0_slot0_dat1_3>;
63 status = "okay";
64 slot@0 {
65 reg = <0>;
66 bus-width = <4>;
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +080067 cd-gpios = <&pioD 6 GPIO_ACTIVE_HIGH>;
Jean-Christophe PLAGNIOL-VILLARDc12a8192012-11-20 00:46:24 +080068 };
Jean-Christophe PLAGNIOL-VILLARDee867d82012-10-18 14:10:21 +080069 };
70
71 macb0: ethernet@fffbc000 {
72 phy-mode = "rmii";
73 status = "okay";
74 };
Jean-Christophe PLAGNIOL-VILLARDc12a8192012-11-20 00:46:24 +080075
Jean-Christophe PLAGNIOL-VILLARDee867d82012-10-18 14:10:21 +080076 };
77
78 nand0: nand@40000000 {
79 nand-bus-width = <8>;
80 nand-ecc-mode = "soft";
81 nand-on-flash-bbt;
82 pinctrl-0 = <&pinctrl_board_nand>;
83
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +080084 gpios = <&pioD 3 GPIO_ACTIVE_HIGH
85 &pioC 14 GPIO_ACTIVE_HIGH
Jean-Christophe PLAGNIOL-VILLARDee867d82012-10-18 14:10:21 +080086 0
87 >;
88
89 status = "okay";
90
91 at91bootstrap@0 {
92 label = "at91bootstrap";
93 reg = <0x0 0x20000>;
94 };
95
96 barebox@20000 {
97 label = "barebox";
98 reg = <0x20000 0x40000>;
99 };
100
101 bareboxenv@60000 {
102 label = "bareboxenv";
103 reg = <0x60000 0x1A0000>;
104 };
105
106 kernel@200000 {
107 label = "bareboxenv2";
108 reg = <0x200000 0x300000>;
109 };
110
111 kernel@500000 {
112 label = "root";
113 reg = <0x500000 0x400000>;
114 };
115
116 data@900000 {
117 label = "data";
118 reg = <0x900000 0x8340000>;
119 };
120 };
121
122 usb0: ohci@00700000 {
123 status = "okay";
124 num-ports = <2>;
125 };
126
127 usb1: ehci@00800000 {
128 status = "okay";
129 };
130 };
131
132 leds {
133 compatible = "gpio-leds";
134
135 led0 {
136 label = "led0";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800137 gpios = <&pioD 0 GPIO_ACTIVE_LOW>;
Jean-Christophe PLAGNIOL-VILLARDee867d82012-10-18 14:10:21 +0800138 linux,default-trigger = "nand-disk";
139 };
140
141 led1 {
142 label = "led1";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800143 gpios = <&pioD 31 GPIO_ACTIVE_HIGH>;
Jean-Christophe PLAGNIOL-VILLARDee867d82012-10-18 14:10:21 +0800144 linux,default-trigger = "heartbeat";
145 };
146 };
147
148 gpio_keys {
149 compatible = "gpio-keys";
150 #address-cells = <1>;
151 #size-cells = <0>;
152
153 right {
154 label = "SW4";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800155 gpios = <&pioE 7 GPIO_ACTIVE_LOW>;
Jean-Christophe PLAGNIOL-VILLARDee867d82012-10-18 14:10:21 +0800156 linux,code = <106>;
157 };
158
159 up {
160 label = "SW3";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800161 gpios = <&pioE 8 GPIO_ACTIVE_LOW>;
Jean-Christophe PLAGNIOL-VILLARDee867d82012-10-18 14:10:21 +0800162 linux,code = <103>;
163 };
164 };
165};