Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | |
| 2 | /* drivers/atm/firestream.c - FireStream 155 (MB86697) and |
| 3 | * FireStream 50 (MB86695) device driver |
| 4 | */ |
| 5 | |
| 6 | /* Written & (C) 2000 by R.E.Wolff@BitWizard.nl |
| 7 | * Copied snippets from zatm.c by Werner Almesberger, EPFL LRC/ICA |
| 8 | * and ambassador.c Copyright (C) 1995-1999 Madge Networks Ltd |
| 9 | */ |
| 10 | |
| 11 | /* |
| 12 | This program is free software; you can redistribute it and/or modify |
| 13 | it under the terms of the GNU General Public License as published by |
| 14 | the Free Software Foundation; either version 2 of the License, or |
| 15 | (at your option) any later version. |
| 16 | |
| 17 | This program is distributed in the hope that it will be useful, |
| 18 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | GNU General Public License for more details. |
| 21 | |
| 22 | You should have received a copy of the GNU General Public License |
| 23 | along with this program; if not, write to the Free Software |
| 24 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 25 | |
| 26 | The GNU GPL is contained in /usr/doc/copyright/GPL on a Debian |
| 27 | system and in the file COPYING in the Linux kernel source. |
| 28 | */ |
| 29 | |
| 30 | |
| 31 | #include <linux/module.h> |
| 32 | #include <linux/sched.h> |
| 33 | #include <linux/kernel.h> |
| 34 | #include <linux/mm.h> |
| 35 | #include <linux/pci.h> |
| 36 | #include <linux/errno.h> |
| 37 | #include <linux/atm.h> |
| 38 | #include <linux/atmdev.h> |
| 39 | #include <linux/sonet.h> |
| 40 | #include <linux/skbuff.h> |
| 41 | #include <linux/netdevice.h> |
| 42 | #include <linux/delay.h> |
| 43 | #include <linux/ioport.h> /* for request_region */ |
| 44 | #include <linux/uio.h> |
| 45 | #include <linux/init.h> |
| 46 | #include <linux/capability.h> |
| 47 | #include <linux/bitops.h> |
| 48 | #include <asm/byteorder.h> |
| 49 | #include <asm/system.h> |
| 50 | #include <asm/string.h> |
| 51 | #include <asm/io.h> |
| 52 | #include <asm/atomic.h> |
| 53 | #include <asm/uaccess.h> |
| 54 | #include <linux/wait.h> |
| 55 | |
| 56 | #include "firestream.h" |
| 57 | |
| 58 | static int loopback = 0; |
| 59 | static int num=0x5a; |
| 60 | |
| 61 | /* According to measurements (but they look suspicious to me!) done in |
| 62 | * '97, 37% of the packets are one cell in size. So it pays to have |
| 63 | * buffers allocated at that size. A large jump in percentage of |
| 64 | * packets occurs at packets around 536 bytes in length. So it also |
| 65 | * pays to have those pre-allocated. Unfortunately, we can't fully |
| 66 | * take advantage of this as the majority of the packets is likely to |
| 67 | * be TCP/IP (As where obviously the measurement comes from) There the |
| 68 | * link would be opened with say a 1500 byte MTU, and we can't handle |
| 69 | * smaller buffers more efficiently than the larger ones. -- REW |
| 70 | */ |
| 71 | |
| 72 | /* Due to the way Linux memory management works, specifying "576" as |
| 73 | * an allocation size here isn't going to help. They are allocated |
| 74 | * from 1024-byte regions anyway. With the size of the sk_buffs (quite |
| 75 | * large), it doesn't pay to allocate the smallest size (64) -- REW */ |
| 76 | |
| 77 | /* This is all guesswork. Hard numbers to back this up or disprove this, |
| 78 | * are appreciated. -- REW */ |
| 79 | |
| 80 | /* The last entry should be about 64k. However, the "buffer size" is |
| 81 | * passed to the chip in a 16 bit field. I don't know how "65536" |
| 82 | * would be interpreted. -- REW */ |
| 83 | |
| 84 | #define NP FS_NR_FREE_POOLS |
| 85 | static int rx_buf_sizes[NP] = {128, 256, 512, 1024, 2048, 4096, 16384, 65520}; |
| 86 | /* log2: 7 8 9 10 11 12 14 16 */ |
| 87 | |
| 88 | #if 0 |
| 89 | static int rx_pool_sizes[NP] = {1024, 1024, 512, 256, 128, 64, 32, 32}; |
| 90 | #else |
| 91 | /* debug */ |
| 92 | static int rx_pool_sizes[NP] = {128, 128, 128, 64, 64, 64, 32, 32}; |
| 93 | #endif |
| 94 | /* log2: 10 10 9 8 7 6 5 5 */ |
| 95 | /* sumlog2: 17 18 18 18 18 18 19 21 */ |
| 96 | /* mem allocated: 128k 256k 256k 256k 256k 256k 512k 2M */ |
| 97 | /* tot mem: almost 4M */ |
| 98 | |
| 99 | /* NP is shorter, so that it fits on a single line. */ |
| 100 | #undef NP |
| 101 | |
| 102 | |
| 103 | /* Small hardware gotcha: |
| 104 | |
| 105 | The FS50 CAM (VP/VC match registers) always take the lowest channel |
| 106 | number that matches. This is not a problem. |
| 107 | |
| 108 | However, they also ignore whether the channel is enabled or |
| 109 | not. This means that if you allocate channel 0 to 1.2 and then |
| 110 | channel 1 to 0.0, then disabeling channel 0 and writing 0 to the |
| 111 | match channel for channel 0 will "steal" the traffic from channel |
| 112 | 1, even if you correctly disable channel 0. |
| 113 | |
| 114 | Workaround: |
| 115 | |
| 116 | - When disabling channels, write an invalid VP/VC value to the |
| 117 | match register. (We use 0xffffffff, which in the worst case |
| 118 | matches VP/VC = <maxVP>/<maxVC>, but I expect it not to match |
| 119 | anything as some "when not in use, program to 0" bits are now |
| 120 | programmed to 1...) |
| 121 | |
| 122 | - Don't initialize the match registers to 0, as 0.0 is a valid |
| 123 | channel. |
| 124 | */ |
| 125 | |
| 126 | |
| 127 | /* Optimization hints and tips. |
| 128 | |
| 129 | The FireStream chips are very capable of reducing the amount of |
| 130 | "interrupt-traffic" for the CPU. This driver requests an interrupt on EVERY |
| 131 | action. You could try to minimize this a bit. |
| 132 | |
| 133 | Besides that, the userspace->kernel copy and the PCI bus are the |
| 134 | performance limiting issues for this driver. |
| 135 | |
| 136 | You could queue up a bunch of outgoing packets without telling the |
| 137 | FireStream. I'm not sure that's going to win you much though. The |
| 138 | Linux layer won't tell us in advance when it's not going to give us |
| 139 | any more packets in a while. So this is tricky to implement right without |
| 140 | introducing extra delays. |
| 141 | |
| 142 | -- REW |
| 143 | */ |
| 144 | |
| 145 | |
| 146 | |
| 147 | |
| 148 | /* The strings that define what the RX queue entry is all about. */ |
| 149 | /* Fujitsu: Please tell me which ones can have a pointer to a |
| 150 | freepool descriptor! */ |
| 151 | static char *res_strings[] = { |
| 152 | "RX OK: streaming not EOP", |
| 153 | "RX OK: streaming EOP", |
| 154 | "RX OK: Single buffer packet", |
| 155 | "RX OK: packet mode", |
| 156 | "RX OK: F4 OAM (end to end)", |
| 157 | "RX OK: F4 OAM (Segment)", |
| 158 | "RX OK: F5 OAM (end to end)", |
| 159 | "RX OK: F5 OAM (Segment)", |
| 160 | "RX OK: RM cell", |
| 161 | "RX OK: TRANSP cell", |
| 162 | "RX OK: TRANSPC cell", |
| 163 | "Unmatched cell", |
| 164 | "reserved 12", |
| 165 | "reserved 13", |
| 166 | "reserved 14", |
| 167 | "Unrecognized cell", |
| 168 | "reserved 16", |
| 169 | "reassemby abort: AAL5 abort", |
| 170 | "packet purged", |
| 171 | "packet ageing timeout", |
| 172 | "channel ageing timeout", |
| 173 | "calculated lenght error", |
| 174 | "programmed lenght limit error", |
| 175 | "aal5 crc32 error", |
| 176 | "oam transp or transpc crc10 error", |
| 177 | "reserved 25", |
| 178 | "reserved 26", |
| 179 | "reserved 27", |
| 180 | "reserved 28", |
| 181 | "reserved 29", |
| 182 | "reserved 30", |
| 183 | "reassembly abort: no buffers", |
| 184 | "receive buffer overflow", |
| 185 | "change in GFC", |
| 186 | "receive buffer full", |
| 187 | "low priority discard - no receive descriptor", |
| 188 | "low priority discard - missing end of packet", |
| 189 | "reserved 41", |
| 190 | "reserved 42", |
| 191 | "reserved 43", |
| 192 | "reserved 44", |
| 193 | "reserved 45", |
| 194 | "reserved 46", |
| 195 | "reserved 47", |
| 196 | "reserved 48", |
| 197 | "reserved 49", |
| 198 | "reserved 50", |
| 199 | "reserved 51", |
| 200 | "reserved 52", |
| 201 | "reserved 53", |
| 202 | "reserved 54", |
| 203 | "reserved 55", |
| 204 | "reserved 56", |
| 205 | "reserved 57", |
| 206 | "reserved 58", |
| 207 | "reserved 59", |
| 208 | "reserved 60", |
| 209 | "reserved 61", |
| 210 | "reserved 62", |
| 211 | "reserved 63", |
| 212 | }; |
| 213 | |
| 214 | static char *irq_bitname[] = { |
| 215 | "LPCO", |
| 216 | "DPCO", |
| 217 | "RBRQ0_W", |
| 218 | "RBRQ1_W", |
| 219 | "RBRQ2_W", |
| 220 | "RBRQ3_W", |
| 221 | "RBRQ0_NF", |
| 222 | "RBRQ1_NF", |
| 223 | "RBRQ2_NF", |
| 224 | "RBRQ3_NF", |
| 225 | "BFP_SC", |
| 226 | "INIT", |
| 227 | "INIT_ERR", |
| 228 | "USCEO", |
| 229 | "UPEC0", |
| 230 | "VPFCO", |
| 231 | "CRCCO", |
| 232 | "HECO", |
| 233 | "TBRQ_W", |
| 234 | "TBRQ_NF", |
| 235 | "CTPQ_E", |
| 236 | "GFC_C0", |
| 237 | "PCI_FTL", |
| 238 | "CSQ_W", |
| 239 | "CSQ_NF", |
| 240 | "EXT_INT", |
| 241 | "RXDMA_S" |
| 242 | }; |
| 243 | |
| 244 | |
| 245 | #define PHY_EOF -1 |
| 246 | #define PHY_CLEARALL -2 |
| 247 | |
| 248 | struct reginit_item { |
| 249 | int reg, val; |
| 250 | }; |
| 251 | |
| 252 | |
| 253 | static struct reginit_item PHY_NTC_INIT[] __devinitdata = { |
| 254 | { PHY_CLEARALL, 0x40 }, |
| 255 | { 0x12, 0x0001 }, |
| 256 | { 0x13, 0x7605 }, |
| 257 | { 0x1A, 0x0001 }, |
| 258 | { 0x1B, 0x0005 }, |
| 259 | { 0x38, 0x0003 }, |
| 260 | { 0x39, 0x0006 }, /* changed here to make loopback */ |
| 261 | { 0x01, 0x5262 }, |
| 262 | { 0x15, 0x0213 }, |
| 263 | { 0x00, 0x0003 }, |
| 264 | { PHY_EOF, 0}, /* -1 signals end of list */ |
| 265 | }; |
| 266 | |
| 267 | |
| 268 | /* Safetyfeature: If the card interrupts more than this number of times |
| 269 | in a jiffy (1/100th of a second) then we just disable the interrupt and |
| 270 | print a message. This prevents the system from hanging. |
| 271 | |
| 272 | 150000 packets per second is close to the limit a PC is going to have |
| 273 | anyway. We therefore have to disable this for production. -- REW */ |
| 274 | #undef IRQ_RATE_LIMIT // 100 |
| 275 | |
| 276 | /* Interrupts work now. Unlike serial cards, ATM cards don't work all |
| 277 | that great without interrupts. -- REW */ |
| 278 | #undef FS_POLL_FREQ // 100 |
| 279 | |
| 280 | /* |
| 281 | This driver can spew a whole lot of debugging output at you. If you |
| 282 | need maximum performance, you should disable the DEBUG define. To |
| 283 | aid in debugging in the field, I'm leaving the compile-time debug |
| 284 | features enabled, and disable them "runtime". That allows me to |
| 285 | instruct people with problems to enable debugging without requiring |
| 286 | them to recompile... -- REW |
| 287 | */ |
| 288 | #define DEBUG |
| 289 | |
| 290 | #ifdef DEBUG |
| 291 | #define fs_dprintk(f, str...) if (fs_debug & f) printk (str) |
| 292 | #else |
| 293 | #define fs_dprintk(f, str...) /* nothing */ |
| 294 | #endif |
| 295 | |
| 296 | |
| 297 | static int fs_keystream = 0; |
| 298 | |
| 299 | #ifdef DEBUG |
| 300 | /* I didn't forget to set this to zero before shipping. Hit me with a stick |
| 301 | if you get this with the debug default not set to zero again. -- REW */ |
| 302 | static int fs_debug = 0; |
| 303 | #else |
| 304 | #define fs_debug 0 |
| 305 | #endif |
| 306 | |
| 307 | #ifdef MODULE |
| 308 | #ifdef DEBUG |
| 309 | module_param(fs_debug, int, 0644); |
| 310 | #endif |
| 311 | module_param(loopback, int, 0); |
| 312 | module_param(num, int, 0); |
| 313 | module_param(fs_keystream, int, 0); |
| 314 | /* XXX Add rx_buf_sizes, and rx_pool_sizes As per request Amar. -- REW */ |
| 315 | #endif |
| 316 | |
| 317 | |
| 318 | #define FS_DEBUG_FLOW 0x00000001 |
| 319 | #define FS_DEBUG_OPEN 0x00000002 |
| 320 | #define FS_DEBUG_QUEUE 0x00000004 |
| 321 | #define FS_DEBUG_IRQ 0x00000008 |
| 322 | #define FS_DEBUG_INIT 0x00000010 |
| 323 | #define FS_DEBUG_SEND 0x00000020 |
| 324 | #define FS_DEBUG_PHY 0x00000040 |
| 325 | #define FS_DEBUG_CLEANUP 0x00000080 |
| 326 | #define FS_DEBUG_QOS 0x00000100 |
| 327 | #define FS_DEBUG_TXQ 0x00000200 |
| 328 | #define FS_DEBUG_ALLOC 0x00000400 |
| 329 | #define FS_DEBUG_TXMEM 0x00000800 |
| 330 | #define FS_DEBUG_QSIZE 0x00001000 |
| 331 | |
| 332 | |
| 333 | #define func_enter() fs_dprintk (FS_DEBUG_FLOW, "fs: enter %s\n", __FUNCTION__) |
| 334 | #define func_exit() fs_dprintk (FS_DEBUG_FLOW, "fs: exit %s\n", __FUNCTION__) |
| 335 | |
| 336 | |
| 337 | static struct fs_dev *fs_boards = NULL; |
| 338 | |
| 339 | #ifdef DEBUG |
| 340 | |
| 341 | static void my_hd (void *addr, int len) |
| 342 | { |
| 343 | int j, ch; |
| 344 | unsigned char *ptr = addr; |
| 345 | |
| 346 | while (len > 0) { |
| 347 | printk ("%p ", ptr); |
| 348 | for (j=0;j < ((len < 16)?len:16);j++) { |
| 349 | printk ("%02x %s", ptr[j], (j==7)?" ":""); |
| 350 | } |
| 351 | for ( ;j < 16;j++) { |
| 352 | printk (" %s", (j==7)?" ":""); |
| 353 | } |
| 354 | for (j=0;j < ((len < 16)?len:16);j++) { |
| 355 | ch = ptr[j]; |
| 356 | printk ("%c", (ch < 0x20)?'.':((ch > 0x7f)?'.':ch)); |
| 357 | } |
| 358 | printk ("\n"); |
| 359 | ptr += 16; |
| 360 | len -= 16; |
| 361 | } |
| 362 | } |
| 363 | #else /* DEBUG */ |
| 364 | static void my_hd (void *addr, int len){} |
| 365 | #endif /* DEBUG */ |
| 366 | |
| 367 | /********** free an skb (as per ATM device driver documentation) **********/ |
| 368 | |
| 369 | /* Hmm. If this is ATM specific, why isn't there an ATM routine for this? |
| 370 | * I copied it over from the ambassador driver. -- REW */ |
| 371 | |
| 372 | static inline void fs_kfree_skb (struct sk_buff * skb) |
| 373 | { |
| 374 | if (ATM_SKB(skb)->vcc->pop) |
| 375 | ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb); |
| 376 | else |
| 377 | dev_kfree_skb_any (skb); |
| 378 | } |
| 379 | |
| 380 | |
| 381 | |
| 382 | |
| 383 | /* It seems the ATM forum recommends this horribly complicated 16bit |
| 384 | * floating point format. Turns out the Ambassador uses the exact same |
| 385 | * encoding. I just copied it over. If Mitch agrees, I'll move it over |
| 386 | * to the atm_misc file or something like that. (and remove it from |
| 387 | * here and the ambassador driver) -- REW |
| 388 | */ |
| 389 | |
| 390 | /* The good thing about this format is that it is monotonic. So, |
| 391 | a conversion routine need not be very complicated. To be able to |
| 392 | round "nearest" we need to take along a few extra bits. Lets |
| 393 | put these after 16 bits, so that we can just return the top 16 |
| 394 | bits of the 32bit number as the result: |
| 395 | |
| 396 | int mr (unsigned int rate, int r) |
| 397 | { |
| 398 | int e = 16+9; |
| 399 | static int round[4]={0, 0, 0xffff, 0x8000}; |
| 400 | if (!rate) return 0; |
| 401 | while (rate & 0xfc000000) { |
| 402 | rate >>= 1; |
| 403 | e++; |
| 404 | } |
| 405 | while (! (rate & 0xfe000000)) { |
| 406 | rate <<= 1; |
| 407 | e--; |
| 408 | } |
| 409 | |
| 410 | // Now the mantissa is in positions bit 16-25. Excepf for the "hidden 1" that's in bit 26. |
| 411 | rate &= ~0x02000000; |
| 412 | // Next add in the exponent |
| 413 | rate |= e << (16+9); |
| 414 | // And perform the rounding: |
| 415 | return (rate + round[r]) >> 16; |
| 416 | } |
| 417 | |
| 418 | 14 lines-of-code. Compare that with the 120 that the Ambassador |
| 419 | guys needed. (would be 8 lines shorter if I'd try to really reduce |
| 420 | the number of lines: |
| 421 | |
| 422 | int mr (unsigned int rate, int r) |
| 423 | { |
| 424 | int e = 16+9; |
| 425 | static int round[4]={0, 0, 0xffff, 0x8000}; |
| 426 | if (!rate) return 0; |
| 427 | for (; rate & 0xfc000000 ;rate >>= 1, e++); |
| 428 | for (;!(rate & 0xfe000000);rate <<= 1, e--); |
| 429 | return ((rate & ~0x02000000) | (e << (16+9)) + round[r]) >> 16; |
| 430 | } |
| 431 | |
| 432 | Exercise for the reader: Remove one more line-of-code, without |
| 433 | cheating. (Just joining two lines is cheating). (I know it's |
| 434 | possible, don't think you've beat me if you found it... If you |
| 435 | manage to lose two lines or more, keep me updated! ;-) |
| 436 | |
| 437 | -- REW */ |
| 438 | |
| 439 | |
| 440 | #define ROUND_UP 1 |
| 441 | #define ROUND_DOWN 2 |
| 442 | #define ROUND_NEAREST 3 |
| 443 | /********** make rate (not quite as much fun as Horizon) **********/ |
| 444 | |
| 445 | static unsigned int make_rate (unsigned int rate, int r, |
| 446 | u16 * bits, unsigned int * actual) |
| 447 | { |
| 448 | unsigned char exp = -1; /* hush gcc */ |
| 449 | unsigned int man = -1; /* hush gcc */ |
| 450 | |
| 451 | fs_dprintk (FS_DEBUG_QOS, "make_rate %u", rate); |
| 452 | |
| 453 | /* rates in cells per second, ITU format (nasty 16-bit floating-point) |
| 454 | given 5-bit e and 9-bit m: |
| 455 | rate = EITHER (1+m/2^9)*2^e OR 0 |
| 456 | bits = EITHER 1<<14 | e<<9 | m OR 0 |
| 457 | (bit 15 is "reserved", bit 14 "non-zero") |
| 458 | smallest rate is 0 (special representation) |
| 459 | largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1) |
| 460 | smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0) |
| 461 | simple algorithm: |
| 462 | find position of top bit, this gives e |
| 463 | remove top bit and shift (rounding if feeling clever) by 9-e |
| 464 | */ |
| 465 | /* Ambassador ucode bug: please don't set bit 14! so 0 rate not |
| 466 | representable. // This should move into the ambassador driver |
| 467 | when properly merged. -- REW */ |
| 468 | |
| 469 | if (rate > 0xffc00000U) { |
| 470 | /* larger than largest representable rate */ |
| 471 | |
| 472 | if (r == ROUND_UP) { |
| 473 | return -EINVAL; |
| 474 | } else { |
| 475 | exp = 31; |
| 476 | man = 511; |
| 477 | } |
| 478 | |
| 479 | } else if (rate) { |
| 480 | /* representable rate */ |
| 481 | |
| 482 | exp = 31; |
| 483 | man = rate; |
| 484 | |
| 485 | /* invariant: rate = man*2^(exp-31) */ |
| 486 | while (!(man & (1<<31))) { |
| 487 | exp = exp - 1; |
| 488 | man = man<<1; |
| 489 | } |
| 490 | |
| 491 | /* man has top bit set |
| 492 | rate = (2^31+(man-2^31))*2^(exp-31) |
| 493 | rate = (1+(man-2^31)/2^31)*2^exp |
| 494 | */ |
| 495 | man = man<<1; |
| 496 | man &= 0xffffffffU; /* a nop on 32-bit systems */ |
| 497 | /* rate = (1+man/2^32)*2^exp |
| 498 | |
| 499 | exp is in the range 0 to 31, man is in the range 0 to 2^32-1 |
| 500 | time to lose significance... we want m in the range 0 to 2^9-1 |
| 501 | rounding presents a minor problem... we first decide which way |
| 502 | we are rounding (based on given rounding direction and possibly |
| 503 | the bits of the mantissa that are to be discarded). |
| 504 | */ |
| 505 | |
| 506 | switch (r) { |
| 507 | case ROUND_DOWN: { |
| 508 | /* just truncate */ |
| 509 | man = man>>(32-9); |
| 510 | break; |
| 511 | } |
| 512 | case ROUND_UP: { |
| 513 | /* check all bits that we are discarding */ |
| 514 | if (man & (-1>>9)) { |
| 515 | man = (man>>(32-9)) + 1; |
| 516 | if (man == (1<<9)) { |
| 517 | /* no need to check for round up outside of range */ |
| 518 | man = 0; |
| 519 | exp += 1; |
| 520 | } |
| 521 | } else { |
| 522 | man = (man>>(32-9)); |
| 523 | } |
| 524 | break; |
| 525 | } |
| 526 | case ROUND_NEAREST: { |
| 527 | /* check msb that we are discarding */ |
| 528 | if (man & (1<<(32-9-1))) { |
| 529 | man = (man>>(32-9)) + 1; |
| 530 | if (man == (1<<9)) { |
| 531 | /* no need to check for round up outside of range */ |
| 532 | man = 0; |
| 533 | exp += 1; |
| 534 | } |
| 535 | } else { |
| 536 | man = (man>>(32-9)); |
| 537 | } |
| 538 | break; |
| 539 | } |
| 540 | } |
| 541 | |
| 542 | } else { |
| 543 | /* zero rate - not representable */ |
| 544 | |
| 545 | if (r == ROUND_DOWN) { |
| 546 | return -EINVAL; |
| 547 | } else { |
| 548 | exp = 0; |
| 549 | man = 0; |
| 550 | } |
| 551 | } |
| 552 | |
| 553 | fs_dprintk (FS_DEBUG_QOS, "rate: man=%u, exp=%hu", man, exp); |
| 554 | |
| 555 | if (bits) |
| 556 | *bits = /* (1<<14) | */ (exp<<9) | man; |
| 557 | |
| 558 | if (actual) |
| 559 | *actual = (exp >= 9) |
| 560 | ? (1 << exp) + (man << (exp-9)) |
| 561 | : (1 << exp) + ((man + (1<<(9-exp-1))) >> (9-exp)); |
| 562 | |
| 563 | return 0; |
| 564 | } |
| 565 | |
| 566 | |
| 567 | |
| 568 | |
| 569 | /* FireStream access routines */ |
| 570 | /* For DEEP-DOWN debugging these can be rigged to intercept accesses to |
| 571 | certain registers or to just log all accesses. */ |
| 572 | |
| 573 | static inline void write_fs (struct fs_dev *dev, int offset, u32 val) |
| 574 | { |
| 575 | writel (val, dev->base + offset); |
| 576 | } |
| 577 | |
| 578 | |
| 579 | static inline u32 read_fs (struct fs_dev *dev, int offset) |
| 580 | { |
| 581 | return readl (dev->base + offset); |
| 582 | } |
| 583 | |
| 584 | |
| 585 | |
| 586 | static inline struct FS_QENTRY *get_qentry (struct fs_dev *dev, struct queue *q) |
| 587 | { |
| 588 | return bus_to_virt (read_fs (dev, Q_WP(q->offset)) & Q_ADDR_MASK); |
| 589 | } |
| 590 | |
| 591 | |
| 592 | static void submit_qentry (struct fs_dev *dev, struct queue *q, struct FS_QENTRY *qe) |
| 593 | { |
| 594 | u32 wp; |
| 595 | struct FS_QENTRY *cqe; |
| 596 | |
| 597 | /* XXX Sanity check: the write pointer can be checked to be |
| 598 | still the same as the value passed as qe... -- REW */ |
| 599 | /* udelay (5); */ |
| 600 | while ((wp = read_fs (dev, Q_WP (q->offset))) & Q_FULL) { |
| 601 | fs_dprintk (FS_DEBUG_TXQ, "Found queue at %x full. Waiting.\n", |
| 602 | q->offset); |
| 603 | schedule (); |
| 604 | } |
| 605 | |
| 606 | wp &= ~0xf; |
| 607 | cqe = bus_to_virt (wp); |
| 608 | if (qe != cqe) { |
| 609 | fs_dprintk (FS_DEBUG_TXQ, "q mismatch! %p %p\n", qe, cqe); |
| 610 | } |
| 611 | |
| 612 | write_fs (dev, Q_WP(q->offset), Q_INCWRAP); |
| 613 | |
| 614 | { |
| 615 | static int c; |
| 616 | if (!(c++ % 100)) |
| 617 | { |
| 618 | int rp, wp; |
| 619 | rp = read_fs (dev, Q_RP(q->offset)); |
| 620 | wp = read_fs (dev, Q_WP(q->offset)); |
| 621 | fs_dprintk (FS_DEBUG_TXQ, "q at %d: %x-%x: %x entries.\n", |
| 622 | q->offset, rp, wp, wp-rp); |
| 623 | } |
| 624 | } |
| 625 | } |
| 626 | |
| 627 | #ifdef DEBUG_EXTRA |
| 628 | static struct FS_QENTRY pq[60]; |
| 629 | static int qp; |
| 630 | |
| 631 | static struct FS_BPENTRY dq[60]; |
| 632 | static int qd; |
| 633 | static void *da[60]; |
| 634 | #endif |
| 635 | |
| 636 | static void submit_queue (struct fs_dev *dev, struct queue *q, |
| 637 | u32 cmd, u32 p1, u32 p2, u32 p3) |
| 638 | { |
| 639 | struct FS_QENTRY *qe; |
| 640 | |
| 641 | qe = get_qentry (dev, q); |
| 642 | qe->cmd = cmd; |
| 643 | qe->p0 = p1; |
| 644 | qe->p1 = p2; |
| 645 | qe->p2 = p3; |
| 646 | submit_qentry (dev, q, qe); |
| 647 | |
| 648 | #ifdef DEBUG_EXTRA |
| 649 | pq[qp].cmd = cmd; |
| 650 | pq[qp].p0 = p1; |
| 651 | pq[qp].p1 = p2; |
| 652 | pq[qp].p2 = p3; |
| 653 | qp++; |
| 654 | if (qp >= 60) qp = 0; |
| 655 | #endif |
| 656 | } |
| 657 | |
| 658 | /* Test the "other" way one day... -- REW */ |
| 659 | #if 1 |
| 660 | #define submit_command submit_queue |
| 661 | #else |
| 662 | |
| 663 | static void submit_command (struct fs_dev *dev, struct queue *q, |
| 664 | u32 cmd, u32 p1, u32 p2, u32 p3) |
| 665 | { |
| 666 | write_fs (dev, CMDR0, cmd); |
| 667 | write_fs (dev, CMDR1, p1); |
| 668 | write_fs (dev, CMDR2, p2); |
| 669 | write_fs (dev, CMDR3, p3); |
| 670 | } |
| 671 | #endif |
| 672 | |
| 673 | |
| 674 | |
| 675 | static void process_return_queue (struct fs_dev *dev, struct queue *q) |
| 676 | { |
| 677 | long rq; |
| 678 | struct FS_QENTRY *qe; |
| 679 | void *tc; |
| 680 | |
| 681 | while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) { |
| 682 | fs_dprintk (FS_DEBUG_QUEUE, "reaping return queue entry at %lx\n", rq); |
| 683 | qe = bus_to_virt (rq); |
| 684 | |
| 685 | fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x. (%d)\n", |
| 686 | qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe)); |
| 687 | |
| 688 | switch (STATUS_CODE (qe)) { |
| 689 | case 5: |
| 690 | tc = bus_to_virt (qe->p0); |
| 691 | fs_dprintk (FS_DEBUG_ALLOC, "Free tc: %p\n", tc); |
| 692 | kfree (tc); |
| 693 | break; |
| 694 | } |
| 695 | |
| 696 | write_fs (dev, Q_RP(q->offset), Q_INCWRAP); |
| 697 | } |
| 698 | } |
| 699 | |
| 700 | |
| 701 | static void process_txdone_queue (struct fs_dev *dev, struct queue *q) |
| 702 | { |
| 703 | long rq; |
| 704 | long tmp; |
| 705 | struct FS_QENTRY *qe; |
| 706 | struct sk_buff *skb; |
| 707 | struct FS_BPENTRY *td; |
| 708 | |
| 709 | while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) { |
| 710 | fs_dprintk (FS_DEBUG_QUEUE, "reaping txdone entry at %lx\n", rq); |
| 711 | qe = bus_to_virt (rq); |
| 712 | |
| 713 | fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x: %d\n", |
| 714 | qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe)); |
| 715 | |
| 716 | if (STATUS_CODE (qe) != 2) |
| 717 | fs_dprintk (FS_DEBUG_TXMEM, "queue entry: %08x %08x %08x %08x: %d\n", |
| 718 | qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe)); |
| 719 | |
| 720 | |
| 721 | switch (STATUS_CODE (qe)) { |
| 722 | case 0x01: /* This is for AAL0 where we put the chip in streaming mode */ |
| 723 | /* Fall through */ |
| 724 | case 0x02: |
| 725 | /* Process a real txdone entry. */ |
| 726 | tmp = qe->p0; |
| 727 | if (tmp & 0x0f) |
| 728 | printk (KERN_WARNING "td not aligned: %ld\n", tmp); |
| 729 | tmp &= ~0x0f; |
| 730 | td = bus_to_virt (tmp); |
| 731 | |
| 732 | fs_dprintk (FS_DEBUG_QUEUE, "Pool entry: %08x %08x %08x %08x %p.\n", |
| 733 | td->flags, td->next, td->bsa, td->aal_bufsize, td->skb ); |
| 734 | |
| 735 | skb = td->skb; |
| 736 | if (skb == FS_VCC (ATM_SKB(skb)->vcc)->last_skb) { |
| 737 | wake_up_interruptible (& FS_VCC (ATM_SKB(skb)->vcc)->close_wait); |
| 738 | FS_VCC (ATM_SKB(skb)->vcc)->last_skb = NULL; |
| 739 | } |
| 740 | td->dev->ntxpckts--; |
| 741 | |
| 742 | { |
| 743 | static int c=0; |
| 744 | |
| 745 | if (!(c++ % 100)) { |
| 746 | fs_dprintk (FS_DEBUG_QSIZE, "[%d]", td->dev->ntxpckts); |
| 747 | } |
| 748 | } |
| 749 | |
| 750 | atomic_inc(&ATM_SKB(skb)->vcc->stats->tx); |
| 751 | |
| 752 | fs_dprintk (FS_DEBUG_TXMEM, "i"); |
| 753 | fs_dprintk (FS_DEBUG_ALLOC, "Free t-skb: %p\n", skb); |
| 754 | fs_kfree_skb (skb); |
| 755 | |
| 756 | fs_dprintk (FS_DEBUG_ALLOC, "Free trans-d: %p\n", td); |
| 757 | memset (td, 0x12, sizeof (struct FS_BPENTRY)); |
| 758 | kfree (td); |
| 759 | break; |
| 760 | default: |
| 761 | /* Here we get the tx purge inhibit command ... */ |
| 762 | /* Action, I believe, is "don't do anything". -- REW */ |
| 763 | ; |
| 764 | } |
| 765 | |
| 766 | write_fs (dev, Q_RP(q->offset), Q_INCWRAP); |
| 767 | } |
| 768 | } |
| 769 | |
| 770 | |
| 771 | static void process_incoming (struct fs_dev *dev, struct queue *q) |
| 772 | { |
| 773 | long rq; |
| 774 | struct FS_QENTRY *qe; |
| 775 | struct FS_BPENTRY *pe; |
| 776 | struct sk_buff *skb; |
| 777 | unsigned int channo; |
| 778 | struct atm_vcc *atm_vcc; |
| 779 | |
| 780 | while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) { |
| 781 | fs_dprintk (FS_DEBUG_QUEUE, "reaping incoming queue entry at %lx\n", rq); |
| 782 | qe = bus_to_virt (rq); |
| 783 | |
| 784 | fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x. ", |
| 785 | qe->cmd, qe->p0, qe->p1, qe->p2); |
| 786 | |
| 787 | fs_dprintk (FS_DEBUG_QUEUE, "-> %x: %s\n", |
| 788 | STATUS_CODE (qe), |
| 789 | res_strings[STATUS_CODE(qe)]); |
| 790 | |
| 791 | pe = bus_to_virt (qe->p0); |
| 792 | fs_dprintk (FS_DEBUG_QUEUE, "Pool entry: %08x %08x %08x %08x %p %p.\n", |
| 793 | pe->flags, pe->next, pe->bsa, pe->aal_bufsize, |
| 794 | pe->skb, pe->fp); |
| 795 | |
| 796 | channo = qe->cmd & 0xffff; |
| 797 | |
| 798 | if (channo < dev->nchannels) |
| 799 | atm_vcc = dev->atm_vccs[channo]; |
| 800 | else |
| 801 | atm_vcc = NULL; |
| 802 | |
| 803 | /* Single buffer packet */ |
| 804 | switch (STATUS_CODE (qe)) { |
| 805 | case 0x1: |
| 806 | /* Fall through for streaming mode */ |
| 807 | case 0x2:/* Packet received OK.... */ |
| 808 | if (atm_vcc) { |
| 809 | skb = pe->skb; |
| 810 | pe->fp->n--; |
| 811 | #if 0 |
| 812 | fs_dprintk (FS_DEBUG_QUEUE, "Got skb: %p\n", skb); |
| 813 | if (FS_DEBUG_QUEUE & fs_debug) my_hd (bus_to_virt (pe->bsa), 0x20); |
| 814 | #endif |
| 815 | skb_put (skb, qe->p1 & 0xffff); |
| 816 | ATM_SKB(skb)->vcc = atm_vcc; |
| 817 | atomic_inc(&atm_vcc->stats->rx); |
| 818 | do_gettimeofday(&skb->stamp); |
| 819 | fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p (pushed)\n", skb); |
| 820 | atm_vcc->push (atm_vcc, skb); |
| 821 | fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe); |
| 822 | kfree (pe); |
| 823 | } else { |
| 824 | printk (KERN_ERR "Got a receive on a non-open channel %d.\n", channo); |
| 825 | } |
| 826 | break; |
| 827 | case 0x17:/* AAL 5 CRC32 error. IFF the length field is nonzero, a buffer |
| 828 | has been consumed and needs to be processed. -- REW */ |
| 829 | if (qe->p1 & 0xffff) { |
| 830 | pe = bus_to_virt (qe->p0); |
| 831 | pe->fp->n--; |
| 832 | fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", pe->skb); |
| 833 | dev_kfree_skb_any (pe->skb); |
| 834 | fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe); |
| 835 | kfree (pe); |
| 836 | } |
| 837 | if (atm_vcc) |
| 838 | atomic_inc(&atm_vcc->stats->rx_drop); |
| 839 | break; |
| 840 | case 0x1f: /* Reassembly abort: no buffers. */ |
| 841 | /* Silently increment error counter. */ |
| 842 | if (atm_vcc) |
| 843 | atomic_inc(&atm_vcc->stats->rx_drop); |
| 844 | break; |
| 845 | default: /* Hmm. Haven't written the code to handle the others yet... -- REW */ |
| 846 | printk (KERN_WARNING "Don't know what to do with RX status %x: %s.\n", |
| 847 | STATUS_CODE(qe), res_strings[STATUS_CODE (qe)]); |
| 848 | } |
| 849 | write_fs (dev, Q_RP(q->offset), Q_INCWRAP); |
| 850 | } |
| 851 | } |
| 852 | |
| 853 | |
| 854 | |
| 855 | #define DO_DIRECTION(tp) ((tp)->traffic_class != ATM_NONE) |
| 856 | |
| 857 | static int fs_open(struct atm_vcc *atm_vcc) |
| 858 | { |
| 859 | struct fs_dev *dev; |
| 860 | struct fs_vcc *vcc; |
| 861 | struct fs_transmit_config *tc; |
| 862 | struct atm_trafprm * txtp; |
| 863 | struct atm_trafprm * rxtp; |
| 864 | /* struct fs_receive_config *rc;*/ |
| 865 | /* struct FS_QENTRY *qe; */ |
| 866 | int error; |
| 867 | int bfp; |
| 868 | int to; |
| 869 | unsigned short tmc0; |
| 870 | short vpi = atm_vcc->vpi; |
| 871 | int vci = atm_vcc->vci; |
| 872 | |
| 873 | func_enter (); |
| 874 | |
| 875 | dev = FS_DEV(atm_vcc->dev); |
| 876 | fs_dprintk (FS_DEBUG_OPEN, "fs: open on dev: %p, vcc at %p\n", |
| 877 | dev, atm_vcc); |
| 878 | |
| 879 | if (vci != ATM_VPI_UNSPEC && vpi != ATM_VCI_UNSPEC) |
| 880 | set_bit(ATM_VF_ADDR, &atm_vcc->flags); |
| 881 | |
| 882 | if ((atm_vcc->qos.aal != ATM_AAL5) && |
| 883 | (atm_vcc->qos.aal != ATM_AAL2)) |
| 884 | return -EINVAL; /* XXX AAL0 */ |
| 885 | |
| 886 | fs_dprintk (FS_DEBUG_OPEN, "fs: (itf %d): open %d.%d\n", |
| 887 | atm_vcc->dev->number, atm_vcc->vpi, atm_vcc->vci); |
| 888 | |
| 889 | /* XXX handle qos parameters (rate limiting) ? */ |
| 890 | |
| 891 | vcc = kmalloc(sizeof(struct fs_vcc), GFP_KERNEL); |
| 892 | fs_dprintk (FS_DEBUG_ALLOC, "Alloc VCC: %p(%Zd)\n", vcc, sizeof(struct fs_vcc)); |
| 893 | if (!vcc) { |
| 894 | clear_bit(ATM_VF_ADDR, &atm_vcc->flags); |
| 895 | return -ENOMEM; |
| 896 | } |
| 897 | |
| 898 | atm_vcc->dev_data = vcc; |
| 899 | vcc->last_skb = NULL; |
| 900 | |
| 901 | init_waitqueue_head (&vcc->close_wait); |
| 902 | |
| 903 | txtp = &atm_vcc->qos.txtp; |
| 904 | rxtp = &atm_vcc->qos.rxtp; |
| 905 | |
| 906 | if (!test_bit(ATM_VF_PARTIAL, &atm_vcc->flags)) { |
| 907 | if (IS_FS50(dev)) { |
| 908 | /* Increment the channel numer: take a free one next time. */ |
| 909 | for (to=33;to;to--, dev->channo++) { |
| 910 | /* We only have 32 channels */ |
| 911 | if (dev->channo >= 32) |
| 912 | dev->channo = 0; |
| 913 | /* If we need to do RX, AND the RX is inuse, try the next */ |
| 914 | if (DO_DIRECTION(rxtp) && dev->atm_vccs[dev->channo]) |
| 915 | continue; |
| 916 | /* If we need to do TX, AND the TX is inuse, try the next */ |
| 917 | if (DO_DIRECTION(txtp) && test_bit (dev->channo, dev->tx_inuse)) |
| 918 | continue; |
| 919 | /* Ok, both are free! (or not needed) */ |
| 920 | break; |
| 921 | } |
| 922 | if (!to) { |
| 923 | printk ("No more free channels for FS50..\n"); |
| 924 | return -EBUSY; |
| 925 | } |
| 926 | vcc->channo = dev->channo; |
| 927 | dev->channo &= dev->channel_mask; |
| 928 | |
| 929 | } else { |
| 930 | vcc->channo = (vpi << FS155_VCI_BITS) | (vci); |
| 931 | if (((DO_DIRECTION(rxtp) && dev->atm_vccs[vcc->channo])) || |
| 932 | ( DO_DIRECTION(txtp) && test_bit (vcc->channo, dev->tx_inuse))) { |
| 933 | printk ("Channel is in use for FS155.\n"); |
| 934 | return -EBUSY; |
| 935 | } |
| 936 | } |
| 937 | fs_dprintk (FS_DEBUG_OPEN, "OK. Allocated channel %x(%d).\n", |
| 938 | vcc->channo, vcc->channo); |
| 939 | } |
| 940 | |
| 941 | if (DO_DIRECTION (txtp)) { |
| 942 | tc = kmalloc (sizeof (struct fs_transmit_config), GFP_KERNEL); |
| 943 | fs_dprintk (FS_DEBUG_ALLOC, "Alloc tc: %p(%Zd)\n", |
| 944 | tc, sizeof (struct fs_transmit_config)); |
| 945 | if (!tc) { |
| 946 | fs_dprintk (FS_DEBUG_OPEN, "fs: can't alloc transmit_config.\n"); |
| 947 | return -ENOMEM; |
| 948 | } |
| 949 | |
| 950 | /* Allocate the "open" entry from the high priority txq. This makes |
| 951 | it most likely that the chip will notice it. It also prevents us |
| 952 | from having to wait for completion. On the other hand, we may |
| 953 | need to wait for completion anyway, to see if it completed |
| 954 | succesfully. */ |
| 955 | |
| 956 | switch (atm_vcc->qos.aal) { |
| 957 | case ATM_AAL2: |
| 958 | case ATM_AAL0: |
| 959 | tc->flags = 0 |
| 960 | | TC_FLAGS_TRANSPARENT_PAYLOAD |
| 961 | | TC_FLAGS_PACKET |
| 962 | | (1 << 28) |
| 963 | | TC_FLAGS_TYPE_UBR /* XXX Change to VBR -- PVDL */ |
| 964 | | TC_FLAGS_CAL0; |
| 965 | break; |
| 966 | case ATM_AAL5: |
| 967 | tc->flags = 0 |
| 968 | | TC_FLAGS_AAL5 |
| 969 | | TC_FLAGS_PACKET /* ??? */ |
| 970 | | TC_FLAGS_TYPE_CBR |
| 971 | | TC_FLAGS_CAL0; |
| 972 | break; |
| 973 | default: |
| 974 | printk ("Unknown aal: %d\n", atm_vcc->qos.aal); |
| 975 | tc->flags = 0; |
| 976 | } |
| 977 | /* Docs are vague about this atm_hdr field. By the way, the FS |
| 978 | * chip makes odd errors if lower bits are set.... -- REW */ |
| 979 | tc->atm_hdr = (vpi << 20) | (vci << 4); |
| 980 | { |
| 981 | int pcr = atm_pcr_goal (txtp); |
| 982 | |
| 983 | fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr); |
| 984 | |
| 985 | /* XXX Hmm. officially we're only allowed to do this if rounding |
| 986 | is round_down -- REW */ |
| 987 | if (IS_FS50(dev)) { |
| 988 | if (pcr > 51840000/53/8) pcr = 51840000/53/8; |
| 989 | } else { |
| 990 | if (pcr > 155520000/53/8) pcr = 155520000/53/8; |
| 991 | } |
| 992 | if (!pcr) { |
| 993 | /* no rate cap */ |
| 994 | tmc0 = IS_FS50(dev)?0x61BE:0x64c9; /* Just copied over the bits from Fujitsu -- REW */ |
| 995 | } else { |
| 996 | int r; |
| 997 | if (pcr < 0) { |
| 998 | r = ROUND_DOWN; |
| 999 | pcr = -pcr; |
| 1000 | } else { |
| 1001 | r = ROUND_UP; |
| 1002 | } |
| 1003 | error = make_rate (pcr, r, &tmc0, NULL); |
| 1004 | } |
| 1005 | fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr); |
| 1006 | } |
| 1007 | |
| 1008 | tc->TMC[0] = tmc0 | 0x4000; |
| 1009 | tc->TMC[1] = 0; /* Unused */ |
| 1010 | tc->TMC[2] = 0; /* Unused */ |
| 1011 | tc->TMC[3] = 0; /* Unused */ |
| 1012 | |
| 1013 | tc->spec = 0; /* UTOPIA address, UDF, HEC: Unused -> 0 */ |
| 1014 | tc->rtag[0] = 0; /* What should I do with routing tags??? |
| 1015 | -- Not used -- AS -- Thanks -- REW*/ |
| 1016 | tc->rtag[1] = 0; |
| 1017 | tc->rtag[2] = 0; |
| 1018 | |
| 1019 | if (fs_debug & FS_DEBUG_OPEN) { |
| 1020 | fs_dprintk (FS_DEBUG_OPEN, "TX config record:\n"); |
| 1021 | my_hd (tc, sizeof (*tc)); |
| 1022 | } |
| 1023 | |
| 1024 | /* We now use the "submit_command" function to submit commands to |
| 1025 | the firestream. There is a define up near the definition of |
| 1026 | that routine that switches this routine between immediate write |
| 1027 | to the immediate comamnd registers and queuing the commands in |
| 1028 | the HPTXQ for execution. This last technique might be more |
| 1029 | efficient if we know we're going to submit a whole lot of |
| 1030 | commands in one go, but this driver is not setup to be able to |
| 1031 | use such a construct. So it probably doen't matter much right |
| 1032 | now. -- REW */ |
| 1033 | |
| 1034 | /* The command is IMMediate and INQueue. The parameters are out-of-line.. */ |
| 1035 | submit_command (dev, &dev->hp_txq, |
| 1036 | QE_CMD_CONFIG_TX | QE_CMD_IMM_INQ | vcc->channo, |
| 1037 | virt_to_bus (tc), 0, 0); |
| 1038 | |
| 1039 | submit_command (dev, &dev->hp_txq, |
| 1040 | QE_CMD_TX_EN | QE_CMD_IMM_INQ | vcc->channo, |
| 1041 | 0, 0, 0); |
| 1042 | set_bit (vcc->channo, dev->tx_inuse); |
| 1043 | } |
| 1044 | |
| 1045 | if (DO_DIRECTION (rxtp)) { |
| 1046 | dev->atm_vccs[vcc->channo] = atm_vcc; |
| 1047 | |
| 1048 | for (bfp = 0;bfp < FS_NR_FREE_POOLS; bfp++) |
| 1049 | if (atm_vcc->qos.rxtp.max_sdu <= dev->rx_fp[bfp].bufsize) break; |
| 1050 | if (bfp >= FS_NR_FREE_POOLS) { |
| 1051 | fs_dprintk (FS_DEBUG_OPEN, "No free pool fits sdu: %d.\n", |
| 1052 | atm_vcc->qos.rxtp.max_sdu); |
| 1053 | /* XXX Cleanup? -- Would just calling fs_close work??? -- REW */ |
| 1054 | |
| 1055 | /* XXX clear tx inuse. Close TX part? */ |
| 1056 | dev->atm_vccs[vcc->channo] = NULL; |
| 1057 | kfree (vcc); |
| 1058 | return -EINVAL; |
| 1059 | } |
| 1060 | |
| 1061 | switch (atm_vcc->qos.aal) { |
| 1062 | case ATM_AAL0: |
| 1063 | case ATM_AAL2: |
| 1064 | submit_command (dev, &dev->hp_txq, |
| 1065 | QE_CMD_CONFIG_RX | QE_CMD_IMM_INQ | vcc->channo, |
| 1066 | RC_FLAGS_TRANSP | |
| 1067 | RC_FLAGS_BFPS_BFP * bfp | |
| 1068 | RC_FLAGS_RXBM_PSB, 0, 0); |
| 1069 | break; |
| 1070 | case ATM_AAL5: |
| 1071 | submit_command (dev, &dev->hp_txq, |
| 1072 | QE_CMD_CONFIG_RX | QE_CMD_IMM_INQ | vcc->channo, |
| 1073 | RC_FLAGS_AAL5 | |
| 1074 | RC_FLAGS_BFPS_BFP * bfp | |
| 1075 | RC_FLAGS_RXBM_PSB, 0, 0); |
| 1076 | break; |
| 1077 | }; |
| 1078 | if (IS_FS50 (dev)) { |
| 1079 | submit_command (dev, &dev->hp_txq, |
| 1080 | QE_CMD_REG_WR | QE_CMD_IMM_INQ, |
| 1081 | 0x80 + vcc->channo, |
| 1082 | (vpi << 16) | vci, 0 ); /* XXX -- Use defines. */ |
| 1083 | } |
| 1084 | submit_command (dev, &dev->hp_txq, |
| 1085 | QE_CMD_RX_EN | QE_CMD_IMM_INQ | vcc->channo, |
| 1086 | 0, 0, 0); |
| 1087 | } |
| 1088 | |
| 1089 | /* Indicate we're done! */ |
| 1090 | set_bit(ATM_VF_READY, &atm_vcc->flags); |
| 1091 | |
| 1092 | func_exit (); |
| 1093 | return 0; |
| 1094 | } |
| 1095 | |
| 1096 | |
| 1097 | static void fs_close(struct atm_vcc *atm_vcc) |
| 1098 | { |
| 1099 | struct fs_dev *dev = FS_DEV (atm_vcc->dev); |
| 1100 | struct fs_vcc *vcc = FS_VCC (atm_vcc); |
| 1101 | struct atm_trafprm * txtp; |
| 1102 | struct atm_trafprm * rxtp; |
| 1103 | |
| 1104 | func_enter (); |
| 1105 | |
| 1106 | clear_bit(ATM_VF_READY, &atm_vcc->flags); |
| 1107 | |
| 1108 | fs_dprintk (FS_DEBUG_QSIZE, "--==**[%d]**==--", dev->ntxpckts); |
| 1109 | if (vcc->last_skb) { |
| 1110 | fs_dprintk (FS_DEBUG_QUEUE, "Waiting for skb %p to be sent.\n", |
| 1111 | vcc->last_skb); |
| 1112 | /* We're going to wait for the last packet to get sent on this VC. It would |
| 1113 | be impolite not to send them don't you think? |
| 1114 | XXX |
| 1115 | We don't know which packets didn't get sent. So if we get interrupted in |
| 1116 | this sleep_on, we'll lose any reference to these packets. Memory leak! |
| 1117 | On the other hand, it's awfully convenient that we can abort a "close" that |
| 1118 | is taking too long. Maybe just use non-interruptible sleep on? -- REW */ |
| 1119 | interruptible_sleep_on (& vcc->close_wait); |
| 1120 | } |
| 1121 | |
| 1122 | txtp = &atm_vcc->qos.txtp; |
| 1123 | rxtp = &atm_vcc->qos.rxtp; |
| 1124 | |
| 1125 | |
| 1126 | /* See App note XXX (Unpublished as of now) for the reason for the |
| 1127 | removal of the "CMD_IMM_INQ" part of the TX_PURGE_INH... -- REW */ |
| 1128 | |
| 1129 | if (DO_DIRECTION (txtp)) { |
| 1130 | submit_command (dev, &dev->hp_txq, |
| 1131 | QE_CMD_TX_PURGE_INH | /*QE_CMD_IMM_INQ|*/ vcc->channo, 0,0,0); |
| 1132 | clear_bit (vcc->channo, dev->tx_inuse); |
| 1133 | } |
| 1134 | |
| 1135 | if (DO_DIRECTION (rxtp)) { |
| 1136 | submit_command (dev, &dev->hp_txq, |
| 1137 | QE_CMD_RX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0); |
| 1138 | dev->atm_vccs [vcc->channo] = NULL; |
| 1139 | |
| 1140 | /* This means that this is configured as a receive channel */ |
| 1141 | if (IS_FS50 (dev)) { |
| 1142 | /* Disable the receive filter. Is 0/0 indeed an invalid receive |
| 1143 | channel? -- REW. Yes it is. -- Hang. Ok. I'll use -1 |
| 1144 | (0xfff...) -- REW */ |
| 1145 | submit_command (dev, &dev->hp_txq, |
| 1146 | QE_CMD_REG_WR | QE_CMD_IMM_INQ, |
| 1147 | 0x80 + vcc->channo, -1, 0 ); |
| 1148 | } |
| 1149 | } |
| 1150 | |
| 1151 | fs_dprintk (FS_DEBUG_ALLOC, "Free vcc: %p\n", vcc); |
| 1152 | kfree (vcc); |
| 1153 | |
| 1154 | func_exit (); |
| 1155 | } |
| 1156 | |
| 1157 | |
| 1158 | static int fs_send (struct atm_vcc *atm_vcc, struct sk_buff *skb) |
| 1159 | { |
| 1160 | struct fs_dev *dev = FS_DEV (atm_vcc->dev); |
| 1161 | struct fs_vcc *vcc = FS_VCC (atm_vcc); |
| 1162 | struct FS_BPENTRY *td; |
| 1163 | |
| 1164 | func_enter (); |
| 1165 | |
| 1166 | fs_dprintk (FS_DEBUG_TXMEM, "I"); |
| 1167 | fs_dprintk (FS_DEBUG_SEND, "Send: atm_vcc %p skb %p vcc %p dev %p\n", |
| 1168 | atm_vcc, skb, vcc, dev); |
| 1169 | |
| 1170 | fs_dprintk (FS_DEBUG_ALLOC, "Alloc t-skb: %p (atm_send)\n", skb); |
| 1171 | |
| 1172 | ATM_SKB(skb)->vcc = atm_vcc; |
| 1173 | |
| 1174 | vcc->last_skb = skb; |
| 1175 | |
| 1176 | td = kmalloc (sizeof (struct FS_BPENTRY), GFP_ATOMIC); |
| 1177 | fs_dprintk (FS_DEBUG_ALLOC, "Alloc transd: %p(%Zd)\n", td, sizeof (struct FS_BPENTRY)); |
| 1178 | if (!td) { |
| 1179 | /* Oops out of mem */ |
| 1180 | return -ENOMEM; |
| 1181 | } |
| 1182 | |
| 1183 | fs_dprintk (FS_DEBUG_SEND, "first word in buffer: %x\n", |
| 1184 | *(int *) skb->data); |
| 1185 | |
| 1186 | td->flags = TD_EPI | TD_DATA | skb->len; |
| 1187 | td->next = 0; |
| 1188 | td->bsa = virt_to_bus (skb->data); |
| 1189 | td->skb = skb; |
| 1190 | td->dev = dev; |
| 1191 | dev->ntxpckts++; |
| 1192 | |
| 1193 | #ifdef DEBUG_EXTRA |
| 1194 | da[qd] = td; |
| 1195 | dq[qd].flags = td->flags; |
| 1196 | dq[qd].next = td->next; |
| 1197 | dq[qd].bsa = td->bsa; |
| 1198 | dq[qd].skb = td->skb; |
| 1199 | dq[qd].dev = td->dev; |
| 1200 | qd++; |
| 1201 | if (qd >= 60) qd = 0; |
| 1202 | #endif |
| 1203 | |
| 1204 | submit_queue (dev, &dev->hp_txq, |
| 1205 | QE_TRANSMIT_DE | vcc->channo, |
| 1206 | virt_to_bus (td), 0, |
| 1207 | virt_to_bus (td)); |
| 1208 | |
| 1209 | fs_dprintk (FS_DEBUG_QUEUE, "in send: txq %d txrq %d\n", |
| 1210 | read_fs (dev, Q_EA (dev->hp_txq.offset)) - |
| 1211 | read_fs (dev, Q_SA (dev->hp_txq.offset)), |
| 1212 | read_fs (dev, Q_EA (dev->tx_relq.offset)) - |
| 1213 | read_fs (dev, Q_SA (dev->tx_relq.offset))); |
| 1214 | |
| 1215 | func_exit (); |
| 1216 | return 0; |
| 1217 | } |
| 1218 | |
| 1219 | |
| 1220 | /* Some function placeholders for functions we don't yet support. */ |
| 1221 | |
| 1222 | #if 0 |
| 1223 | static int fs_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg) |
| 1224 | { |
| 1225 | func_enter (); |
| 1226 | func_exit (); |
| 1227 | return -ENOIOCTLCMD; |
| 1228 | } |
| 1229 | |
| 1230 | |
| 1231 | static int fs_getsockopt(struct atm_vcc *vcc,int level,int optname, |
| 1232 | void __user *optval,int optlen) |
| 1233 | { |
| 1234 | func_enter (); |
| 1235 | func_exit (); |
| 1236 | return 0; |
| 1237 | } |
| 1238 | |
| 1239 | |
| 1240 | static int fs_setsockopt(struct atm_vcc *vcc,int level,int optname, |
| 1241 | void __user *optval,int optlen) |
| 1242 | { |
| 1243 | func_enter (); |
| 1244 | func_exit (); |
| 1245 | return 0; |
| 1246 | } |
| 1247 | |
| 1248 | |
| 1249 | static void fs_phy_put(struct atm_dev *dev,unsigned char value, |
| 1250 | unsigned long addr) |
| 1251 | { |
| 1252 | func_enter (); |
| 1253 | func_exit (); |
| 1254 | } |
| 1255 | |
| 1256 | |
| 1257 | static unsigned char fs_phy_get(struct atm_dev *dev,unsigned long addr) |
| 1258 | { |
| 1259 | func_enter (); |
| 1260 | func_exit (); |
| 1261 | return 0; |
| 1262 | } |
| 1263 | |
| 1264 | |
| 1265 | static int fs_change_qos(struct atm_vcc *vcc,struct atm_qos *qos,int flags) |
| 1266 | { |
| 1267 | func_enter (); |
| 1268 | func_exit (); |
| 1269 | return 0; |
| 1270 | }; |
| 1271 | |
| 1272 | #endif |
| 1273 | |
| 1274 | |
| 1275 | static const struct atmdev_ops ops = { |
| 1276 | .open = fs_open, |
| 1277 | .close = fs_close, |
| 1278 | .send = fs_send, |
| 1279 | .owner = THIS_MODULE, |
| 1280 | /* ioctl: fs_ioctl, */ |
| 1281 | /* getsockopt: fs_getsockopt, */ |
| 1282 | /* setsockopt: fs_setsockopt, */ |
| 1283 | /* change_qos: fs_change_qos, */ |
| 1284 | |
| 1285 | /* For now implement these internally here... */ |
| 1286 | /* phy_put: fs_phy_put, */ |
| 1287 | /* phy_get: fs_phy_get, */ |
| 1288 | }; |
| 1289 | |
| 1290 | |
| 1291 | static void __devinit undocumented_pci_fix (struct pci_dev *pdev) |
| 1292 | { |
| 1293 | int tint; |
| 1294 | |
| 1295 | /* The Windows driver says: */ |
| 1296 | /* Switch off FireStream Retry Limit Threshold |
| 1297 | */ |
| 1298 | |
| 1299 | /* The register at 0x28 is documented as "reserved", no further |
| 1300 | comments. */ |
| 1301 | |
| 1302 | pci_read_config_dword (pdev, 0x28, &tint); |
| 1303 | if (tint != 0x80) { |
| 1304 | tint = 0x80; |
| 1305 | pci_write_config_dword (pdev, 0x28, tint); |
| 1306 | } |
| 1307 | } |
| 1308 | |
| 1309 | |
| 1310 | |
| 1311 | /************************************************************************** |
| 1312 | * PHY routines * |
| 1313 | **************************************************************************/ |
| 1314 | |
| 1315 | static void __devinit write_phy (struct fs_dev *dev, int regnum, int val) |
| 1316 | { |
| 1317 | submit_command (dev, &dev->hp_txq, QE_CMD_PRP_WR | QE_CMD_IMM_INQ, |
| 1318 | regnum, val, 0); |
| 1319 | } |
| 1320 | |
| 1321 | static int __devinit init_phy (struct fs_dev *dev, struct reginit_item *reginit) |
| 1322 | { |
| 1323 | int i; |
| 1324 | |
| 1325 | func_enter (); |
| 1326 | while (reginit->reg != PHY_EOF) { |
| 1327 | if (reginit->reg == PHY_CLEARALL) { |
| 1328 | /* "PHY_CLEARALL means clear all registers. Numregisters is in "val". */ |
| 1329 | for (i=0;i<reginit->val;i++) { |
| 1330 | write_phy (dev, i, 0); |
| 1331 | } |
| 1332 | } else { |
| 1333 | write_phy (dev, reginit->reg, reginit->val); |
| 1334 | } |
| 1335 | reginit++; |
| 1336 | } |
| 1337 | func_exit (); |
| 1338 | return 0; |
| 1339 | } |
| 1340 | |
| 1341 | static void reset_chip (struct fs_dev *dev) |
| 1342 | { |
| 1343 | int i; |
| 1344 | |
| 1345 | write_fs (dev, SARMODE0, SARMODE0_SRTS0); |
| 1346 | |
| 1347 | /* Undocumented delay */ |
| 1348 | udelay (128); |
| 1349 | |
| 1350 | /* The "internal registers are documented to all reset to zero, but |
| 1351 | comments & code in the Windows driver indicates that the pools are |
| 1352 | NOT reset. */ |
| 1353 | for (i=0;i < FS_NR_FREE_POOLS;i++) { |
| 1354 | write_fs (dev, FP_CNF (RXB_FP(i)), 0); |
| 1355 | write_fs (dev, FP_SA (RXB_FP(i)), 0); |
| 1356 | write_fs (dev, FP_EA (RXB_FP(i)), 0); |
| 1357 | write_fs (dev, FP_CNT (RXB_FP(i)), 0); |
| 1358 | write_fs (dev, FP_CTU (RXB_FP(i)), 0); |
| 1359 | } |
| 1360 | |
| 1361 | /* The same goes for the match channel registers, although those are |
| 1362 | NOT documented that way in the Windows driver. -- REW */ |
| 1363 | /* The Windows driver DOES write 0 to these registers somewhere in |
| 1364 | the init sequence. However, a small hardware-feature, will |
| 1365 | prevent reception of data on VPI/VCI = 0/0 (Unless the channel |
| 1366 | allocated happens to have no disabled channels that have a lower |
| 1367 | number. -- REW */ |
| 1368 | |
| 1369 | /* Clear the match channel registers. */ |
| 1370 | if (IS_FS50 (dev)) { |
| 1371 | for (i=0;i<FS50_NR_CHANNELS;i++) { |
| 1372 | write_fs (dev, 0x200 + i * 4, -1); |
| 1373 | } |
| 1374 | } |
| 1375 | } |
| 1376 | |
Victor Fusco | c9e4261 | 2005-07-19 13:56:01 -0700 | [diff] [blame^] | 1377 | static void __devinit *aligned_kmalloc (int size, unsigned int __nocast flags, |
| 1378 | int alignment) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1379 | { |
| 1380 | void *t; |
| 1381 | |
| 1382 | if (alignment <= 0x10) { |
| 1383 | t = kmalloc (size, flags); |
| 1384 | if ((unsigned long)t & (alignment-1)) { |
| 1385 | printk ("Kmalloc doesn't align things correctly! %p\n", t); |
| 1386 | kfree (t); |
| 1387 | return aligned_kmalloc (size, flags, alignment * 4); |
| 1388 | } |
| 1389 | return t; |
| 1390 | } |
| 1391 | printk (KERN_ERR "Request for > 0x10 alignment not yet implemented (hard!)\n"); |
| 1392 | return NULL; |
| 1393 | } |
| 1394 | |
| 1395 | static int __devinit init_q (struct fs_dev *dev, |
| 1396 | struct queue *txq, int queue, int nentries, int is_rq) |
| 1397 | { |
| 1398 | int sz = nentries * sizeof (struct FS_QENTRY); |
| 1399 | struct FS_QENTRY *p; |
| 1400 | |
| 1401 | func_enter (); |
| 1402 | |
| 1403 | fs_dprintk (FS_DEBUG_INIT, "Inititing queue at %x: %d entries:\n", |
| 1404 | queue, nentries); |
| 1405 | |
| 1406 | p = aligned_kmalloc (sz, GFP_KERNEL, 0x10); |
| 1407 | fs_dprintk (FS_DEBUG_ALLOC, "Alloc queue: %p(%d)\n", p, sz); |
| 1408 | |
| 1409 | if (!p) return 0; |
| 1410 | |
| 1411 | write_fs (dev, Q_SA(queue), virt_to_bus(p)); |
| 1412 | write_fs (dev, Q_EA(queue), virt_to_bus(p+nentries-1)); |
| 1413 | write_fs (dev, Q_WP(queue), virt_to_bus(p)); |
| 1414 | write_fs (dev, Q_RP(queue), virt_to_bus(p)); |
| 1415 | if (is_rq) { |
| 1416 | /* Configuration for the receive queue: 0: interrupt immediately, |
| 1417 | no pre-warning to empty queues: We do our best to keep the |
| 1418 | queue filled anyway. */ |
| 1419 | write_fs (dev, Q_CNF(queue), 0 ); |
| 1420 | } |
| 1421 | |
| 1422 | txq->sa = p; |
| 1423 | txq->ea = p; |
| 1424 | txq->offset = queue; |
| 1425 | |
| 1426 | func_exit (); |
| 1427 | return 1; |
| 1428 | } |
| 1429 | |
| 1430 | |
| 1431 | static int __devinit init_fp (struct fs_dev *dev, |
| 1432 | struct freepool *fp, int queue, int bufsize, int nr_buffers) |
| 1433 | { |
| 1434 | func_enter (); |
| 1435 | |
| 1436 | fs_dprintk (FS_DEBUG_INIT, "Inititing free pool at %x:\n", queue); |
| 1437 | |
| 1438 | write_fs (dev, FP_CNF(queue), (bufsize * RBFP_RBS) | RBFP_RBSVAL | RBFP_CME); |
| 1439 | write_fs (dev, FP_SA(queue), 0); |
| 1440 | write_fs (dev, FP_EA(queue), 0); |
| 1441 | write_fs (dev, FP_CTU(queue), 0); |
| 1442 | write_fs (dev, FP_CNT(queue), 0); |
| 1443 | |
| 1444 | fp->offset = queue; |
| 1445 | fp->bufsize = bufsize; |
| 1446 | fp->nr_buffers = nr_buffers; |
| 1447 | |
| 1448 | func_exit (); |
| 1449 | return 1; |
| 1450 | } |
| 1451 | |
| 1452 | |
| 1453 | static inline int nr_buffers_in_freepool (struct fs_dev *dev, struct freepool *fp) |
| 1454 | { |
| 1455 | #if 0 |
| 1456 | /* This seems to be unreliable.... */ |
| 1457 | return read_fs (dev, FP_CNT (fp->offset)); |
| 1458 | #else |
| 1459 | return fp->n; |
| 1460 | #endif |
| 1461 | } |
| 1462 | |
| 1463 | |
| 1464 | /* Check if this gets going again if a pool ever runs out. -- Yes, it |
| 1465 | does. I've seen "receive abort: no buffers" and things started |
| 1466 | working again after that... -- REW */ |
| 1467 | |
Victor Fusco | c9e4261 | 2005-07-19 13:56:01 -0700 | [diff] [blame^] | 1468 | static void top_off_fp (struct fs_dev *dev, struct freepool *fp, |
| 1469 | unsigned int __nocast gfp_flags) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1470 | { |
| 1471 | struct FS_BPENTRY *qe, *ne; |
| 1472 | struct sk_buff *skb; |
| 1473 | int n = 0; |
| 1474 | |
| 1475 | fs_dprintk (FS_DEBUG_QUEUE, "Topping off queue at %x (%d-%d/%d)\n", |
| 1476 | fp->offset, read_fs (dev, FP_CNT (fp->offset)), fp->n, |
| 1477 | fp->nr_buffers); |
| 1478 | while (nr_buffers_in_freepool(dev, fp) < fp->nr_buffers) { |
| 1479 | |
| 1480 | skb = alloc_skb (fp->bufsize, gfp_flags); |
| 1481 | fs_dprintk (FS_DEBUG_ALLOC, "Alloc rec-skb: %p(%d)\n", skb, fp->bufsize); |
| 1482 | if (!skb) break; |
| 1483 | ne = kmalloc (sizeof (struct FS_BPENTRY), gfp_flags); |
| 1484 | fs_dprintk (FS_DEBUG_ALLOC, "Alloc rec-d: %p(%Zd)\n", ne, sizeof (struct FS_BPENTRY)); |
| 1485 | if (!ne) { |
| 1486 | fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", skb); |
| 1487 | dev_kfree_skb_any (skb); |
| 1488 | break; |
| 1489 | } |
| 1490 | |
| 1491 | fs_dprintk (FS_DEBUG_QUEUE, "Adding skb %p desc %p -> %p(%p) ", |
| 1492 | skb, ne, skb->data, skb->head); |
| 1493 | n++; |
| 1494 | ne->flags = FP_FLAGS_EPI | fp->bufsize; |
| 1495 | ne->next = virt_to_bus (NULL); |
| 1496 | ne->bsa = virt_to_bus (skb->data); |
| 1497 | ne->aal_bufsize = fp->bufsize; |
| 1498 | ne->skb = skb; |
| 1499 | ne->fp = fp; |
| 1500 | |
| 1501 | qe = (struct FS_BPENTRY *) (read_fs (dev, FP_EA(fp->offset))); |
| 1502 | fs_dprintk (FS_DEBUG_QUEUE, "link at %p\n", qe); |
| 1503 | if (qe) { |
| 1504 | qe = bus_to_virt ((long) qe); |
| 1505 | qe->next = virt_to_bus(ne); |
| 1506 | qe->flags &= ~FP_FLAGS_EPI; |
| 1507 | } else |
| 1508 | write_fs (dev, FP_SA(fp->offset), virt_to_bus(ne)); |
| 1509 | |
| 1510 | write_fs (dev, FP_EA(fp->offset), virt_to_bus (ne)); |
| 1511 | fp->n++; /* XXX Atomic_inc? */ |
| 1512 | write_fs (dev, FP_CTU(fp->offset), 1); |
| 1513 | } |
| 1514 | |
| 1515 | fs_dprintk (FS_DEBUG_QUEUE, "Added %d entries. \n", n); |
| 1516 | } |
| 1517 | |
| 1518 | static void __devexit free_queue (struct fs_dev *dev, struct queue *txq) |
| 1519 | { |
| 1520 | func_enter (); |
| 1521 | |
| 1522 | write_fs (dev, Q_SA(txq->offset), 0); |
| 1523 | write_fs (dev, Q_EA(txq->offset), 0); |
| 1524 | write_fs (dev, Q_RP(txq->offset), 0); |
| 1525 | write_fs (dev, Q_WP(txq->offset), 0); |
| 1526 | /* Configuration ? */ |
| 1527 | |
| 1528 | fs_dprintk (FS_DEBUG_ALLOC, "Free queue: %p\n", txq->sa); |
| 1529 | kfree (txq->sa); |
| 1530 | |
| 1531 | func_exit (); |
| 1532 | } |
| 1533 | |
| 1534 | static void __devexit free_freepool (struct fs_dev *dev, struct freepool *fp) |
| 1535 | { |
| 1536 | func_enter (); |
| 1537 | |
| 1538 | write_fs (dev, FP_CNF(fp->offset), 0); |
| 1539 | write_fs (dev, FP_SA (fp->offset), 0); |
| 1540 | write_fs (dev, FP_EA (fp->offset), 0); |
| 1541 | write_fs (dev, FP_CNT(fp->offset), 0); |
| 1542 | write_fs (dev, FP_CTU(fp->offset), 0); |
| 1543 | |
| 1544 | func_exit (); |
| 1545 | } |
| 1546 | |
| 1547 | |
| 1548 | |
| 1549 | static irqreturn_t fs_irq (int irq, void *dev_id, struct pt_regs * pt_regs) |
| 1550 | { |
| 1551 | int i; |
| 1552 | u32 status; |
| 1553 | struct fs_dev *dev = dev_id; |
| 1554 | |
| 1555 | status = read_fs (dev, ISR); |
| 1556 | if (!status) |
| 1557 | return IRQ_NONE; |
| 1558 | |
| 1559 | func_enter (); |
| 1560 | |
| 1561 | #ifdef IRQ_RATE_LIMIT |
| 1562 | /* Aaargh! I'm ashamed. This costs more lines-of-code than the actual |
| 1563 | interrupt routine!. (Well, used to when I wrote that comment) -- REW */ |
| 1564 | { |
| 1565 | static int lastjif; |
| 1566 | static int nintr=0; |
| 1567 | |
| 1568 | if (lastjif == jiffies) { |
| 1569 | if (++nintr > IRQ_RATE_LIMIT) { |
| 1570 | free_irq (dev->irq, dev_id); |
| 1571 | printk (KERN_ERR "fs: Too many interrupts. Turning off interrupt %d.\n", |
| 1572 | dev->irq); |
| 1573 | } |
| 1574 | } else { |
| 1575 | lastjif = jiffies; |
| 1576 | nintr = 0; |
| 1577 | } |
| 1578 | } |
| 1579 | #endif |
| 1580 | fs_dprintk (FS_DEBUG_QUEUE, "in intr: txq %d txrq %d\n", |
| 1581 | read_fs (dev, Q_EA (dev->hp_txq.offset)) - |
| 1582 | read_fs (dev, Q_SA (dev->hp_txq.offset)), |
| 1583 | read_fs (dev, Q_EA (dev->tx_relq.offset)) - |
| 1584 | read_fs (dev, Q_SA (dev->tx_relq.offset))); |
| 1585 | |
| 1586 | /* print the bits in the ISR register. */ |
| 1587 | if (fs_debug & FS_DEBUG_IRQ) { |
| 1588 | /* The FS_DEBUG things are unneccesary here. But this way it is |
| 1589 | clear for grep that these are debug prints. */ |
| 1590 | fs_dprintk (FS_DEBUG_IRQ, "IRQ status:"); |
| 1591 | for (i=0;i<27;i++) |
| 1592 | if (status & (1 << i)) |
| 1593 | fs_dprintk (FS_DEBUG_IRQ, " %s", irq_bitname[i]); |
| 1594 | fs_dprintk (FS_DEBUG_IRQ, "\n"); |
| 1595 | } |
| 1596 | |
| 1597 | if (status & ISR_RBRQ0_W) { |
| 1598 | fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (0)!!!!\n"); |
| 1599 | process_incoming (dev, &dev->rx_rq[0]); |
| 1600 | /* items mentioned on RBRQ0 are from FP 0 or 1. */ |
| 1601 | top_off_fp (dev, &dev->rx_fp[0], GFP_ATOMIC); |
| 1602 | top_off_fp (dev, &dev->rx_fp[1], GFP_ATOMIC); |
| 1603 | } |
| 1604 | |
| 1605 | if (status & ISR_RBRQ1_W) { |
| 1606 | fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (1)!!!!\n"); |
| 1607 | process_incoming (dev, &dev->rx_rq[1]); |
| 1608 | top_off_fp (dev, &dev->rx_fp[2], GFP_ATOMIC); |
| 1609 | top_off_fp (dev, &dev->rx_fp[3], GFP_ATOMIC); |
| 1610 | } |
| 1611 | |
| 1612 | if (status & ISR_RBRQ2_W) { |
| 1613 | fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (2)!!!!\n"); |
| 1614 | process_incoming (dev, &dev->rx_rq[2]); |
| 1615 | top_off_fp (dev, &dev->rx_fp[4], GFP_ATOMIC); |
| 1616 | top_off_fp (dev, &dev->rx_fp[5], GFP_ATOMIC); |
| 1617 | } |
| 1618 | |
| 1619 | if (status & ISR_RBRQ3_W) { |
| 1620 | fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (3)!!!!\n"); |
| 1621 | process_incoming (dev, &dev->rx_rq[3]); |
| 1622 | top_off_fp (dev, &dev->rx_fp[6], GFP_ATOMIC); |
| 1623 | top_off_fp (dev, &dev->rx_fp[7], GFP_ATOMIC); |
| 1624 | } |
| 1625 | |
| 1626 | if (status & ISR_CSQ_W) { |
| 1627 | fs_dprintk (FS_DEBUG_IRQ, "Command executed ok!\n"); |
| 1628 | process_return_queue (dev, &dev->st_q); |
| 1629 | } |
| 1630 | |
| 1631 | if (status & ISR_TBRQ_W) { |
| 1632 | fs_dprintk (FS_DEBUG_IRQ, "Data tramsitted!\n"); |
| 1633 | process_txdone_queue (dev, &dev->tx_relq); |
| 1634 | } |
| 1635 | |
| 1636 | func_exit (); |
| 1637 | return IRQ_HANDLED; |
| 1638 | } |
| 1639 | |
| 1640 | |
| 1641 | #ifdef FS_POLL_FREQ |
| 1642 | static void fs_poll (unsigned long data) |
| 1643 | { |
| 1644 | struct fs_dev *dev = (struct fs_dev *) data; |
| 1645 | |
| 1646 | fs_irq (0, dev, NULL); |
| 1647 | dev->timer.expires = jiffies + FS_POLL_FREQ; |
| 1648 | add_timer (&dev->timer); |
| 1649 | } |
| 1650 | #endif |
| 1651 | |
| 1652 | static int __devinit fs_init (struct fs_dev *dev) |
| 1653 | { |
| 1654 | struct pci_dev *pci_dev; |
| 1655 | int isr, to; |
| 1656 | int i; |
| 1657 | |
| 1658 | func_enter (); |
| 1659 | pci_dev = dev->pci_dev; |
| 1660 | |
| 1661 | printk (KERN_INFO "found a FireStream %d card, base %08lx, irq%d.\n", |
| 1662 | IS_FS50(dev)?50:155, |
| 1663 | pci_resource_start(pci_dev, 0), dev->pci_dev->irq); |
| 1664 | |
| 1665 | if (fs_debug & FS_DEBUG_INIT) |
| 1666 | my_hd ((unsigned char *) dev, sizeof (*dev)); |
| 1667 | |
| 1668 | undocumented_pci_fix (pci_dev); |
| 1669 | |
| 1670 | dev->hw_base = pci_resource_start(pci_dev, 0); |
| 1671 | |
| 1672 | dev->base = ioremap(dev->hw_base, 0x1000); |
| 1673 | |
| 1674 | reset_chip (dev); |
| 1675 | |
| 1676 | write_fs (dev, SARMODE0, 0 |
| 1677 | | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */ |
| 1678 | | (1 * SARMODE0_INTMODE_READCLEAR) |
| 1679 | | (1 * SARMODE0_CWRE) |
| 1680 | | IS_FS50(dev)?SARMODE0_PRPWT_FS50_5: |
| 1681 | SARMODE0_PRPWT_FS155_3 |
| 1682 | | (1 * SARMODE0_CALSUP_1) |
| 1683 | | IS_FS50 (dev)?(0 |
| 1684 | | SARMODE0_RXVCS_32 |
| 1685 | | SARMODE0_ABRVCS_32 |
| 1686 | | SARMODE0_TXVCS_32): |
| 1687 | (0 |
| 1688 | | SARMODE0_RXVCS_1k |
| 1689 | | SARMODE0_ABRVCS_1k |
| 1690 | | SARMODE0_TXVCS_1k)); |
| 1691 | |
| 1692 | /* 10ms * 100 is 1 second. That should be enough, as AN3:9 says it takes |
| 1693 | 1ms. */ |
| 1694 | to = 100; |
| 1695 | while (--to) { |
| 1696 | isr = read_fs (dev, ISR); |
| 1697 | |
| 1698 | /* This bit is documented as "RESERVED" */ |
| 1699 | if (isr & ISR_INIT_ERR) { |
| 1700 | printk (KERN_ERR "Error initializing the FS... \n"); |
| 1701 | return 1; |
| 1702 | } |
| 1703 | if (isr & ISR_INIT) { |
| 1704 | fs_dprintk (FS_DEBUG_INIT, "Ha! Initialized OK!\n"); |
| 1705 | break; |
| 1706 | } |
| 1707 | |
| 1708 | /* Try again after 10ms. */ |
| 1709 | msleep(10); |
| 1710 | } |
| 1711 | |
| 1712 | if (!to) { |
| 1713 | printk (KERN_ERR "timeout initializing the FS... \n"); |
| 1714 | return 1; |
| 1715 | } |
| 1716 | |
| 1717 | /* XXX fix for fs155 */ |
| 1718 | dev->channel_mask = 0x1f; |
| 1719 | dev->channo = 0; |
| 1720 | |
| 1721 | /* AN3: 10 */ |
| 1722 | write_fs (dev, SARMODE1, 0 |
| 1723 | | (fs_keystream * SARMODE1_DEFHEC) /* XXX PHY */ |
| 1724 | | ((loopback == 1) * SARMODE1_TSTLP) /* XXX Loopback mode enable... */ |
| 1725 | | (1 * SARMODE1_DCRM) |
| 1726 | | (1 * SARMODE1_DCOAM) |
| 1727 | | (0 * SARMODE1_OAMCRC) |
| 1728 | | (0 * SARMODE1_DUMPE) |
| 1729 | | (0 * SARMODE1_GPLEN) |
| 1730 | | (0 * SARMODE1_GNAM) |
| 1731 | | (0 * SARMODE1_GVAS) |
| 1732 | | (0 * SARMODE1_GPAS) |
| 1733 | | (1 * SARMODE1_GPRI) |
| 1734 | | (0 * SARMODE1_PMS) |
| 1735 | | (0 * SARMODE1_GFCR) |
| 1736 | | (1 * SARMODE1_HECM2) |
| 1737 | | (1 * SARMODE1_HECM1) |
| 1738 | | (1 * SARMODE1_HECM0) |
| 1739 | | (1 << 12) /* That's what hang's driver does. Program to 0 */ |
| 1740 | | (0 * 0xff) /* XXX FS155 */); |
| 1741 | |
| 1742 | |
| 1743 | /* Cal prescale etc */ |
| 1744 | |
| 1745 | /* AN3: 11 */ |
| 1746 | write_fs (dev, TMCONF, 0x0000000f); |
| 1747 | write_fs (dev, CALPRESCALE, 0x01010101 * num); |
| 1748 | write_fs (dev, 0x80, 0x000F00E4); |
| 1749 | |
| 1750 | /* AN3: 12 */ |
| 1751 | write_fs (dev, CELLOSCONF, 0 |
| 1752 | | ( 0 * CELLOSCONF_CEN) |
| 1753 | | ( CELLOSCONF_SC1) |
| 1754 | | (0x80 * CELLOSCONF_COBS) |
| 1755 | | (num * CELLOSCONF_COPK) /* Changed from 0xff to 0x5a */ |
| 1756 | | (num * CELLOSCONF_COST));/* after a hint from Hang. |
| 1757 | * performance jumped 50->70... */ |
| 1758 | |
| 1759 | /* Magic value by Hang */ |
| 1760 | write_fs (dev, CELLOSCONF_COST, 0x0B809191); |
| 1761 | |
| 1762 | if (IS_FS50 (dev)) { |
| 1763 | write_fs (dev, RAS0, RAS0_DCD_XHLT); |
| 1764 | dev->atm_dev->ci_range.vpi_bits = 12; |
| 1765 | dev->atm_dev->ci_range.vci_bits = 16; |
| 1766 | dev->nchannels = FS50_NR_CHANNELS; |
| 1767 | } else { |
| 1768 | write_fs (dev, RAS0, RAS0_DCD_XHLT |
| 1769 | | (((1 << FS155_VPI_BITS) - 1) * RAS0_VPSEL) |
| 1770 | | (((1 << FS155_VCI_BITS) - 1) * RAS0_VCSEL)); |
| 1771 | /* We can chose the split arbitarily. We might be able to |
| 1772 | support more. Whatever. This should do for now. */ |
| 1773 | dev->atm_dev->ci_range.vpi_bits = FS155_VPI_BITS; |
| 1774 | dev->atm_dev->ci_range.vci_bits = FS155_VCI_BITS; |
| 1775 | |
| 1776 | /* Address bits we can't use should be compared to 0. */ |
| 1777 | write_fs (dev, RAC, 0); |
| 1778 | |
| 1779 | /* Manual (AN9, page 6) says ASF1=0 means compare Utopia address |
| 1780 | * too. I can't find ASF1 anywhere. Anyway, we AND with just the |
| 1781 | * other bits, then compare with 0, which is exactly what we |
| 1782 | * want. */ |
| 1783 | write_fs (dev, RAM, (1 << (28 - FS155_VPI_BITS - FS155_VCI_BITS)) - 1); |
| 1784 | dev->nchannels = FS155_NR_CHANNELS; |
| 1785 | } |
| 1786 | dev->atm_vccs = kmalloc (dev->nchannels * sizeof (struct atm_vcc *), |
| 1787 | GFP_KERNEL); |
| 1788 | fs_dprintk (FS_DEBUG_ALLOC, "Alloc atmvccs: %p(%Zd)\n", |
| 1789 | dev->atm_vccs, dev->nchannels * sizeof (struct atm_vcc *)); |
| 1790 | |
| 1791 | if (!dev->atm_vccs) { |
| 1792 | printk (KERN_WARNING "Couldn't allocate memory for VCC buffers. Woops!\n"); |
| 1793 | /* XXX Clean up..... */ |
| 1794 | return 1; |
| 1795 | } |
| 1796 | memset (dev->atm_vccs, 0, dev->nchannels * sizeof (struct atm_vcc *)); |
| 1797 | |
| 1798 | dev->tx_inuse = kmalloc (dev->nchannels / 8 /* bits/byte */ , GFP_KERNEL); |
| 1799 | fs_dprintk (FS_DEBUG_ALLOC, "Alloc tx_inuse: %p(%d)\n", |
| 1800 | dev->atm_vccs, dev->nchannels / 8); |
| 1801 | |
| 1802 | if (!dev->tx_inuse) { |
| 1803 | printk (KERN_WARNING "Couldn't allocate memory for tx_inuse bits!\n"); |
| 1804 | /* XXX Clean up..... */ |
| 1805 | return 1; |
| 1806 | } |
| 1807 | memset (dev->tx_inuse, 0, dev->nchannels / 8); |
| 1808 | |
| 1809 | /* -- RAS1 : FS155 and 50 differ. Default (0) should be OK for both */ |
| 1810 | /* -- RAS2 : FS50 only: Default is OK. */ |
| 1811 | |
| 1812 | /* DMAMODE, default should be OK. -- REW */ |
| 1813 | write_fs (dev, DMAMR, DMAMR_TX_MODE_FULL); |
| 1814 | |
| 1815 | init_q (dev, &dev->hp_txq, TX_PQ(TXQ_HP), TXQ_NENTRIES, 0); |
| 1816 | init_q (dev, &dev->lp_txq, TX_PQ(TXQ_LP), TXQ_NENTRIES, 0); |
| 1817 | init_q (dev, &dev->tx_relq, TXB_RQ, TXQ_NENTRIES, 1); |
| 1818 | init_q (dev, &dev->st_q, ST_Q, TXQ_NENTRIES, 1); |
| 1819 | |
| 1820 | for (i=0;i < FS_NR_FREE_POOLS;i++) { |
| 1821 | init_fp (dev, &dev->rx_fp[i], RXB_FP(i), |
| 1822 | rx_buf_sizes[i], rx_pool_sizes[i]); |
| 1823 | top_off_fp (dev, &dev->rx_fp[i], GFP_KERNEL); |
| 1824 | } |
| 1825 | |
| 1826 | |
| 1827 | for (i=0;i < FS_NR_RX_QUEUES;i++) |
| 1828 | init_q (dev, &dev->rx_rq[i], RXB_RQ(i), RXRQ_NENTRIES, 1); |
| 1829 | |
| 1830 | dev->irq = pci_dev->irq; |
| 1831 | if (request_irq (dev->irq, fs_irq, SA_SHIRQ, "firestream", dev)) { |
| 1832 | printk (KERN_WARNING "couldn't get irq %d for firestream.\n", pci_dev->irq); |
| 1833 | /* XXX undo all previous stuff... */ |
| 1834 | return 1; |
| 1835 | } |
| 1836 | fs_dprintk (FS_DEBUG_INIT, "Grabbed irq %d for dev at %p.\n", dev->irq, dev); |
| 1837 | |
| 1838 | /* We want to be notified of most things. Just the statistics count |
| 1839 | overflows are not interesting */ |
| 1840 | write_fs (dev, IMR, 0 |
| 1841 | | ISR_RBRQ0_W |
| 1842 | | ISR_RBRQ1_W |
| 1843 | | ISR_RBRQ2_W |
| 1844 | | ISR_RBRQ3_W |
| 1845 | | ISR_TBRQ_W |
| 1846 | | ISR_CSQ_W); |
| 1847 | |
| 1848 | write_fs (dev, SARMODE0, 0 |
| 1849 | | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */ |
| 1850 | | (1 * SARMODE0_GINT) |
| 1851 | | (1 * SARMODE0_INTMODE_READCLEAR) |
| 1852 | | (0 * SARMODE0_CWRE) |
| 1853 | | (IS_FS50(dev)?SARMODE0_PRPWT_FS50_5: |
| 1854 | SARMODE0_PRPWT_FS155_3) |
| 1855 | | (1 * SARMODE0_CALSUP_1) |
| 1856 | | (IS_FS50 (dev)?(0 |
| 1857 | | SARMODE0_RXVCS_32 |
| 1858 | | SARMODE0_ABRVCS_32 |
| 1859 | | SARMODE0_TXVCS_32): |
| 1860 | (0 |
| 1861 | | SARMODE0_RXVCS_1k |
| 1862 | | SARMODE0_ABRVCS_1k |
| 1863 | | SARMODE0_TXVCS_1k)) |
| 1864 | | (1 * SARMODE0_RUN)); |
| 1865 | |
| 1866 | init_phy (dev, PHY_NTC_INIT); |
| 1867 | |
| 1868 | if (loopback == 2) { |
| 1869 | write_phy (dev, 0x39, 0x000e); |
| 1870 | } |
| 1871 | |
| 1872 | #ifdef FS_POLL_FREQ |
| 1873 | init_timer (&dev->timer); |
| 1874 | dev->timer.data = (unsigned long) dev; |
| 1875 | dev->timer.function = fs_poll; |
| 1876 | dev->timer.expires = jiffies + FS_POLL_FREQ; |
| 1877 | add_timer (&dev->timer); |
| 1878 | #endif |
| 1879 | |
| 1880 | dev->atm_dev->dev_data = dev; |
| 1881 | |
| 1882 | func_exit (); |
| 1883 | return 0; |
| 1884 | } |
| 1885 | |
| 1886 | static int __devinit firestream_init_one (struct pci_dev *pci_dev, |
| 1887 | const struct pci_device_id *ent) |
| 1888 | { |
| 1889 | struct atm_dev *atm_dev; |
| 1890 | struct fs_dev *fs_dev; |
| 1891 | |
| 1892 | if (pci_enable_device(pci_dev)) |
| 1893 | goto err_out; |
| 1894 | |
| 1895 | fs_dev = kmalloc (sizeof (struct fs_dev), GFP_KERNEL); |
| 1896 | fs_dprintk (FS_DEBUG_ALLOC, "Alloc fs-dev: %p(%Zd)\n", |
| 1897 | fs_dev, sizeof (struct fs_dev)); |
| 1898 | if (!fs_dev) |
| 1899 | goto err_out; |
| 1900 | |
| 1901 | memset (fs_dev, 0, sizeof (struct fs_dev)); |
| 1902 | |
| 1903 | atm_dev = atm_dev_register("fs", &ops, -1, NULL); |
| 1904 | if (!atm_dev) |
| 1905 | goto err_out_free_fs_dev; |
| 1906 | |
| 1907 | fs_dev->pci_dev = pci_dev; |
| 1908 | fs_dev->atm_dev = atm_dev; |
| 1909 | fs_dev->flags = ent->driver_data; |
| 1910 | |
| 1911 | if (fs_init(fs_dev)) |
| 1912 | goto err_out_free_atm_dev; |
| 1913 | |
| 1914 | fs_dev->next = fs_boards; |
| 1915 | fs_boards = fs_dev; |
| 1916 | return 0; |
| 1917 | |
| 1918 | err_out_free_atm_dev: |
| 1919 | atm_dev_deregister(atm_dev); |
| 1920 | err_out_free_fs_dev: |
| 1921 | kfree(fs_dev); |
| 1922 | err_out: |
| 1923 | return -ENODEV; |
| 1924 | } |
| 1925 | |
| 1926 | static void __devexit firestream_remove_one (struct pci_dev *pdev) |
| 1927 | { |
| 1928 | int i; |
| 1929 | struct fs_dev *dev, *nxtdev; |
| 1930 | struct fs_vcc *vcc; |
| 1931 | struct FS_BPENTRY *fp, *nxt; |
| 1932 | |
| 1933 | func_enter (); |
| 1934 | |
| 1935 | #if 0 |
| 1936 | printk ("hptxq:\n"); |
| 1937 | for (i=0;i<60;i++) { |
| 1938 | printk ("%d: %08x %08x %08x %08x \n", |
| 1939 | i, pq[qp].cmd, pq[qp].p0, pq[qp].p1, pq[qp].p2); |
| 1940 | qp++; |
| 1941 | if (qp >= 60) qp = 0; |
| 1942 | } |
| 1943 | |
| 1944 | printk ("descriptors:\n"); |
| 1945 | for (i=0;i<60;i++) { |
| 1946 | printk ("%d: %p: %08x %08x %p %p\n", |
| 1947 | i, da[qd], dq[qd].flags, dq[qd].bsa, dq[qd].skb, dq[qd].dev); |
| 1948 | qd++; |
| 1949 | if (qd >= 60) qd = 0; |
| 1950 | } |
| 1951 | #endif |
| 1952 | |
| 1953 | for (dev = fs_boards;dev != NULL;dev=nxtdev) { |
| 1954 | fs_dprintk (FS_DEBUG_CLEANUP, "Releasing resources for dev at %p.\n", dev); |
| 1955 | |
| 1956 | /* XXX Hit all the tx channels too! */ |
| 1957 | |
| 1958 | for (i=0;i < dev->nchannels;i++) { |
| 1959 | if (dev->atm_vccs[i]) { |
| 1960 | vcc = FS_VCC (dev->atm_vccs[i]); |
| 1961 | submit_command (dev, &dev->hp_txq, |
| 1962 | QE_CMD_TX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0); |
| 1963 | submit_command (dev, &dev->hp_txq, |
| 1964 | QE_CMD_RX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0); |
| 1965 | |
| 1966 | } |
| 1967 | } |
| 1968 | |
| 1969 | /* XXX Wait a while for the chip to release all buffers. */ |
| 1970 | |
| 1971 | for (i=0;i < FS_NR_FREE_POOLS;i++) { |
| 1972 | for (fp=bus_to_virt (read_fs (dev, FP_SA(dev->rx_fp[i].offset))); |
| 1973 | !(fp->flags & FP_FLAGS_EPI);fp = nxt) { |
| 1974 | fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", fp->skb); |
| 1975 | dev_kfree_skb_any (fp->skb); |
| 1976 | nxt = bus_to_virt (fp->next); |
| 1977 | fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", fp); |
| 1978 | kfree (fp); |
| 1979 | } |
| 1980 | fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", fp->skb); |
| 1981 | dev_kfree_skb_any (fp->skb); |
| 1982 | fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", fp); |
| 1983 | kfree (fp); |
| 1984 | } |
| 1985 | |
| 1986 | /* Hang the chip in "reset", prevent it clobbering memory that is |
| 1987 | no longer ours. */ |
| 1988 | reset_chip (dev); |
| 1989 | |
| 1990 | fs_dprintk (FS_DEBUG_CLEANUP, "Freeing irq%d.\n", dev->irq); |
| 1991 | free_irq (dev->irq, dev); |
| 1992 | del_timer (&dev->timer); |
| 1993 | |
| 1994 | atm_dev_deregister(dev->atm_dev); |
| 1995 | free_queue (dev, &dev->hp_txq); |
| 1996 | free_queue (dev, &dev->lp_txq); |
| 1997 | free_queue (dev, &dev->tx_relq); |
| 1998 | free_queue (dev, &dev->st_q); |
| 1999 | |
| 2000 | fs_dprintk (FS_DEBUG_ALLOC, "Free atmvccs: %p\n", dev->atm_vccs); |
| 2001 | kfree (dev->atm_vccs); |
| 2002 | |
| 2003 | for (i=0;i< FS_NR_FREE_POOLS;i++) |
| 2004 | free_freepool (dev, &dev->rx_fp[i]); |
| 2005 | |
| 2006 | for (i=0;i < FS_NR_RX_QUEUES;i++) |
| 2007 | free_queue (dev, &dev->rx_rq[i]); |
| 2008 | |
| 2009 | fs_dprintk (FS_DEBUG_ALLOC, "Free fs-dev: %p\n", dev); |
| 2010 | nxtdev = dev->next; |
| 2011 | kfree (dev); |
| 2012 | } |
| 2013 | |
| 2014 | func_exit (); |
| 2015 | } |
| 2016 | |
| 2017 | static struct pci_device_id firestream_pci_tbl[] = { |
| 2018 | { PCI_VENDOR_ID_FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS50, |
| 2019 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, FS_IS50}, |
| 2020 | { PCI_VENDOR_ID_FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS155, |
| 2021 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, FS_IS155}, |
| 2022 | { 0, } |
| 2023 | }; |
| 2024 | |
| 2025 | MODULE_DEVICE_TABLE(pci, firestream_pci_tbl); |
| 2026 | |
| 2027 | static struct pci_driver firestream_driver = { |
| 2028 | .name = "firestream", |
| 2029 | .id_table = firestream_pci_tbl, |
| 2030 | .probe = firestream_init_one, |
| 2031 | .remove = __devexit_p(firestream_remove_one), |
| 2032 | }; |
| 2033 | |
| 2034 | static int __init firestream_init_module (void) |
| 2035 | { |
| 2036 | int error; |
| 2037 | |
| 2038 | func_enter (); |
| 2039 | error = pci_register_driver(&firestream_driver); |
| 2040 | func_exit (); |
| 2041 | return error; |
| 2042 | } |
| 2043 | |
| 2044 | static void __exit firestream_cleanup_module(void) |
| 2045 | { |
| 2046 | pci_unregister_driver(&firestream_driver); |
| 2047 | } |
| 2048 | |
| 2049 | module_init(firestream_init_module); |
| 2050 | module_exit(firestream_cleanup_module); |
| 2051 | |
| 2052 | MODULE_LICENSE("GPL"); |
| 2053 | |
| 2054 | |
| 2055 | |