blob: a36ae413e2b84fcee956b74577df8da740932cee [file] [log] [blame]
Joseph Lo453689e2012-08-16 17:31:52 +08001/*
2 * Copyright (c) 2010-2012, NVIDIA Corporation. All rights reserved.
3 * Copyright (c) 2011, Google, Inc.
4 *
5 * Author: Colin Cross <ccross@android.com>
6 * Gary King <gking@nvidia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#include <linux/linkage.h>
22
23#include <asm/assembler.h>
24
25#include <mach/iomap.h>
26
27#include "sleep.h"
28#include "flowctrl.h"
29
30#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_PM_SLEEP)
31/*
32 * tegra20_hotplug_shutdown(void)
33 *
34 * puts the current cpu in reset
35 * should never return
36 */
37ENTRY(tegra20_hotplug_shutdown)
38 /* Turn off SMP coherency */
39 exit_smp r4, r5
40
41 /* Put this CPU down */
42 cpu_id r0
43 bl tegra20_cpu_shutdown
44 mov pc, lr @ should never get here
45ENDPROC(tegra20_hotplug_shutdown)
46
47/*
48 * tegra20_cpu_shutdown(int cpu)
49 *
50 * r0 is cpu to reset
51 *
52 * puts the specified CPU in wait-for-event mode on the flow controller
53 * and puts the CPU in reset
54 * can be called on the current cpu or another cpu
55 * if called on the current cpu, does not return
56 * MUST NOT BE CALLED FOR CPU 0.
57 *
58 * corrupts r0-r3, r12
59 */
60ENTRY(tegra20_cpu_shutdown)
61 cmp r0, #0
62 moveq pc, lr @ must not be called for CPU 0
63
64 cpu_to_halt_reg r1, r0
65 ldr r3, =TEGRA_FLOW_CTRL_VIRT
66 mov r2, #FLOW_CTRL_WAITEVENT | FLOW_CTRL_JTAG_RESUME
67 str r2, [r3, r1] @ put flow controller in wait event mode
68 ldr r2, [r3, r1]
69 isb
70 dsb
71 movw r1, 0x1011
72 mov r1, r1, lsl r0
73 ldr r3, =TEGRA_CLK_RESET_VIRT
74 str r1, [r3, #0x340] @ put slave CPU in reset
75 isb
76 dsb
77 cpu_id r3
78 cmp r3, r0
79 beq .
80 mov pc, lr
81ENDPROC(tegra20_cpu_shutdown)
82#endif