blob: eee08d81b24214c3ea0c5555fa1f1f419249f9d6 [file] [log] [blame]
Jan Glauber166bac382017-03-30 17:31:25 +02001/*
2 * Driver for MMC and SSD cards for Cavium ThunderX SOCs.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2016 Cavium Inc.
9 */
Jan Glauberb917c6d2017-09-07 13:24:17 +020010#include <linux/device.h>
Jan Glauber166bac382017-03-30 17:31:25 +020011#include <linux/dma-mapping.h>
12#include <linux/interrupt.h>
13#include <linux/mmc/mmc.h>
14#include <linux/module.h>
15#include <linux/of.h>
16#include <linux/of_platform.h>
17#include <linux/pci.h>
18#include "cavium.h"
19
20static void thunder_mmc_acquire_bus(struct cvm_mmc_host *host)
21{
22 down(&host->mmc_serializer);
23}
24
25static void thunder_mmc_release_bus(struct cvm_mmc_host *host)
26{
27 up(&host->mmc_serializer);
28}
29
30static void thunder_mmc_int_enable(struct cvm_mmc_host *host, u64 val)
31{
32 writeq(val, host->base + MIO_EMM_INT(host));
33 writeq(val, host->base + MIO_EMM_INT_EN_SET(host));
34}
35
36static int thunder_mmc_register_interrupts(struct cvm_mmc_host *host,
37 struct pci_dev *pdev)
38{
39 int nvec, ret, i;
40
41 nvec = pci_alloc_irq_vectors(pdev, 1, 9, PCI_IRQ_MSIX);
42 if (nvec < 0)
43 return nvec;
44
45 /* register interrupts */
46 for (i = 0; i < nvec; i++) {
47 ret = devm_request_irq(&pdev->dev, pci_irq_vector(pdev, i),
48 cvm_mmc_interrupt,
49 0, cvm_mmc_irq_names[i], host);
50 if (ret)
51 return ret;
52 }
53 return 0;
54}
55
56static int thunder_mmc_probe(struct pci_dev *pdev,
57 const struct pci_device_id *id)
58{
59 struct device_node *node = pdev->dev.of_node;
60 struct device *dev = &pdev->dev;
61 struct device_node *child_node;
62 struct cvm_mmc_host *host;
63 int ret, i = 0;
64
65 host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
66 if (!host)
67 return -ENOMEM;
68
69 pci_set_drvdata(pdev, host);
70 ret = pcim_enable_device(pdev);
71 if (ret)
72 return ret;
73
74 ret = pci_request_regions(pdev, KBUILD_MODNAME);
75 if (ret)
76 return ret;
77
78 host->base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));
79 if (!host->base)
80 return -EINVAL;
81
82 /* On ThunderX these are identical */
83 host->dma_base = host->base;
84
85 host->reg_off = 0x2000;
Jan Glaubercd76e5c2017-03-30 17:31:26 +020086 host->reg_off_dma = 0x160;
Jan Glauber166bac382017-03-30 17:31:25 +020087
88 host->clk = devm_clk_get(dev, NULL);
89 if (IS_ERR(host->clk))
90 return PTR_ERR(host->clk);
91
92 ret = clk_prepare_enable(host->clk);
93 if (ret)
94 return ret;
95 host->sys_freq = clk_get_rate(host->clk);
96
97 spin_lock_init(&host->irq_handler_lock);
98 sema_init(&host->mmc_serializer, 1);
99
100 host->dev = dev;
101 host->acquire_bus = thunder_mmc_acquire_bus;
102 host->release_bus = thunder_mmc_release_bus;
103 host->int_enable = thunder_mmc_int_enable;
104
Jan Glaubercd76e5c2017-03-30 17:31:26 +0200105 host->use_sg = true;
Jan Glauber166bac382017-03-30 17:31:25 +0200106 host->big_dma_addr = true;
107 host->need_irq_handler_lock = true;
108 host->last_slot = -1;
109
110 ret = dma_set_mask(dev, DMA_BIT_MASK(48));
111 if (ret)
112 goto error;
113
114 /*
115 * Clear out any pending interrupts that may be left over from
116 * bootloader. Writing 1 to the bits clears them.
117 */
118 writeq(127, host->base + MIO_EMM_INT_EN(host));
119 writeq(3, host->base + MIO_EMM_DMA_INT_ENA_W1C(host));
Jan Glaubercd76e5c2017-03-30 17:31:26 +0200120 /* Clear DMA FIFO */
121 writeq(BIT_ULL(16), host->base + MIO_EMM_DMA_FIFO_CFG(host));
Jan Glauber166bac382017-03-30 17:31:25 +0200122
123 ret = thunder_mmc_register_interrupts(host, pdev);
124 if (ret)
125 goto error;
126
127 for_each_child_of_node(node, child_node) {
128 /*
129 * mmc_of_parse and devm* require one device per slot.
130 * Create a dummy device per slot and set the node pointer to
131 * the slot. The easiest way to get this is using
132 * of_platform_device_create.
133 */
134 if (of_device_is_compatible(child_node, "mmc-slot")) {
135 host->slot_pdev[i] = of_platform_device_create(child_node, NULL,
136 &pdev->dev);
137 if (!host->slot_pdev[i])
138 continue;
139
140 ret = cvm_mmc_of_slot_probe(&host->slot_pdev[i]->dev, host);
141 if (ret)
142 goto error;
143 }
144 i++;
145 }
146 dev_info(dev, "probed\n");
147 return 0;
148
149error:
Jan Glauber8fb83b12017-05-22 13:09:21 +0200150 for (i = 0; i < CAVIUM_MAX_MMC; i++) {
151 if (host->slot[i])
152 cvm_mmc_of_slot_remove(host->slot[i]);
Jan Glauberb917c6d2017-09-07 13:24:17 +0200153 if (host->slot_pdev[i]) {
154 get_device(&host->slot_pdev[i]->dev);
Jan Glauber8fb83b12017-05-22 13:09:21 +0200155 of_platform_device_destroy(&host->slot_pdev[i]->dev, NULL);
Jan Glauberb917c6d2017-09-07 13:24:17 +0200156 put_device(&host->slot_pdev[i]->dev);
157 }
Jan Glauber8fb83b12017-05-22 13:09:21 +0200158 }
Jan Glauber166bac382017-03-30 17:31:25 +0200159 clk_disable_unprepare(host->clk);
160 return ret;
161}
162
163static void thunder_mmc_remove(struct pci_dev *pdev)
164{
165 struct cvm_mmc_host *host = pci_get_drvdata(pdev);
166 u64 dma_cfg;
167 int i;
168
169 for (i = 0; i < CAVIUM_MAX_MMC; i++)
170 if (host->slot[i])
171 cvm_mmc_of_slot_remove(host->slot[i]);
172
173 dma_cfg = readq(host->dma_base + MIO_EMM_DMA_CFG(host));
174 dma_cfg &= ~MIO_EMM_DMA_CFG_EN;
175 writeq(dma_cfg, host->dma_base + MIO_EMM_DMA_CFG(host));
176
177 clk_disable_unprepare(host->clk);
178}
179
180static const struct pci_device_id thunder_mmc_id_table[] = {
181 { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, 0xa010) },
182 { 0, } /* end of table */
183};
184
185static struct pci_driver thunder_mmc_driver = {
186 .name = KBUILD_MODNAME,
187 .id_table = thunder_mmc_id_table,
188 .probe = thunder_mmc_probe,
189 .remove = thunder_mmc_remove,
190};
191
Wei Yongjundfc28b12017-04-25 03:14:09 +0000192module_pci_driver(thunder_mmc_driver);
Jan Glauber166bac382017-03-30 17:31:25 +0200193
194MODULE_AUTHOR("Cavium Inc.");
195MODULE_DESCRIPTION("Cavium ThunderX eMMC Driver");
196MODULE_LICENSE("GPL");
197MODULE_DEVICE_TABLE(pci, thunder_mmc_id_table);