blob: 16c9cacd668d4af08660cc0679e1314ca6a54086 [file] [log] [blame]
Peter Crosthwaite7b01abb2014-12-01 10:25:50 +10001/*
2 * Copyright (C) 2011 - 2014 Xilinx
3 * Copyright (C) 2012 National Instruments Corp.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14/dts-v1/;
15/include/ "zynq-7000.dtsi"
16
17/ {
18 model = "Zynq ZYBO Development Board";
19 compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";
20
Michal Simek1b654bc2015-02-11 13:05:11 +010021 aliases {
22 ethernet0 = &gem0;
23 serial0 = &uart1;
24 };
25
Peter Crosthwaite7b01abb2014-12-01 10:25:50 +100026 memory {
27 device_type = "memory";
28 reg = <0x0 0x20000000>;
29 };
30
31 chosen {
Michal Simek22210432015-02-11 13:06:36 +010032 bootargs = "earlyprintk";
33 stdout-path = "serial0:115200n8";
Peter Crosthwaite7b01abb2014-12-01 10:25:50 +100034 };
35
36};
37
38&clkc {
39 ps-clk-frequency = <50000000>;
40};
41
42&gem0 {
43 status = "okay";
44 phy-mode = "rgmii-id";
45 phy-handle = <&ethernet_phy>;
46
47 ethernet_phy: ethernet-phy@0 {
48 reg = <0>;
49 };
50};
51
52&sdhci0 {
53 status = "okay";
54};
55
56&uart1 {
57 status = "okay";
58};