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Manjunath Hadliff0f23d2011-06-17 04:01:33 -03001/*
2 * Copyright (C) 2007-2009 Texas Instruments Inc
3 * Copyright (C) 2007 MontaVista Software, Inc.
4 *
5 * Andy Lowe (alowe@mvista.com), MontaVista Software
6 * - Initial version
7 * Murali Karicheri (mkaricheri@gmail.com), Texas Instruments Ltd.
8 * - ported to sub device interface
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation version 2..
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24#ifndef _OSD_H
25#define _OSD_H
26
27#include <media/davinci/vpbe_types.h>
28
Lad, Prabhakarcaff80c2012-11-20 07:30:36 -030029#define DM644X_VPBE_OSD_SUBDEV_NAME "dm644x,vpbe-osd"
30#define DM365_VPBE_OSD_SUBDEV_NAME "dm365,vpbe-osd"
31#define DM355_VPBE_OSD_SUBDEV_NAME "dm355,vpbe-osd"
Manjunath Hadliff0f23d2011-06-17 04:01:33 -030032
33/**
34 * enum osd_layer
35 * @WIN_OSD0: On-Screen Display Window 0
36 * @WIN_VID0: Video Window 0
37 * @WIN_OSD1: On-Screen Display Window 1
38 * @WIN_VID1: Video Window 1
39 *
40 * Description:
41 * An enumeration of the osd display layers.
42 */
43enum osd_layer {
44 WIN_OSD0,
45 WIN_VID0,
46 WIN_OSD1,
47 WIN_VID1,
48};
49
50/**
51 * enum osd_win_layer
52 * @OSDWIN_OSD0: On-Screen Display Window 0
53 * @OSDWIN_OSD1: On-Screen Display Window 1
54 *
55 * Description:
56 * An enumeration of the OSD Window layers.
57 */
58enum osd_win_layer {
59 OSDWIN_OSD0,
60 OSDWIN_OSD1,
61};
62
63/**
64 * enum osd_pix_format
65 * @PIXFMT_1BPP: 1-bit-per-pixel bitmap
66 * @PIXFMT_2BPP: 2-bits-per-pixel bitmap
67 * @PIXFMT_4BPP: 4-bits-per-pixel bitmap
68 * @PIXFMT_8BPP: 8-bits-per-pixel bitmap
69 * @PIXFMT_RGB565: 16-bits-per-pixel RGB565
70 * @PIXFMT_YCbCrI: YUV 4:2:2
71 * @PIXFMT_RGB888: 24-bits-per-pixel RGB888
72 * @PIXFMT_YCrCbI: YUV 4:2:2 with chroma swap
73 * @PIXFMT_NV12: YUV 4:2:0 planar
74 * @PIXFMT_OSD_ATTR: OSD Attribute Window pixel format (4bpp)
75 *
76 * Description:
77 * An enumeration of the DaVinci pixel formats.
78 */
79enum osd_pix_format {
80 PIXFMT_1BPP = 0,
81 PIXFMT_2BPP,
82 PIXFMT_4BPP,
83 PIXFMT_8BPP,
84 PIXFMT_RGB565,
Lad, Prabhakar849325e2013-05-03 08:39:25 -030085 PIXFMT_YCBCRI,
Manjunath Hadliff0f23d2011-06-17 04:01:33 -030086 PIXFMT_RGB888,
Lad, Prabhakar849325e2013-05-03 08:39:25 -030087 PIXFMT_YCRCBI,
Manjunath Hadliff0f23d2011-06-17 04:01:33 -030088 PIXFMT_NV12,
89 PIXFMT_OSD_ATTR,
90};
91
92/**
93 * enum osd_h_exp_ratio
94 * @H_EXP_OFF: no expansion (1/1)
95 * @H_EXP_9_OVER_8: 9/8 expansion ratio
96 * @H_EXP_3_OVER_2: 3/2 expansion ratio
97 *
98 * Description:
99 * An enumeration of the available horizontal expansion ratios.
100 */
101enum osd_h_exp_ratio {
102 H_EXP_OFF,
103 H_EXP_9_OVER_8,
104 H_EXP_3_OVER_2,
105};
106
107/**
108 * enum osd_v_exp_ratio
109 * @V_EXP_OFF: no expansion (1/1)
110 * @V_EXP_6_OVER_5: 6/5 expansion ratio
111 *
112 * Description:
113 * An enumeration of the available vertical expansion ratios.
114 */
115enum osd_v_exp_ratio {
116 V_EXP_OFF,
117 V_EXP_6_OVER_5,
118};
119
120/**
121 * enum osd_zoom_factor
122 * @ZOOM_X1: no zoom (x1)
123 * @ZOOM_X2: x2 zoom
124 * @ZOOM_X4: x4 zoom
125 *
126 * Description:
127 * An enumeration of the available zoom factors.
128 */
129enum osd_zoom_factor {
130 ZOOM_X1,
131 ZOOM_X2,
132 ZOOM_X4,
133};
134
135/**
136 * enum osd_clut
137 * @ROM_CLUT: ROM CLUT
138 * @RAM_CLUT: RAM CLUT
139 *
140 * Description:
141 * An enumeration of the available Color Lookup Tables (CLUTs).
142 */
143enum osd_clut {
144 ROM_CLUT,
145 RAM_CLUT,
146};
147
148/**
149 * enum osd_rom_clut
150 * @ROM_CLUT0: Macintosh CLUT
151 * @ROM_CLUT1: CLUT from DM270 and prior devices
152 *
153 * Description:
154 * An enumeration of the ROM Color Lookup Table (CLUT) options.
155 */
156enum osd_rom_clut {
157 ROM_CLUT0,
158 ROM_CLUT1,
159};
160
161/**
162 * enum osd_blending_factor
163 * @OSD_0_VID_8: OSD pixels are fully transparent
164 * @OSD_1_VID_7: OSD pixels contribute 1/8, video pixels contribute 7/8
165 * @OSD_2_VID_6: OSD pixels contribute 2/8, video pixels contribute 6/8
166 * @OSD_3_VID_5: OSD pixels contribute 3/8, video pixels contribute 5/8
167 * @OSD_4_VID_4: OSD pixels contribute 4/8, video pixels contribute 4/8
168 * @OSD_5_VID_3: OSD pixels contribute 5/8, video pixels contribute 3/8
169 * @OSD_6_VID_2: OSD pixels contribute 6/8, video pixels contribute 2/8
170 * @OSD_8_VID_0: OSD pixels are fully opaque
171 *
172 * Description:
173 * An enumeration of the DaVinci pixel blending factor options.
174 */
175enum osd_blending_factor {
176 OSD_0_VID_8,
177 OSD_1_VID_7,
178 OSD_2_VID_6,
179 OSD_3_VID_5,
180 OSD_4_VID_4,
181 OSD_5_VID_3,
182 OSD_6_VID_2,
183 OSD_8_VID_0,
184};
185
186/**
187 * enum osd_blink_interval
188 * @BLINK_X1: blink interval is 1 vertical refresh cycle
189 * @BLINK_X2: blink interval is 2 vertical refresh cycles
190 * @BLINK_X3: blink interval is 3 vertical refresh cycles
191 * @BLINK_X4: blink interval is 4 vertical refresh cycles
192 *
193 * Description:
194 * An enumeration of the DaVinci pixel blinking interval options.
195 */
196enum osd_blink_interval {
197 BLINK_X1,
198 BLINK_X2,
199 BLINK_X3,
200 BLINK_X4,
201};
202
203/**
204 * enum osd_cursor_h_width
205 * @H_WIDTH_1: horizontal line width is 1 pixel
206 * @H_WIDTH_4: horizontal line width is 4 pixels
207 * @H_WIDTH_8: horizontal line width is 8 pixels
208 * @H_WIDTH_12: horizontal line width is 12 pixels
209 * @H_WIDTH_16: horizontal line width is 16 pixels
210 * @H_WIDTH_20: horizontal line width is 20 pixels
211 * @H_WIDTH_24: horizontal line width is 24 pixels
212 * @H_WIDTH_28: horizontal line width is 28 pixels
213 */
214enum osd_cursor_h_width {
215 H_WIDTH_1,
216 H_WIDTH_4,
217 H_WIDTH_8,
218 H_WIDTH_12,
219 H_WIDTH_16,
220 H_WIDTH_20,
221 H_WIDTH_24,
222 H_WIDTH_28,
223};
224
225/**
226 * enum davinci_cursor_v_width
227 * @V_WIDTH_1: vertical line width is 1 line
228 * @V_WIDTH_2: vertical line width is 2 lines
229 * @V_WIDTH_4: vertical line width is 4 lines
230 * @V_WIDTH_6: vertical line width is 6 lines
231 * @V_WIDTH_8: vertical line width is 8 lines
232 * @V_WIDTH_10: vertical line width is 10 lines
233 * @V_WIDTH_12: vertical line width is 12 lines
234 * @V_WIDTH_14: vertical line width is 14 lines
235 */
236enum osd_cursor_v_width {
237 V_WIDTH_1,
238 V_WIDTH_2,
239 V_WIDTH_4,
240 V_WIDTH_6,
241 V_WIDTH_8,
242 V_WIDTH_10,
243 V_WIDTH_12,
244 V_WIDTH_14,
245};
246
247/**
248 * struct osd_cursor_config
249 * @xsize: horizontal size in pixels
250 * @ysize: vertical size in lines
251 * @xpos: horizontal offset in pixels from the left edge of the display
252 * @ypos: vertical offset in lines from the top of the display
253 * @interlaced: Non-zero if the display is interlaced, or zero otherwise
254 * @h_width: horizontal line width
255 * @v_width: vertical line width
256 * @clut: the CLUT selector (ROM or RAM) for the cursor color
257 * @clut_index: an index into the CLUT for the cursor color
258 *
259 * Description:
260 * A structure describing the configuration parameters of the hardware
261 * rectangular cursor.
262 */
263struct osd_cursor_config {
264 unsigned xsize;
265 unsigned ysize;
266 unsigned xpos;
267 unsigned ypos;
268 int interlaced;
269 enum osd_cursor_h_width h_width;
270 enum osd_cursor_v_width v_width;
271 enum osd_clut clut;
272 unsigned char clut_index;
273};
274
275/**
276 * struct osd_layer_config
277 * @pixfmt: pixel format
278 * @line_length: offset in bytes between start of each line in memory
279 * @xsize: number of horizontal pixels displayed per line
280 * @ysize: number of lines displayed
281 * @xpos: horizontal offset in pixels from the left edge of the display
282 * @ypos: vertical offset in lines from the top of the display
283 * @interlaced: Non-zero if the display is interlaced, or zero otherwise
284 *
285 * Description:
286 * A structure describing the configuration parameters of an On-Screen Display
287 * (OSD) or video layer related to how the image is stored in memory.
288 * @line_length must be a multiple of the cache line size (32 bytes).
289 */
290struct osd_layer_config {
291 enum osd_pix_format pixfmt;
292 unsigned line_length;
293 unsigned xsize;
294 unsigned ysize;
295 unsigned xpos;
296 unsigned ypos;
297 int interlaced;
298};
299
300/* parameters that apply on a per-window (OSD or video) basis */
301struct osd_window_state {
302 int is_allocated;
303 int is_enabled;
304 unsigned long fb_base_phys;
305 enum osd_zoom_factor h_zoom;
306 enum osd_zoom_factor v_zoom;
307 struct osd_layer_config lconfig;
308};
309
310/* parameters that apply on a per-OSD-window basis */
311struct osd_osdwin_state {
312 enum osd_clut clut;
313 enum osd_blending_factor blend;
314 int colorkey_blending;
315 unsigned colorkey;
316 int rec601_attenuation;
317 /* index is pixel value */
318 unsigned char palette_map[16];
319};
320
321/* hardware rectangular cursor parameters */
322struct osd_cursor_state {
323 int is_enabled;
324 struct osd_cursor_config config;
325};
326
327struct osd_state;
328
329struct vpbe_osd_ops {
330 int (*initialize)(struct osd_state *sd);
331 int (*request_layer)(struct osd_state *sd, enum osd_layer layer);
332 void (*release_layer)(struct osd_state *sd, enum osd_layer layer);
333 int (*enable_layer)(struct osd_state *sd, enum osd_layer layer,
334 int otherwin);
335 void (*disable_layer)(struct osd_state *sd, enum osd_layer layer);
336 int (*set_layer_config)(struct osd_state *sd, enum osd_layer layer,
337 struct osd_layer_config *lconfig);
338 void (*get_layer_config)(struct osd_state *sd, enum osd_layer layer,
339 struct osd_layer_config *lconfig);
340 void (*start_layer)(struct osd_state *sd, enum osd_layer layer,
341 unsigned long fb_base_phys,
342 unsigned long cbcr_ofst);
343 void (*set_left_margin)(struct osd_state *sd, u32 val);
344 void (*set_top_margin)(struct osd_state *sd, u32 val);
345 void (*set_interpolation_filter)(struct osd_state *sd, int filter);
346 int (*set_vid_expansion)(struct osd_state *sd,
347 enum osd_h_exp_ratio h_exp,
348 enum osd_v_exp_ratio v_exp);
349 void (*get_vid_expansion)(struct osd_state *sd,
350 enum osd_h_exp_ratio *h_exp,
351 enum osd_v_exp_ratio *v_exp);
352 void (*set_zoom)(struct osd_state *sd, enum osd_layer layer,
353 enum osd_zoom_factor h_zoom,
354 enum osd_zoom_factor v_zoom);
355};
356
357struct osd_state {
358 enum vpbe_version vpbe_type;
359 spinlock_t lock;
360 struct device *dev;
361 dma_addr_t osd_base_phys;
Lad, Prabhakarbaa29832012-11-09 05:59:32 -0300362 void __iomem *osd_base;
Manjunath Hadliff0f23d2011-06-17 04:01:33 -0300363 unsigned long osd_size;
364 /* 1-->the isr will toggle the VID0 ping-pong buffer */
365 int pingpong;
366 int interpolation_filter;
367 int field_inversion;
368 enum osd_h_exp_ratio osd_h_exp;
369 enum osd_v_exp_ratio osd_v_exp;
370 enum osd_h_exp_ratio vid_h_exp;
371 enum osd_v_exp_ratio vid_v_exp;
372 enum osd_clut backg_clut;
373 unsigned backg_clut_index;
374 enum osd_rom_clut rom_clut;
375 int is_blinking;
376 /* attribute window blinking enabled */
377 enum osd_blink_interval blink;
378 /* YCbCrI or YCrCbI */
379 enum osd_pix_format yc_pixfmt;
380 /* columns are Y, Cb, Cr */
381 unsigned char clut_ram[256][3];
382 struct osd_cursor_state cursor;
383 /* OSD0, VID0, OSD1, VID1 */
384 struct osd_window_state win[4];
385 /* OSD0, OSD1 */
386 struct osd_osdwin_state osdwin[2];
387 /* OSD device Operations */
388 struct vpbe_osd_ops ops;
389};
390
391struct osd_platform_data {
Manjunath Hadliff0f23d2011-06-17 04:01:33 -0300392 int field_inv_wa_enable;
393};
394
395#endif