Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 1 | /* |
| 2 | * OMAP2/3 Power Management Routines |
| 3 | * |
| 4 | * Copyright (C) 2008 Nokia Corporation |
| 5 | * Jouni Hogander |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | #ifndef __ARCH_ARM_MACH_OMAP2_PM_H |
| 12 | #define __ARCH_ARM_MACH_OMAP2_PM_H |
| 13 | |
Tony Lindgren | ce491cf | 2009-10-20 09:40:47 -0700 | [diff] [blame] | 14 | #include <plat/powerdomain.h> |
Peter 'p2' De Schrijver | 331b93f | 2008-10-15 18:13:48 +0300 | [diff] [blame] | 15 | |
Tero Kristo | 27d59a4 | 2008-10-13 13:15:00 +0300 | [diff] [blame] | 16 | extern void *omap3_secure_ram_storage; |
Kevin Hilman | c40552b | 2009-10-06 14:25:09 -0700 | [diff] [blame] | 17 | extern void omap3_pm_off_mode_enable(int); |
Rajendra Nayak | 99e6a4d | 2008-10-08 17:30:58 +0530 | [diff] [blame] | 18 | extern void omap_sram_idle(void); |
Rajendra Nayak | 20b0166 | 2008-10-08 17:31:22 +0530 | [diff] [blame] | 19 | extern int omap3_can_sleep(void); |
Santosh Shilimkar | eb6a2c7 | 2010-09-15 01:04:01 +0530 | [diff] [blame] | 20 | extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state); |
Kalle Jokiniemi | 0343371 | 2008-09-26 11:04:20 +0300 | [diff] [blame] | 21 | extern int omap3_idle_init(void); |
Tero Kristo | 27d59a4 | 2008-10-13 13:15:00 +0300 | [diff] [blame] | 22 | |
Kevin Hilman | bb4de3d | 2009-12-15 16:37:18 -0800 | [diff] [blame] | 23 | struct cpuidle_params { |
Kalle Jokiniemi | 709731b | 2009-10-29 10:30:19 +0200 | [diff] [blame] | 24 | u8 valid; |
Kevin Hilman | bb4de3d | 2009-12-15 16:37:18 -0800 | [diff] [blame] | 25 | u32 sleep_latency; |
| 26 | u32 wake_latency; |
| 27 | u32 threshold; |
| 28 | }; |
| 29 | |
| 30 | #if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE) |
| 31 | extern void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params); |
| 32 | #else |
| 33 | static |
| 34 | inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params) |
| 35 | { |
| 36 | } |
| 37 | #endif |
| 38 | |
Tero Kristo | 68d4778 | 2008-11-26 12:26:24 +0200 | [diff] [blame] | 39 | extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); |
| 40 | extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); |
| 41 | |
Kevin Hilman | d7814e4 | 2009-10-06 14:30:23 -0700 | [diff] [blame] | 42 | extern u32 wakeup_timer_seconds; |
Ari Kauppi | 8e2efde | 2010-03-23 09:04:59 +0200 | [diff] [blame] | 43 | extern u32 wakeup_timer_milliseconds; |
Kevin Hilman | d7814e4 | 2009-10-06 14:30:23 -0700 | [diff] [blame] | 44 | extern struct omap_dm_timer *gptimer_wakeup; |
| 45 | |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 46 | #ifdef CONFIG_PM_DEBUG |
| 47 | extern void omap2_pm_dump(int mode, int resume, unsigned int us); |
Santosh Shilimkar | 86b0c1e | 2010-09-15 01:03:59 +0530 | [diff] [blame] | 48 | extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 49 | extern int omap2_pm_debug; |
Loïc Minier | ebfa88c | 2010-09-27 23:04:20 +0200 | [diff] [blame] | 50 | extern u32 enable_off_mode; |
| 51 | extern u32 sleep_while_idle; |
Manjunatha GK | ae559d8 | 2009-11-16 20:16:52 +0530 | [diff] [blame] | 52 | #else |
| 53 | #define omap2_pm_dump(mode, resume, us) do {} while (0); |
Santosh Shilimkar | 86b0c1e | 2010-09-15 01:03:59 +0530 | [diff] [blame] | 54 | #define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0); |
Manjunatha GK | ae559d8 | 2009-11-16 20:16:52 +0530 | [diff] [blame] | 55 | #define omap2_pm_debug 0 |
Loïc Minier | ebfa88c | 2010-09-27 23:04:20 +0200 | [diff] [blame] | 56 | #define enable_off_mode 0 |
| 57 | #define sleep_while_idle 0 |
Manjunatha GK | ae559d8 | 2009-11-16 20:16:52 +0530 | [diff] [blame] | 58 | #endif |
| 59 | |
Sanjeev Premi | 6af83b3 | 2010-01-28 23:16:43 +0530 | [diff] [blame] | 60 | #if defined(CONFIG_CPU_IDLE) |
Nishanth Menon | 80723c3 | 2010-12-20 14:05:08 -0600 | [diff] [blame] | 61 | extern void omap3_cpuidle_update_states(u32, u32); |
Sanjeev Premi | 6af83b3 | 2010-01-28 23:16:43 +0530 | [diff] [blame] | 62 | #endif |
| 63 | |
Manjunatha GK | ae559d8 | 2009-11-16 20:16:52 +0530 | [diff] [blame] | 64 | #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) |
Peter 'p2' De Schrijver | 331b93f | 2008-10-15 18:13:48 +0300 | [diff] [blame] | 65 | extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); |
Tero Kristo | 2811d6b | 2008-10-29 13:31:24 +0200 | [diff] [blame] | 66 | extern int pm_dbg_regset_save(int reg_set); |
| 67 | extern int pm_dbg_regset_init(int reg_set); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 68 | #else |
Peter 'p2' De Schrijver | 331b93f | 2008-10-15 18:13:48 +0300 | [diff] [blame] | 69 | #define pm_dbg_update_time(pwrdm, prev) do {} while (0); |
Tero Kristo | 2811d6b | 2008-10-29 13:31:24 +0200 | [diff] [blame] | 70 | #define pm_dbg_regset_save(reg_set) do {} while (0); |
| 71 | #define pm_dbg_regset_init(reg_set) do {} while (0); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 72 | #endif /* CONFIG_PM_DEBUG */ |
| 73 | |
| 74 | extern void omap24xx_idle_loop_suspend(void); |
| 75 | |
| 76 | extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl, |
| 77 | void __iomem *sdrc_power); |
| 78 | extern void omap34xx_cpu_suspend(u32 *addr, int save_state); |
| 79 | extern void save_secure_ram_context(u32 *addr); |
Tero Kristo | 27d59a4 | 2008-10-13 13:15:00 +0300 | [diff] [blame] | 80 | extern void omap3_save_scratchpad_contents(void); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 81 | |
| 82 | extern unsigned int omap24xx_idle_loop_suspend_sz; |
| 83 | extern unsigned int omap34xx_suspend_sz; |
| 84 | extern unsigned int save_secure_ram_context_sz; |
| 85 | extern unsigned int omap24xx_cpu_suspend_sz; |
| 86 | extern unsigned int omap34xx_cpu_suspend_sz; |
| 87 | |
Nishanth Menon | 458e999 | 2010-12-20 14:05:06 -0600 | [diff] [blame] | 88 | #define PM_RTA_ERRATUM_i608 (1 << 0) |
Eduardo Valentin | cc1b602 | 2010-12-20 14:05:09 -0600 | [diff] [blame^] | 89 | #define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1) |
Nishanth Menon | 458e999 | 2010-12-20 14:05:06 -0600 | [diff] [blame] | 90 | |
Nishanth Menon | 8cdfd83 | 2010-12-20 14:05:05 -0600 | [diff] [blame] | 91 | #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) |
| 92 | extern u16 pm34xx_errata; |
| 93 | #define IS_PM34XX_ERRATUM(id) (pm34xx_errata & (id)) |
Peter 'p2' De Schrijver | c4236d2 | 2010-12-20 14:05:07 -0600 | [diff] [blame] | 94 | extern void enable_omap3630_toggle_l2_on_restore(void); |
Nishanth Menon | 8cdfd83 | 2010-12-20 14:05:05 -0600 | [diff] [blame] | 95 | #else |
| 96 | #define IS_PM34XX_ERRATUM(id) 0 |
Peter 'p2' De Schrijver | c4236d2 | 2010-12-20 14:05:07 -0600 | [diff] [blame] | 97 | static inline void enable_omap3630_toggle_l2_on_restore(void) { } |
Nishanth Menon | 8cdfd83 | 2010-12-20 14:05:05 -0600 | [diff] [blame] | 98 | #endif /* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */ |
| 99 | |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 100 | #endif |