Daniel Mack | 8f3128e | 2009-06-16 15:34:17 -0700 | [diff] [blame] | 1 | #ifndef __LIS3LV02D_H_ |
| 2 | #define __LIS3LV02D_H_ |
| 3 | |
| 4 | struct lis3lv02d_platform_data { |
| 5 | /* please note: the 'click' feature is only supported for |
| 6 | * LIS[32]02DL variants of the chip and will be ignored for |
| 7 | * others */ |
| 8 | #define LIS3_CLICK_SINGLE_X (1 << 0) |
| 9 | #define LIS3_CLICK_DOUBLE_X (1 << 1) |
| 10 | #define LIS3_CLICK_SINGLE_Y (1 << 2) |
| 11 | #define LIS3_CLICK_DOUBLE_Y (1 << 3) |
| 12 | #define LIS3_CLICK_SINGLE_Z (1 << 4) |
| 13 | #define LIS3_CLICK_DOUBLE_Z (1 << 5) |
| 14 | unsigned char click_flags; |
| 15 | unsigned char click_thresh_x; |
| 16 | unsigned char click_thresh_y; |
| 17 | unsigned char click_thresh_z; |
| 18 | unsigned char click_time_limit; |
| 19 | unsigned char click_latency; |
| 20 | unsigned char click_window; |
| 21 | |
| 22 | #define LIS3_IRQ1_DISABLE (0 << 0) |
| 23 | #define LIS3_IRQ1_FF_WU_1 (1 << 0) |
| 24 | #define LIS3_IRQ1_FF_WU_2 (2 << 0) |
| 25 | #define LIS3_IRQ1_FF_WU_12 (3 << 0) |
| 26 | #define LIS3_IRQ1_DATA_READY (4 << 0) |
| 27 | #define LIS3_IRQ1_CLICK (7 << 0) |
Samu Onkalo | 6d94d40 | 2010-05-24 14:33:37 -0700 | [diff] [blame] | 28 | #define LIS3_IRQ1_MASK (7 << 0) |
Daniel Mack | 8f3128e | 2009-06-16 15:34:17 -0700 | [diff] [blame] | 29 | #define LIS3_IRQ2_DISABLE (0 << 3) |
| 30 | #define LIS3_IRQ2_FF_WU_1 (1 << 3) |
| 31 | #define LIS3_IRQ2_FF_WU_2 (2 << 3) |
| 32 | #define LIS3_IRQ2_FF_WU_12 (3 << 3) |
| 33 | #define LIS3_IRQ2_DATA_READY (4 << 3) |
| 34 | #define LIS3_IRQ2_CLICK (7 << 3) |
Samu Onkalo | 6d94d40 | 2010-05-24 14:33:37 -0700 | [diff] [blame] | 35 | #define LIS3_IRQ2_MASK (7 << 3) |
Daniel Mack | 8f3128e | 2009-06-16 15:34:17 -0700 | [diff] [blame] | 36 | #define LIS3_IRQ_OPEN_DRAIN (1 << 6) |
Daniel Mack | 0ec4891 | 2009-09-21 17:04:42 -0700 | [diff] [blame] | 37 | #define LIS3_IRQ_ACTIVE_LOW (1 << 7) |
Daniel Mack | 8f3128e | 2009-06-16 15:34:17 -0700 | [diff] [blame] | 38 | unsigned char irq_cfg; |
Samu Onkalo | cc23aa1 | 2010-10-22 07:57:29 -0400 | [diff] [blame^] | 39 | unsigned char irq_flags1; /* Additional irq edge / level flags */ |
| 40 | unsigned char irq_flags2; /* Additional irq edge / level flags */ |
| 41 | unsigned char duration1; |
| 42 | unsigned char duration2; |
Daniel Mack | 8873c33 | 2009-09-21 17:04:43 -0700 | [diff] [blame] | 43 | #define LIS3_WAKEUP_X_LO (1 << 0) |
| 44 | #define LIS3_WAKEUP_X_HI (1 << 1) |
| 45 | #define LIS3_WAKEUP_Y_LO (1 << 2) |
| 46 | #define LIS3_WAKEUP_Y_HI (1 << 3) |
| 47 | #define LIS3_WAKEUP_Z_LO (1 << 4) |
| 48 | #define LIS3_WAKEUP_Z_HI (1 << 5) |
| 49 | unsigned char wakeup_flags; |
| 50 | unsigned char wakeup_thresh; |
Samu Onkalo | 342c5f1 | 2010-05-24 14:33:35 -0700 | [diff] [blame] | 51 | unsigned char wakeup_flags2; |
| 52 | unsigned char wakeup_thresh2; |
| 53 | #define LIS3_HIPASS_CUTFF_8HZ 0 |
| 54 | #define LIS3_HIPASS_CUTFF_4HZ 1 |
| 55 | #define LIS3_HIPASS_CUTFF_2HZ 2 |
| 56 | #define LIS3_HIPASS_CUTFF_1HZ 3 |
| 57 | #define LIS3_HIPASS1_DISABLE (1 << 2) |
| 58 | #define LIS3_HIPASS2_DISABLE (1 << 3) |
| 59 | unsigned char hipass_ctrl; |
Samu Onkalo | e40d6ea | 2009-12-14 18:01:35 -0800 | [diff] [blame] | 60 | #define LIS3_NO_MAP 0 |
| 61 | #define LIS3_DEV_X 1 |
| 62 | #define LIS3_DEV_Y 2 |
| 63 | #define LIS3_DEV_Z 3 |
| 64 | #define LIS3_INV_DEV_X -1 |
| 65 | #define LIS3_INV_DEV_Y -2 |
| 66 | #define LIS3_INV_DEV_Z -3 |
| 67 | s8 axis_x; |
| 68 | s8 axis_y; |
| 69 | s8 axis_z; |
Samu Onkalo | f9deb41 | 2010-10-22 07:57:24 -0400 | [diff] [blame] | 70 | #define LIS3_USE_REGULATOR_CTRL 0x01 |
| 71 | u16 driver_features; |
Samu Onkalo | cc23aa1 | 2010-10-22 07:57:29 -0400 | [diff] [blame^] | 72 | int default_rate; |
Samu Onkalo | e40d6ea | 2009-12-14 18:01:35 -0800 | [diff] [blame] | 73 | int (*setup_resources)(void); |
| 74 | int (*release_resources)(void); |
Samu Onkalo | 2db4a76 | 2009-12-14 18:01:43 -0800 | [diff] [blame] | 75 | /* Limits for selftest are specified in chip data sheet */ |
| 76 | s16 st_min_limits[3]; /* min pass limit x, y, z */ |
| 77 | s16 st_max_limits[3]; /* max pass limit x, y, z */ |
Samu Onkalo | 92ba4fe | 2010-05-24 14:33:36 -0700 | [diff] [blame] | 78 | int irq2; |
Daniel Mack | 8f3128e | 2009-06-16 15:34:17 -0700 | [diff] [blame] | 79 | }; |
| 80 | |
| 81 | #endif /* __LIS3LV02D_H_ */ |