Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * The code contained herein is licensed under the GNU General Public |
| 5 | * License. You may obtain a copy of the GNU General Public License |
| 6 | * Version 2 or later at the following locations: |
| 7 | * |
| 8 | * http://www.opensource.org/licenses/gpl-license.html |
| 9 | * http://www.gnu.org/copyleft/gpl.html |
| 10 | */ |
| 11 | |
| 12 | #include <linux/clk.h> |
| 13 | #include <linux/err.h> |
| 14 | #include <linux/io.h> |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/of.h> |
| 18 | #include <linux/of_address.h> |
| 19 | #include <linux/platform_device.h> |
| 20 | #include <linux/pwm.h> |
| 21 | #include <linux/slab.h> |
Shawn Guo | 01bf32e | 2012-06-26 16:58:09 +0800 | [diff] [blame] | 22 | #include <linux/stmp_device.h> |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 23 | |
| 24 | #define SET 0x4 |
| 25 | #define CLR 0x8 |
| 26 | #define TOG 0xc |
| 27 | |
| 28 | #define PWM_CTRL 0x0 |
| 29 | #define PWM_ACTIVE0 0x10 |
| 30 | #define PWM_PERIOD0 0x20 |
| 31 | #define PERIOD_PERIOD(p) ((p) & 0xffff) |
| 32 | #define PERIOD_PERIOD_MAX 0x10000 |
| 33 | #define PERIOD_ACTIVE_HIGH (3 << 16) |
| 34 | #define PERIOD_INACTIVE_LOW (2 << 18) |
| 35 | #define PERIOD_CDIV(div) (((div) & 0x7) << 20) |
| 36 | #define PERIOD_CDIV_MAX 8 |
| 37 | |
Gaetan Hug | 24ccea1 | 2015-03-11 13:08:12 +0100 | [diff] [blame] | 38 | static const unsigned int cdiv[PERIOD_CDIV_MAX] = { |
| 39 | 1, 2, 4, 8, 16, 64, 256, 1024 |
| 40 | }; |
| 41 | |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 42 | struct mxs_pwm_chip { |
| 43 | struct pwm_chip chip; |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 44 | struct clk *clk; |
| 45 | void __iomem *base; |
| 46 | }; |
| 47 | |
| 48 | #define to_mxs_pwm_chip(_chip) container_of(_chip, struct mxs_pwm_chip, chip) |
| 49 | |
| 50 | static int mxs_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, |
| 51 | int duty_ns, int period_ns) |
| 52 | { |
| 53 | struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip); |
| 54 | int ret, div = 0; |
| 55 | unsigned int period_cycles, duty_cycles; |
| 56 | unsigned long rate; |
| 57 | unsigned long long c; |
| 58 | |
| 59 | rate = clk_get_rate(mxs->clk); |
| 60 | while (1) { |
Gaetan Hug | 24ccea1 | 2015-03-11 13:08:12 +0100 | [diff] [blame] | 61 | c = rate / cdiv[div]; |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 62 | c = c * period_ns; |
| 63 | do_div(c, 1000000000); |
| 64 | if (c < PERIOD_PERIOD_MAX) |
| 65 | break; |
| 66 | div++; |
Gaetan Hug | 24ccea1 | 2015-03-11 13:08:12 +0100 | [diff] [blame] | 67 | if (div >= PERIOD_CDIV_MAX) |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 68 | return -EINVAL; |
| 69 | } |
| 70 | |
| 71 | period_cycles = c; |
| 72 | c *= duty_ns; |
| 73 | do_div(c, period_ns); |
| 74 | duty_cycles = c; |
| 75 | |
| 76 | /* |
| 77 | * If the PWM channel is disabled, make sure to turn on the clock |
| 78 | * before writing the register. Otherwise, keep it enabled. |
| 79 | */ |
Boris Brezillon | 5c31252 | 2015-07-01 10:21:47 +0200 | [diff] [blame] | 80 | if (!pwm_is_enabled(pwm)) { |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 81 | ret = clk_prepare_enable(mxs->clk); |
| 82 | if (ret) |
| 83 | return ret; |
| 84 | } |
| 85 | |
| 86 | writel(duty_cycles << 16, |
| 87 | mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20); |
| 88 | writel(PERIOD_PERIOD(period_cycles) | PERIOD_ACTIVE_HIGH | |
| 89 | PERIOD_INACTIVE_LOW | PERIOD_CDIV(div), |
| 90 | mxs->base + PWM_PERIOD0 + pwm->hwpwm * 0x20); |
| 91 | |
| 92 | /* |
| 93 | * If the PWM is not enabled, turn the clock off again to save power. |
| 94 | */ |
Boris Brezillon | 5c31252 | 2015-07-01 10:21:47 +0200 | [diff] [blame] | 95 | if (!pwm_is_enabled(pwm)) |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 96 | clk_disable_unprepare(mxs->clk); |
| 97 | |
| 98 | return 0; |
| 99 | } |
| 100 | |
| 101 | static int mxs_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) |
| 102 | { |
| 103 | struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip); |
| 104 | int ret; |
| 105 | |
| 106 | ret = clk_prepare_enable(mxs->clk); |
| 107 | if (ret) |
| 108 | return ret; |
| 109 | |
| 110 | writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET); |
| 111 | |
| 112 | return 0; |
| 113 | } |
| 114 | |
| 115 | static void mxs_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) |
| 116 | { |
| 117 | struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip); |
| 118 | |
| 119 | writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR); |
| 120 | |
| 121 | clk_disable_unprepare(mxs->clk); |
| 122 | } |
| 123 | |
| 124 | static const struct pwm_ops mxs_pwm_ops = { |
| 125 | .config = mxs_pwm_config, |
| 126 | .enable = mxs_pwm_enable, |
| 127 | .disable = mxs_pwm_disable, |
| 128 | .owner = THIS_MODULE, |
| 129 | }; |
| 130 | |
| 131 | static int mxs_pwm_probe(struct platform_device *pdev) |
| 132 | { |
| 133 | struct device_node *np = pdev->dev.of_node; |
| 134 | struct mxs_pwm_chip *mxs; |
Shawn Guo | 22d260b | 2012-06-26 16:58:10 +0800 | [diff] [blame] | 135 | struct resource *res; |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 136 | int ret; |
| 137 | |
| 138 | mxs = devm_kzalloc(&pdev->dev, sizeof(*mxs), GFP_KERNEL); |
| 139 | if (!mxs) |
| 140 | return -ENOMEM; |
| 141 | |
Shawn Guo | 22d260b | 2012-06-26 16:58:10 +0800 | [diff] [blame] | 142 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Thierry Reding | 6d4294d | 2013-01-21 11:09:16 +0100 | [diff] [blame] | 143 | mxs->base = devm_ioremap_resource(&pdev->dev, res); |
| 144 | if (IS_ERR(mxs->base)) |
| 145 | return PTR_ERR(mxs->base); |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 146 | |
Shawn Guo | 22d260b | 2012-06-26 16:58:10 +0800 | [diff] [blame] | 147 | mxs->clk = devm_clk_get(&pdev->dev, NULL); |
| 148 | if (IS_ERR(mxs->clk)) |
| 149 | return PTR_ERR(mxs->clk); |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 150 | |
| 151 | mxs->chip.dev = &pdev->dev; |
| 152 | mxs->chip.ops = &mxs_pwm_ops; |
| 153 | mxs->chip.base = -1; |
Thierry Reding | 8c0216f | 2017-01-04 09:40:54 +0100 | [diff] [blame] | 154 | |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 155 | ret = of_property_read_u32(np, "fsl,pwm-number", &mxs->chip.npwm); |
| 156 | if (ret < 0) { |
| 157 | dev_err(&pdev->dev, "failed to get pwm number: %d\n", ret); |
Shawn Guo | 22d260b | 2012-06-26 16:58:10 +0800 | [diff] [blame] | 158 | return ret; |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 159 | } |
| 160 | |
| 161 | ret = pwmchip_add(&mxs->chip); |
| 162 | if (ret < 0) { |
| 163 | dev_err(&pdev->dev, "failed to add pwm chip %d\n", ret); |
Shawn Guo | 22d260b | 2012-06-26 16:58:10 +0800 | [diff] [blame] | 164 | return ret; |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 165 | } |
| 166 | |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 167 | platform_set_drvdata(pdev, mxs); |
| 168 | |
Fabio Estevam | cfb9e4c | 2013-07-09 23:25:37 -0300 | [diff] [blame] | 169 | ret = stmp_reset_block(mxs->base); |
| 170 | if (ret) |
| 171 | goto pwm_remove; |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 172 | |
| 173 | return 0; |
Fabio Estevam | cfb9e4c | 2013-07-09 23:25:37 -0300 | [diff] [blame] | 174 | |
| 175 | pwm_remove: |
| 176 | pwmchip_remove(&mxs->chip); |
| 177 | return ret; |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 178 | } |
| 179 | |
Bill Pemberton | 77f3791 | 2012-11-19 13:26:09 -0500 | [diff] [blame] | 180 | static int mxs_pwm_remove(struct platform_device *pdev) |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 181 | { |
| 182 | struct mxs_pwm_chip *mxs = platform_get_drvdata(pdev); |
| 183 | |
Axel Lin | 457fd76 | 2012-07-01 12:58:00 +0800 | [diff] [blame] | 184 | return pwmchip_remove(&mxs->chip); |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 185 | } |
| 186 | |
Thierry Reding | f1a8870 | 2013-04-18 10:04:14 +0200 | [diff] [blame] | 187 | static const struct of_device_id mxs_pwm_dt_ids[] = { |
Shawn Guo | 071407e | 2012-06-26 16:58:08 +0800 | [diff] [blame] | 188 | { .compatible = "fsl,imx23-pwm", }, |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 189 | { /* sentinel */ } |
| 190 | }; |
| 191 | MODULE_DEVICE_TABLE(of, mxs_pwm_dt_ids); |
| 192 | |
| 193 | static struct platform_driver mxs_pwm_driver = { |
| 194 | .driver = { |
| 195 | .name = "mxs-pwm", |
Sachin Kamat | de02cb8 | 2013-09-30 08:56:39 +0530 | [diff] [blame] | 196 | .of_match_table = mxs_pwm_dt_ids, |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 197 | }, |
| 198 | .probe = mxs_pwm_probe, |
Bill Pemberton | fd10911 | 2012-11-19 13:21:28 -0500 | [diff] [blame] | 199 | .remove = mxs_pwm_remove, |
Shawn Guo | 4dce82c | 2012-04-04 10:50:52 +0800 | [diff] [blame] | 200 | }; |
| 201 | module_platform_driver(mxs_pwm_driver); |
| 202 | |
| 203 | MODULE_ALIAS("platform:mxs-pwm"); |
| 204 | MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>"); |
| 205 | MODULE_DESCRIPTION("Freescale MXS PWM Driver"); |
| 206 | MODULE_LICENSE("GPL v2"); |