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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Russell King4baa9922008-08-02 10:55:55 +01002 * arch/arm/include/asm/ptrace.h
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
4 * Copyright (C) 1996-2003 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARM_PTRACE_H
11#define __ASM_ARM_PTRACE_H
12
David Howellscb8db5d2012-10-12 13:05:52 +010013#include <uapi/asm/ptrace.h>
Paul Brook68b7f7152009-07-24 12:34:58 +010014
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#ifndef __ASSEMBLY__
Jamie Iles092a4e92010-01-06 10:50:08 +010016struct pt_regs {
17 unsigned long uregs[18];
18};
Linus Torvalds1da177e2005-04-16 15:20:36 -070019
20#define user_mode(regs) \
21 (((regs)->ARM_cpsr & 0xf) == 0)
22
23#ifdef CONFIG_ARM_THUMB
24#define thumb_mode(regs) \
25 (((regs)->ARM_cpsr & PSR_T_BIT))
26#else
27#define thumb_mode(regs) (0)
28#endif
29
Uwe Kleine-König3f18b1b2013-12-16 10:24:46 +010030#ifndef CONFIG_CPU_V7M
George G. Davis909d6c62007-06-26 01:38:27 +010031#define isa_mode(regs) \
Uwe Kleine-König3f18b1b2013-12-16 10:24:46 +010032 ((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \
33 (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT))))
34#else
35#define isa_mode(regs) 1 /* Thumb */
36#endif
George G. Davis909d6c62007-06-26 01:38:27 +010037
Linus Torvalds1da177e2005-04-16 15:20:36 -070038#define processor_mode(regs) \
39 ((regs)->ARM_cpsr & MODE_MASK)
40
41#define interrupts_enabled(regs) \
42 (!((regs)->ARM_cpsr & PSR_I_BIT))
43
44#define fast_interrupts_enabled(regs) \
45 (!((regs)->ARM_cpsr & PSR_F_BIT))
46
Linus Torvalds1da177e2005-04-16 15:20:36 -070047/* Are the current registers suitable for user mode?
48 * (used to maintain security in signal handlers)
49 */
50static inline int valid_user_regs(struct pt_regs *regs)
51{
Catalin Marinas55bdd692010-05-21 18:06:41 +010052#ifndef CONFIG_CPU_V7M
Russell King41e2e8f2010-08-13 23:33:46 +010053 unsigned long mode = regs->ARM_cpsr & MODE_MASK;
54
55 /*
56 * Always clear the F (FIQ) and A (delayed abort) bits
57 */
58 regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
59
60 if ((regs->ARM_cpsr & PSR_I_BIT) == 0) {
61 if (mode == USR_MODE)
62 return 1;
63 if (elf_hwcap & HWCAP_26BIT && mode == USR26_MODE)
64 return 1;
Catalin Marinasd1cbbd62007-07-11 11:29:39 +010065 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070066
67 /*
68 * Force CPSR to something logical...
69 */
Russell King41e2e8f2010-08-13 23:33:46 +010070 regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;
Catalin Marinasd1cbbd62007-07-11 11:29:39 +010071 if (!(elf_hwcap & HWCAP_26BIT))
72 regs->ARM_cpsr |= USR_MODE;
Linus Torvalds1da177e2005-04-16 15:20:36 -070073
74 return 0;
Catalin Marinas55bdd692010-05-21 18:06:41 +010075#else /* ifndef CONFIG_CPU_V7M */
76 return 1;
77#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070078}
79
Nathaniel Husted29ef73b2012-01-03 14:23:09 -050080static inline long regs_return_value(struct pt_regs *regs)
81{
82 return regs->ARM_r0;
83}
84
Russell King1de765c2008-09-06 10:14:24 +010085#define instruction_pointer(regs) (regs)->ARM_pc
Linus Torvalds1da177e2005-04-16 15:20:36 -070086
David A. Longc7edc9e2014-03-07 11:23:04 -050087static inline void instruction_pointer_set(struct pt_regs *regs,
88 unsigned long val)
89{
90 instruction_pointer(regs) = val;
91}
92
Linus Torvalds1da177e2005-04-16 15:20:36 -070093#ifdef CONFIG_SMP
94extern unsigned long profile_pc(struct pt_regs *regs);
95#else
96#define profile_pc(regs) instruction_pointer(regs)
97#endif
98
Russell King652a12e2005-04-17 15:50:36 +010099#define predicate(x) ((x) & 0xf0000000)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700100#define PREDICATE_ALWAYS 0xe0000000
Adrian Bunkf22ab812008-07-25 01:47:34 -0700101
Will Deacone513f8b2010-06-25 12:24:53 +0100102/*
Jon Medhurst592201a2011-03-26 19:19:07 +0000103 * True if instr is a 32-bit thumb instruction. This works if instr
104 * is the first or only half-word of a thumb instruction. It also works
105 * when instr holds all 32-bits of a wide thumb instruction if stored
106 * in the form (first_half<<16)|(second_half)
107 */
108#define is_wide_instruction(instr) ((unsigned)(instr) >= 0xe800)
109
110/*
Will Deacone513f8b2010-06-25 12:24:53 +0100111 * kprobe-based event tracer support
112 */
113#include <linux/stddef.h>
114#include <linux/types.h>
115#define MAX_REG_OFFSET (offsetof(struct pt_regs, ARM_ORIG_r0))
116
117extern int regs_query_register_offset(const char *name);
118extern const char *regs_query_register_name(unsigned int offset);
119extern bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr);
120extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
121 unsigned int n);
122
123/**
124 * regs_get_register() - get register value from its offset
125 * @regs: pt_regs from which register value is gotten
126 * @offset: offset number of the register.
127 *
128 * regs_get_register returns the value of a register whose offset from @regs.
129 * The @offset is the offset of the register in struct pt_regs.
130 * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
131 */
132static inline unsigned long regs_get_register(struct pt_regs *regs,
133 unsigned int offset)
134{
135 if (unlikely(offset > MAX_REG_OFFSET))
136 return 0;
137 return *(unsigned long *)((unsigned long)regs + offset);
138}
139
140/* Valid only for Kernel mode traps. */
141static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
142{
143 return regs->ARM_sp;
144}
145
Wade Farnsworth0693bf62012-04-04 16:19:47 +0100146static inline unsigned long user_stack_pointer(struct pt_regs *regs)
147{
148 return regs->ARM_sp;
149}
150
Al Virobfd170d2012-08-02 11:49:43 +0400151#define current_pt_regs(void) ({ \
152 register unsigned long sp asm ("sp"); \
153 (struct pt_regs *)((sp | (THREAD_SIZE - 1)) - 7) - 1; \
154})
155
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156#endif /* __ASSEMBLY__ */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157#endif