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gerrit-public.fairphone.software / kernel / msm-4.19 / cd187753dc24e269080520aae5ee753414ba9edc / . / arch / powerpc / include / asm / book3s / 64 / hash-4k.h
blob: b4b5e6b671ca4dedc27fc35d59b30d4ad488e1c3 [file] [log] [blame]
Aneesh Kumar K.Vab537dc2015-12-01 09:06:30 +0530[diff] [blame]1#ifndef _ASM_POWERPC_BOOK3S_64_HASH_4K_H
2#define _ASM_POWERPC_BOOK3S_64_HASH_4K_H
3/*
4 * Entries per page directory level. The PTE level must use a 64b record
5 * for each page table entry. The PMD and PGD level use a 32b record for
6 * each entry by assuming that each entry is page aligned.
7 */
Aneesh Kumar K.Vdd1842a2016-04-29 23:25:49 +1000[diff] [blame]8#define H_PTE_INDEX_SIZE 9
9#define H_PMD_INDEX_SIZE 7
10#define H_PUD_INDEX_SIZE 9
Aneesh Kumar K.Vf6eedbb2017-03-22 09:06:57 +0530[diff] [blame]11#define H_PGD_INDEX_SIZE 12
Aneesh Kumar K.Vab537dc2015-12-01 09:06:30 +0530[diff] [blame]12
13#ifndef __ASSEMBLY__
Aneesh Kumar K.Vdd1842a2016-04-29 23:25:49 +1000[diff] [blame]14#define H_PTE_TABLE_SIZE (sizeof(pte_t) << H_PTE_INDEX_SIZE)
15#define H_PMD_TABLE_SIZE (sizeof(pmd_t) << H_PMD_INDEX_SIZE)
16#define H_PUD_TABLE_SIZE (sizeof(pud_t) << H_PUD_INDEX_SIZE)
17#define H_PGD_TABLE_SIZE (sizeof(pgd_t) << H_PGD_INDEX_SIZE)
Aneesh Kumar K.Vab537dc2015-12-01 09:06:30 +0530[diff] [blame]18
Benjamin Herrenschmidtc6057822009-03-10 17:53:29 +0000[diff] [blame]19/* PTE flags to conserve for HPTE identification */
Aneesh Kumar K.V945537d2016-04-29 23:25:45 +1000[diff] [blame]20#define _PAGE_HPTEFLAGS (H_PAGE_BUSY | H_PAGE_HASHPTE | \
21 H_PAGE_F_SECOND | H_PAGE_F_GIX)
22/*
23 * Not supported by 4k linux page size
24 */
25#define H_PAGE_4K_PFN 0x0
26#define H_PAGE_THP_HUGE 0x0
27#define H_PAGE_COMBO 0x0
Aneesh Kumar K.V5ed7ecd2016-04-29 23:26:23 +1000[diff] [blame]28#define H_PTE_FRAG_NR 0
29#define H_PTE_FRAG_SIZE_SHIFT 0
Aneesh Kumar K.Vab537dc2015-12-01 09:06:30 +0530[diff] [blame]30/*
Aneesh Kumar K.V368ced72016-03-01 09:45:13 +0530[diff] [blame]31 * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range()
Aneesh Kumar K.Vab537dc2015-12-01 09:06:30 +0530[diff] [blame]32 */
Aneesh Kumar K.Vab537dc2015-12-01 09:06:30 +0530[diff] [blame]33#define remap_4k_pfn(vma, addr, pfn, prot) \
34 remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
35
Aneesh Kumar K.V26a344a2015-12-01 09:06:52 +0530[diff] [blame]36#ifdef CONFIG_HUGETLB_PAGE
Aneesh Kumar K.Vc0a6c712016-04-29 23:26:27 +1000[diff] [blame]37static inline int hash__hugepd_ok(hugepd_t hpd)
Aneesh Kumar K.V26a344a2015-12-01 09:06:52 +0530[diff] [blame]38{
Aneesh Kumar K.V20717e12016-12-14 10:07:53 +0530[diff] [blame]39 unsigned long hpdval = hpd_val(hpd);
Aneesh Kumar K.V26a344a2015-12-01 09:06:52 +0530[diff] [blame]40 /*
Aneesh Kumar K.V6a119ea2015-12-01 09:06:54 +0530[diff] [blame]41 * if it is not a pte and have hugepd shift mask
42 * set, then it is a hugepd directory pointer
Aneesh Kumar K.V26a344a2015-12-01 09:06:52 +0530[diff] [blame]43 */
Aneesh Kumar K.V20717e12016-12-14 10:07:53 +0530[diff] [blame]44 if (!(hpdval & _PAGE_PTE) &&
45 ((hpdval & HUGEPD_SHIFT_MASK) != 0))
Aneesh Kumar K.V6a119ea2015-12-01 09:06:54 +0530[diff] [blame]46 return true;
47 return false;
Aneesh Kumar K.V26a344a2015-12-01 09:06:52 +0530[diff] [blame]48}
Aneesh Kumar K.V26a344a2015-12-01 09:06:52 +0530[diff] [blame]49#endif
50
Aneesh Kumar K.Vab624762016-04-29 23:26:31 +1000[diff] [blame]51#ifdef CONFIG_TRANSPARENT_HUGEPAGE
52
53static inline char *get_hpte_slot_array(pmd_t *pmdp)
54{
55 BUG();
56 return NULL;
57}
58
59static inline unsigned int hpte_valid(unsigned char *hpte_slot_array, int index)
60{
61 BUG();
62 return 0;
63}
64
65static inline unsigned int hpte_hash_index(unsigned char *hpte_slot_array,
66 int index)
67{
68 BUG();
69 return 0;
70}
71
72static inline void mark_hpte_slot_valid(unsigned char *hpte_slot_array,
73 unsigned int index, unsigned int hidx)
74{
75 BUG();
76}
77
78static inline int hash__pmd_trans_huge(pmd_t pmd)
79{
80 return 0;
81}
82
83static inline int hash__pmd_same(pmd_t pmd_a, pmd_t pmd_b)
84{
85 BUG();
86 return 0;
87}
88
89static inline pmd_t hash__pmd_mkhuge(pmd_t pmd)
90{
91 BUG();
92 return pmd;
93}
94
95extern unsigned long hash__pmd_hugepage_update(struct mm_struct *mm,
96 unsigned long addr, pmd_t *pmdp,
97 unsigned long clr, unsigned long set);
98extern pmd_t hash__pmdp_collapse_flush(struct vm_area_struct *vma,
99 unsigned long address, pmd_t *pmdp);
100extern void hash__pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
101 pgtable_t pgtable);
102extern pgtable_t hash__pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
103extern void hash__pmdp_huge_split_prepare(struct vm_area_struct *vma,
104 unsigned long address, pmd_t *pmdp);
105extern pmd_t hash__pmdp_huge_get_and_clear(struct mm_struct *mm,
106 unsigned long addr, pmd_t *pmdp);
107extern int hash__has_transparent_hugepage(void);
108#endif
109
Aneesh Kumar K.Vab537dc2015-12-01 09:06:30 +0530[diff] [blame]110#endif /* !__ASSEMBLY__ */
111
112#endif /* _ASM_POWERPC_BOOK3S_64_HASH_4K_H */