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Russell King208d7baf2013-09-27 20:07:26 +01001/*
2 * Copyright (C) 2013,2014 Russell King
3 *
4 * This describes the hookup for an AR8035 to the iMX6 on the SolidRun
5 * MicroSOM.
Russell King42919c52015-03-02 20:00:50 +00006 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is free software; you can redistribute it and/or
Fabio Estevamf4b59392015-05-20 15:57:02 -030013 * modify it under the terms of the GNU General Public License
14 * version 2 as published by the Free Software Foundation.
Russell King42919c52015-03-02 20:00:50 +000015 *
Alexandre Belloni13283622017-01-03 11:27:13 +010016 * This file is distributed in the hope that it will be useful,
Russell King42919c52015-03-02 20:00:50 +000017 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
Alexandre Belloni13283622017-01-03 11:27:13 +010021 * Or, alternatively,
Russell King42919c52015-03-02 20:00:50 +000022 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
Alexandre Belloni13283622017-01-03 11:27:13 +010026 * restriction, including without limitation the rights to use,
Russell King42919c52015-03-02 20:00:50 +000027 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
Alexandre Belloni13283622017-01-03 11:27:13 +010035 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
Russell King42919c52015-03-02 20:00:50 +000036 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
Alexandre Belloni13283622017-01-03 11:27:13 +010039 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
Russell King42919c52015-03-02 20:00:50 +000040 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
Russell King208d7baf2013-09-27 20:07:26 +010043 */
44&fec {
45 pinctrl-names = "default";
46 pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
47 phy-mode = "rgmii";
48 phy-reset-duration = <2>;
Fabio Estevam12de44f2017-06-04 14:31:15 -030049 phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
Russell King208d7baf2013-09-27 20:07:26 +010050 status = "okay";
51};
52
53&iomuxc {
54 enet {
55 pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
56 fsl,pins = <
Rabeeh Khourybf814722014-08-23 10:11:21 +010057 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0
Russell King208d7baf2013-09-27 20:07:26 +010058 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
59 /* AR8035 reset */
60 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0
61 /* AR8035 interrupt */
62 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x80000000
63 /* GPIO16 -> AR8035 25MHz */
64 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000
65 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000
Russell King2e3b9652014-04-06 23:32:25 +010066 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
67 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
68 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
69 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
70 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
Russell King208d7baf2013-09-27 20:07:26 +010071 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
72 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1
73 /* AR8035 pin strapping: IO voltage: pull up */
Russell King2e3b9652014-04-06 23:32:25 +010074 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
Russell King208d7baf2013-09-27 20:07:26 +010075 /* AR8035 pin strapping: PHYADDR#0: pull down */
Russell King2e3b9652014-04-06 23:32:25 +010076 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030
Russell King208d7baf2013-09-27 20:07:26 +010077 /* AR8035 pin strapping: PHYADDR#1: pull down */
Russell King2e3b9652014-04-06 23:32:25 +010078 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030
Russell King208d7baf2013-09-27 20:07:26 +010079 /* AR8035 pin strapping: MODE#1: pull up */
Russell King2e3b9652014-04-06 23:32:25 +010080 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
Russell King208d7baf2013-09-27 20:07:26 +010081 /* AR8035 pin strapping: MODE#3: pull up */
Russell King2e3b9652014-04-06 23:32:25 +010082 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
Russell King208d7baf2013-09-27 20:07:26 +010083 /* AR8035 pin strapping: MODE#0: pull down */
Russell King2e3b9652014-04-06 23:32:25 +010084 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030
Russell King208d7baf2013-09-27 20:07:26 +010085
86 /*
87 * As the RMII pins are also connected to RGMII
88 * so that an AR8030 can be placed, set these
89 * to high-z with the same pulls as above.
90 * Use the GPIO settings to avoid changing the
91 * input select registers.
92 */
93 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x03000
94 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x03000
95 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x03000
96 >;
97 };
98 };
99};