Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/plat-omap/include/mach/sram.h |
| 3 | * |
| 4 | * Interface for functions that need to be run in internal SRAM |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #ifndef __ARCH_ARM_OMAP_SRAM_H |
| 12 | #define __ARCH_ARM_OMAP_SRAM_H |
| 13 | |
| 14 | extern int __init omap_sram_init(void); |
| 15 | extern void * omap_sram_push(void * start, unsigned long size); |
| 16 | extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); |
| 17 | |
| 18 | extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, |
| 19 | u32 base_cs, u32 force_unlock); |
| 20 | extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, |
| 21 | u32 mem_type); |
| 22 | extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); |
| 23 | |
Jean Pihet | 58cda88 | 2009-07-24 19:43:25 -0600 | [diff] [blame] | 24 | extern u32 omap3_configure_core_dpll( |
| 25 | u32 m2, u32 unlock_dll, u32 f, u32 inc, |
| 26 | u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, |
| 27 | u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, |
| 28 | u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, |
| 29 | u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 30 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 31 | /* Do not use these */ |
| 32 | extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); |
| 33 | extern unsigned long omap1_sram_reprogram_clock_sz; |
| 34 | |
| 35 | extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl); |
| 36 | extern unsigned long omap24xx_sram_reprogram_clock_sz; |
| 37 | |
| 38 | extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, |
| 39 | u32 base_cs, u32 force_unlock); |
| 40 | extern unsigned long omap242x_sram_ddr_init_sz; |
| 41 | |
| 42 | extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, |
| 43 | int bypass); |
| 44 | extern unsigned long omap242x_sram_set_prcm_sz; |
| 45 | |
| 46 | extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, |
| 47 | u32 mem_type); |
| 48 | extern unsigned long omap242x_sram_reprogram_sdrc_sz; |
| 49 | |
| 50 | |
| 51 | extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, |
| 52 | u32 base_cs, u32 force_unlock); |
| 53 | extern unsigned long omap243x_sram_ddr_init_sz; |
| 54 | |
| 55 | extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, |
| 56 | int bypass); |
| 57 | extern unsigned long omap243x_sram_set_prcm_sz; |
| 58 | |
| 59 | extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, |
| 60 | u32 mem_type); |
| 61 | extern unsigned long omap243x_sram_reprogram_sdrc_sz; |
| 62 | |
Jean Pihet | 58cda88 | 2009-07-24 19:43:25 -0600 | [diff] [blame] | 63 | extern u32 omap3_sram_configure_core_dpll( |
| 64 | u32 m2, u32 unlock_dll, u32 f, u32 inc, |
| 65 | u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, |
| 66 | u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, |
| 67 | u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, |
| 68 | u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 69 | extern unsigned long omap3_sram_configure_core_dpll_sz; |
| 70 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 71 | #endif |