Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1 | /* |
Keith Packard | 3950725 | 2011-09-22 12:30:16 -0700 | [diff] [blame] | 2 | * Copyright © 2006 Intel Corporation |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 21 | * SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Eric Anholt <eric@anholt.net> |
| 25 | * |
| 26 | */ |
Daniel Vetter | 25e341c | 2012-03-24 23:51:30 +0100 | [diff] [blame] | 27 | #include <linux/dmi.h> |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 28 | #include <drm/drm_dp_helper.h> |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 29 | #include <drm/drmP.h> |
| 30 | #include <drm/i915_drm.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 31 | #include "i915_drv.h" |
| 32 | #include "intel_bios.h" |
| 33 | |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 34 | #define SLAVE_ADDR1 0x70 |
| 35 | #define SLAVE_ADDR2 0x72 |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 36 | |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 37 | static int panel_type; |
| 38 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 39 | static void * |
| 40 | find_section(struct bdb_header *bdb, int section_id) |
| 41 | { |
| 42 | u8 *base = (u8 *)bdb; |
| 43 | int index = 0; |
| 44 | u16 total, current_size; |
| 45 | u8 current_id; |
| 46 | |
| 47 | /* skip to first section */ |
| 48 | index += bdb->header_size; |
| 49 | total = bdb->bdb_size; |
| 50 | |
| 51 | /* walk the sections looking for section_id */ |
Chris Wilson | d1f13fd | 2014-04-18 18:04:23 -0300 | [diff] [blame] | 52 | while (index + 3 < total) { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 53 | current_id = *(base + index); |
| 54 | index++; |
Chris Wilson | d1f13fd | 2014-04-18 18:04:23 -0300 | [diff] [blame] | 55 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 56 | current_size = *((u16 *)(base + index)); |
| 57 | index += 2; |
Chris Wilson | d1f13fd | 2014-04-18 18:04:23 -0300 | [diff] [blame] | 58 | |
| 59 | if (index + current_size > total) |
| 60 | return NULL; |
| 61 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 62 | if (current_id == section_id) |
| 63 | return base + index; |
Chris Wilson | d1f13fd | 2014-04-18 18:04:23 -0300 | [diff] [blame] | 64 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 65 | index += current_size; |
| 66 | } |
| 67 | |
| 68 | return NULL; |
| 69 | } |
| 70 | |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 71 | static u16 |
| 72 | get_blocksize(void *p) |
| 73 | { |
| 74 | u16 *block_ptr, block_size; |
| 75 | |
| 76 | block_ptr = (u16 *)((char *)p - 2); |
| 77 | block_size = *block_ptr; |
| 78 | return block_size; |
| 79 | } |
| 80 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 81 | static void |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 82 | fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 83 | const struct lvds_dvo_timing *dvo_timing) |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 84 | { |
| 85 | panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | |
| 86 | dvo_timing->hactive_lo; |
| 87 | panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + |
| 88 | ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); |
| 89 | panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + |
| 90 | dvo_timing->hsync_pulse_width; |
| 91 | panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + |
| 92 | ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); |
| 93 | |
| 94 | panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | |
| 95 | dvo_timing->vactive_lo; |
| 96 | panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + |
| 97 | dvo_timing->vsync_off; |
| 98 | panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + |
| 99 | dvo_timing->vsync_pulse_width; |
| 100 | panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + |
| 101 | ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); |
| 102 | panel_fixed_mode->clock = dvo_timing->clock * 10; |
| 103 | panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; |
| 104 | |
Adam Jackson | 9bc3549 | 2010-05-28 17:17:37 -0400 | [diff] [blame] | 105 | if (dvo_timing->hsync_positive) |
| 106 | panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; |
| 107 | else |
| 108 | panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; |
| 109 | |
| 110 | if (dvo_timing->vsync_positive) |
| 111 | panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; |
| 112 | else |
| 113 | panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; |
| 114 | |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 115 | /* Some VBTs have bogus h/vtotal values */ |
| 116 | if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) |
| 117 | panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; |
| 118 | if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) |
| 119 | panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; |
| 120 | |
| 121 | drm_mode_set_name(panel_fixed_mode); |
| 122 | } |
| 123 | |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 124 | static bool |
| 125 | lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a, |
| 126 | const struct lvds_dvo_timing *b) |
| 127 | { |
| 128 | if (a->hactive_hi != b->hactive_hi || |
| 129 | a->hactive_lo != b->hactive_lo) |
| 130 | return false; |
| 131 | |
| 132 | if (a->hsync_off_hi != b->hsync_off_hi || |
| 133 | a->hsync_off_lo != b->hsync_off_lo) |
| 134 | return false; |
| 135 | |
| 136 | if (a->hsync_pulse_width != b->hsync_pulse_width) |
| 137 | return false; |
| 138 | |
| 139 | if (a->hblank_hi != b->hblank_hi || |
| 140 | a->hblank_lo != b->hblank_lo) |
| 141 | return false; |
| 142 | |
| 143 | if (a->vactive_hi != b->vactive_hi || |
| 144 | a->vactive_lo != b->vactive_lo) |
| 145 | return false; |
| 146 | |
| 147 | if (a->vsync_off != b->vsync_off) |
| 148 | return false; |
| 149 | |
| 150 | if (a->vsync_pulse_width != b->vsync_pulse_width) |
| 151 | return false; |
| 152 | |
| 153 | if (a->vblank_hi != b->vblank_hi || |
| 154 | a->vblank_lo != b->vblank_lo) |
| 155 | return false; |
| 156 | |
| 157 | return true; |
| 158 | } |
| 159 | |
| 160 | static const struct lvds_dvo_timing * |
| 161 | get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, |
| 162 | const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, |
| 163 | int index) |
| 164 | { |
| 165 | /* |
| 166 | * the size of fp_timing varies on the different platform. |
| 167 | * So calculate the DVO timing relative offset in LVDS data |
| 168 | * entry to get the DVO timing entry |
| 169 | */ |
| 170 | |
| 171 | int lfp_data_size = |
| 172 | lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - |
| 173 | lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; |
| 174 | int dvo_timing_offset = |
| 175 | lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - |
| 176 | lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; |
| 177 | char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index; |
| 178 | |
| 179 | return (struct lvds_dvo_timing *)(entry + dvo_timing_offset); |
| 180 | } |
| 181 | |
Takashi Iwai | b035438 | 2012-03-20 13:07:05 +0100 | [diff] [blame] | 182 | /* get lvds_fp_timing entry |
| 183 | * this function may return NULL if the corresponding entry is invalid |
| 184 | */ |
| 185 | static const struct lvds_fp_timing * |
| 186 | get_lvds_fp_timing(const struct bdb_header *bdb, |
| 187 | const struct bdb_lvds_lfp_data *data, |
| 188 | const struct bdb_lvds_lfp_data_ptrs *ptrs, |
| 189 | int index) |
| 190 | { |
| 191 | size_t data_ofs = (const u8 *)data - (const u8 *)bdb; |
| 192 | u16 data_size = ((const u16 *)data)[-1]; /* stored in header */ |
| 193 | size_t ofs; |
| 194 | |
| 195 | if (index >= ARRAY_SIZE(ptrs->ptr)) |
| 196 | return NULL; |
| 197 | ofs = ptrs->ptr[index].fp_timing_offset; |
| 198 | if (ofs < data_ofs || |
| 199 | ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size) |
| 200 | return NULL; |
| 201 | return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs); |
| 202 | } |
| 203 | |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 204 | /* Try to find integrated panel data */ |
| 205 | static void |
| 206 | parse_lfp_panel_data(struct drm_i915_private *dev_priv, |
| 207 | struct bdb_header *bdb) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 208 | { |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 209 | const struct bdb_lvds_options *lvds_options; |
| 210 | const struct bdb_lvds_lfp_data *lvds_lfp_data; |
| 211 | const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; |
| 212 | const struct lvds_dvo_timing *panel_dvo_timing; |
Takashi Iwai | b035438 | 2012-03-20 13:07:05 +0100 | [diff] [blame] | 213 | const struct lvds_fp_timing *fp_timing; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 214 | struct drm_display_mode *panel_fixed_mode; |
Pradeep Bhat | 83a7280 | 2014-03-28 10:14:57 +0530 | [diff] [blame] | 215 | int i, downclock, drrs_mode; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 216 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 217 | lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); |
| 218 | if (!lvds_options) |
| 219 | return; |
| 220 | |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 221 | dev_priv->vbt.lvds_dither = lvds_options->pixel_dither; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 222 | if (lvds_options->panel_type == 0xff) |
| 223 | return; |
Simon Que | 6a04002 | 2010-09-30 09:36:39 +0100 | [diff] [blame] | 224 | |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 225 | panel_type = lvds_options->panel_type; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 226 | |
Pradeep Bhat | 83a7280 | 2014-03-28 10:14:57 +0530 | [diff] [blame] | 227 | drrs_mode = (lvds_options->dps_panel_type_bits |
| 228 | >> (panel_type * 2)) & MODE_MASK; |
| 229 | /* |
| 230 | * VBT has static DRRS = 0 and seamless DRRS = 2. |
| 231 | * The below piece of code is required to adjust vbt.drrs_type |
| 232 | * to match the enum drrs_support_type. |
| 233 | */ |
| 234 | switch (drrs_mode) { |
| 235 | case 0: |
| 236 | dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT; |
| 237 | DRM_DEBUG_KMS("DRRS supported mode is static\n"); |
| 238 | break; |
| 239 | case 2: |
| 240 | dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT; |
| 241 | DRM_DEBUG_KMS("DRRS supported mode is seamless\n"); |
| 242 | break; |
| 243 | default: |
| 244 | dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; |
| 245 | DRM_DEBUG_KMS("DRRS not supported (VBT input)\n"); |
| 246 | break; |
| 247 | } |
| 248 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 249 | lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); |
| 250 | if (!lvds_lfp_data) |
| 251 | return; |
| 252 | |
Jesse Barnes | 1b16de0 | 2009-06-22 11:30:30 -0700 | [diff] [blame] | 253 | lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); |
| 254 | if (!lvds_lfp_data_ptrs) |
| 255 | return; |
| 256 | |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 257 | dev_priv->vbt.lvds_vbt = 1; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 258 | |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 259 | panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, |
| 260 | lvds_lfp_data_ptrs, |
| 261 | lvds_options->panel_type); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 262 | |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 263 | panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); |
Chris Wilson | 6edc324 | 2010-09-12 17:16:17 +0100 | [diff] [blame] | 264 | if (!panel_fixed_mode) |
| 265 | return; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 266 | |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 267 | fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 268 | |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 269 | dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 270 | |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 271 | DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 272 | drm_mode_debug_printmodeline(panel_fixed_mode); |
| 273 | |
Zhao Yakui | d1fcea6a | 2009-11-20 11:24:17 +0800 | [diff] [blame] | 274 | /* |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 275 | * Iterate over the LVDS panel timing info to find the lowest clock |
| 276 | * for the native resolution. |
Zhao Yakui | d1fcea6a | 2009-11-20 11:24:17 +0800 | [diff] [blame] | 277 | */ |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 278 | downclock = panel_dvo_timing->clock; |
Zhao Yakui | d1fcea6a | 2009-11-20 11:24:17 +0800 | [diff] [blame] | 279 | for (i = 0; i < 16; i++) { |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 280 | const struct lvds_dvo_timing *dvo_timing; |
Zhao Yakui | d1fcea6a | 2009-11-20 11:24:17 +0800 | [diff] [blame] | 281 | |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 282 | dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, |
| 283 | lvds_lfp_data_ptrs, |
| 284 | i); |
| 285 | if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) && |
| 286 | dvo_timing->clock < downclock) |
| 287 | downclock = dvo_timing->clock; |
Zhao Yakui | d1fcea6a | 2009-11-20 11:24:17 +0800 | [diff] [blame] | 288 | } |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 289 | |
Jani Nikula | d330a95 | 2014-01-21 11:24:25 +0200 | [diff] [blame] | 290 | if (downclock < panel_dvo_timing->clock && i915.lvds_downclock) { |
Zhao Yakui | d1fcea6a | 2009-11-20 11:24:17 +0800 | [diff] [blame] | 291 | dev_priv->lvds_downclock_avail = 1; |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 292 | dev_priv->lvds_downclock = downclock * 10; |
Joe Perches | bbb0aef5 | 2011-04-17 20:35:52 -0700 | [diff] [blame] | 293 | DRM_DEBUG_KMS("LVDS downclock is found in VBT. " |
| 294 | "Normal Clock %dKHz, downclock %dKHz\n", |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 295 | panel_fixed_mode->clock, 10*downclock); |
Zhao Yakui | d1fcea6a | 2009-11-20 11:24:17 +0800 | [diff] [blame] | 296 | } |
Takashi Iwai | b035438 | 2012-03-20 13:07:05 +0100 | [diff] [blame] | 297 | |
| 298 | fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data, |
| 299 | lvds_lfp_data_ptrs, |
| 300 | lvds_options->panel_type); |
| 301 | if (fp_timing) { |
| 302 | /* check the resolution, just to be sure */ |
| 303 | if (fp_timing->x_res == panel_fixed_mode->hdisplay && |
| 304 | fp_timing->y_res == panel_fixed_mode->vdisplay) { |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 305 | dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val; |
Takashi Iwai | b035438 | 2012-03-20 13:07:05 +0100 | [diff] [blame] | 306 | DRM_DEBUG_KMS("VBT initial LVDS value %x\n", |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 307 | dev_priv->vbt.bios_lvds_val); |
Takashi Iwai | b035438 | 2012-03-20 13:07:05 +0100 | [diff] [blame] | 308 | } |
| 309 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 310 | } |
| 311 | |
Jani Nikula | f00076d | 2013-12-14 20:38:29 -0200 | [diff] [blame] | 312 | static void |
| 313 | parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb) |
| 314 | { |
| 315 | const struct bdb_lfp_backlight_data *backlight_data; |
| 316 | const struct bdb_lfp_backlight_data_entry *entry; |
| 317 | |
| 318 | backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); |
| 319 | if (!backlight_data) |
| 320 | return; |
| 321 | |
| 322 | if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { |
| 323 | DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n", |
| 324 | backlight_data->entry_size); |
| 325 | return; |
| 326 | } |
| 327 | |
| 328 | entry = &backlight_data->data[panel_type]; |
| 329 | |
Jani Nikula | 39fbc9c | 2014-04-09 11:22:06 +0300 | [diff] [blame] | 330 | dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; |
| 331 | if (!dev_priv->vbt.backlight.present) { |
| 332 | DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n", |
| 333 | entry->type); |
| 334 | return; |
| 335 | } |
| 336 | |
Jani Nikula | f00076d | 2013-12-14 20:38:29 -0200 | [diff] [blame] | 337 | dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; |
| 338 | dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm; |
Jani Nikula | 1de6068 | 2014-06-24 18:27:39 +0300 | [diff] [blame] | 339 | dev_priv->vbt.backlight.min_brightness = entry->min_brightness; |
Jani Nikula | f00076d | 2013-12-14 20:38:29 -0200 | [diff] [blame] | 340 | DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, " |
| 341 | "active %s, min brightness %u, level %u\n", |
| 342 | dev_priv->vbt.backlight.pwm_freq_hz, |
| 343 | dev_priv->vbt.backlight.active_low_pwm ? "low" : "high", |
Jani Nikula | 1de6068 | 2014-06-24 18:27:39 +0300 | [diff] [blame] | 344 | dev_priv->vbt.backlight.min_brightness, |
Jani Nikula | f00076d | 2013-12-14 20:38:29 -0200 | [diff] [blame] | 345 | backlight_data->level[panel_type]); |
| 346 | } |
| 347 | |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 348 | /* Try to find sdvo panel data */ |
| 349 | static void |
| 350 | parse_sdvo_panel_data(struct drm_i915_private *dev_priv, |
| 351 | struct bdb_header *bdb) |
| 352 | { |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 353 | struct lvds_dvo_timing *dvo_timing; |
| 354 | struct drm_display_mode *panel_fixed_mode; |
Chris Wilson | 5a1e5b6 | 2011-01-29 16:50:25 +0000 | [diff] [blame] | 355 | int index; |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 356 | |
Jani Nikula | d330a95 | 2014-01-21 11:24:25 +0200 | [diff] [blame] | 357 | index = i915.vbt_sdvo_panel_type; |
Mathias Fröhlich | c10e408 | 2012-03-01 06:44:35 +0100 | [diff] [blame] | 358 | if (index == -2) { |
| 359 | DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n"); |
| 360 | return; |
| 361 | } |
| 362 | |
Chris Wilson | 5a1e5b6 | 2011-01-29 16:50:25 +0000 | [diff] [blame] | 363 | if (index == -1) { |
| 364 | struct bdb_sdvo_lvds_options *sdvo_lvds_options; |
| 365 | |
| 366 | sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); |
| 367 | if (!sdvo_lvds_options) |
| 368 | return; |
| 369 | |
| 370 | index = sdvo_lvds_options->panel_type; |
| 371 | } |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 372 | |
| 373 | dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS); |
| 374 | if (!dvo_timing) |
| 375 | return; |
| 376 | |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 377 | panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 378 | if (!panel_fixed_mode) |
| 379 | return; |
| 380 | |
Chris Wilson | 5a1e5b6 | 2011-01-29 16:50:25 +0000 | [diff] [blame] | 381 | fill_detail_timing_data(panel_fixed_mode, dvo_timing + index); |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 382 | |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 383 | dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 384 | |
Chris Wilson | 5a1e5b6 | 2011-01-29 16:50:25 +0000 | [diff] [blame] | 385 | DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n"); |
| 386 | drm_mode_debug_printmodeline(panel_fixed_mode); |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 387 | } |
| 388 | |
Bryan Freed | 9a4114f | 2011-01-12 13:38:39 -0800 | [diff] [blame] | 389 | static int intel_bios_ssc_frequency(struct drm_device *dev, |
| 390 | bool alternate) |
| 391 | { |
| 392 | switch (INTEL_INFO(dev)->gen) { |
| 393 | case 2: |
Ville Syrjälä | e91e941 | 2013-12-09 18:54:16 +0200 | [diff] [blame] | 394 | return alternate ? 66667 : 48000; |
Bryan Freed | 9a4114f | 2011-01-12 13:38:39 -0800 | [diff] [blame] | 395 | case 3: |
| 396 | case 4: |
Ville Syrjälä | e91e941 | 2013-12-09 18:54:16 +0200 | [diff] [blame] | 397 | return alternate ? 100000 : 96000; |
Bryan Freed | 9a4114f | 2011-01-12 13:38:39 -0800 | [diff] [blame] | 398 | default: |
Ville Syrjälä | e91e941 | 2013-12-09 18:54:16 +0200 | [diff] [blame] | 399 | return alternate ? 100000 : 120000; |
Bryan Freed | 9a4114f | 2011-01-12 13:38:39 -0800 | [diff] [blame] | 400 | } |
| 401 | } |
| 402 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 403 | static void |
| 404 | parse_general_features(struct drm_i915_private *dev_priv, |
| 405 | struct bdb_header *bdb) |
| 406 | { |
Eric Anholt | bad720f | 2009-10-22 16:11:14 -0700 | [diff] [blame] | 407 | struct drm_device *dev = dev_priv->dev; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 408 | struct bdb_general_features *general; |
| 409 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 410 | general = find_section(bdb, BDB_GENERAL_FEATURES); |
| 411 | if (general) { |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 412 | dev_priv->vbt.int_tv_support = general->int_tv_support; |
| 413 | dev_priv->vbt.int_crt_support = general->int_crt_support; |
| 414 | dev_priv->vbt.lvds_use_ssc = general->enable_ssc; |
| 415 | dev_priv->vbt.lvds_ssc_freq = |
Bryan Freed | 9a4114f | 2011-01-12 13:38:39 -0800 | [diff] [blame] | 416 | intel_bios_ssc_frequency(dev, general->ssc_freq); |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 417 | dev_priv->vbt.display_clock_mode = general->display_clock_mode; |
| 418 | dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; |
Paulo Zanoni | 3f704fa | 2013-04-08 15:48:07 -0300 | [diff] [blame] | 419 | DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 420 | dev_priv->vbt.int_tv_support, |
| 421 | dev_priv->vbt.int_crt_support, |
| 422 | dev_priv->vbt.lvds_use_ssc, |
| 423 | dev_priv->vbt.lvds_ssc_freq, |
| 424 | dev_priv->vbt.display_clock_mode, |
| 425 | dev_priv->vbt.fdi_rx_polarity_inverted); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 426 | } |
| 427 | } |
| 428 | |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 429 | static void |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 430 | parse_general_definitions(struct drm_i915_private *dev_priv, |
| 431 | struct bdb_header *bdb) |
| 432 | { |
| 433 | struct bdb_general_definitions *general; |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 434 | |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 435 | general = find_section(bdb, BDB_GENERAL_DEFINITIONS); |
| 436 | if (general) { |
| 437 | u16 block_size = get_blocksize(general); |
| 438 | if (block_size >= sizeof(*general)) { |
| 439 | int bus_pin = general->crt_ddc_gmbus_pin; |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 440 | DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin); |
Daniel Kurtz | 3bd7d90 | 2012-03-28 02:36:14 +0800 | [diff] [blame] | 441 | if (intel_gmbus_is_port_valid(bus_pin)) |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 442 | dev_priv->vbt.crt_ddc_pin = bus_pin; |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 443 | } else { |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 444 | DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n", |
Daniel Kurtz | 3bd7d90 | 2012-03-28 02:36:14 +0800 | [diff] [blame] | 445 | block_size); |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 446 | } |
| 447 | } |
| 448 | } |
| 449 | |
| 450 | static void |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 451 | parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 452 | struct bdb_header *bdb) |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 453 | { |
| 454 | struct sdvo_device_mapping *p_mapping; |
| 455 | struct bdb_general_definitions *p_defs; |
Paulo Zanoni | 768f69c | 2013-09-11 18:02:47 -0300 | [diff] [blame] | 456 | union child_device_config *p_child; |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 457 | int i, child_device_num, count; |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 458 | u16 block_size; |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 459 | |
| 460 | p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); |
| 461 | if (!p_defs) { |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 462 | DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n"); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 463 | return; |
| 464 | } |
| 465 | /* judge whether the size of child device meets the requirements. |
| 466 | * If the child device size obtained from general definition block |
| 467 | * is different with sizeof(struct child_device_config), skip the |
| 468 | * parsing of sdvo device info |
| 469 | */ |
| 470 | if (p_defs->child_dev_size != sizeof(*p_child)) { |
| 471 | /* different child dev size . Ignore it */ |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 472 | DRM_DEBUG_KMS("different child size is found. Invalid.\n"); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 473 | return; |
| 474 | } |
| 475 | /* get the block size of general definitions */ |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 476 | block_size = get_blocksize(p_defs); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 477 | /* get the number of child device */ |
| 478 | child_device_num = (block_size - sizeof(*p_defs)) / |
| 479 | sizeof(*p_child); |
| 480 | count = 0; |
| 481 | for (i = 0; i < child_device_num; i++) { |
| 482 | p_child = &(p_defs->devices[i]); |
Paulo Zanoni | 768f69c | 2013-09-11 18:02:47 -0300 | [diff] [blame] | 483 | if (!p_child->old.device_type) { |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 484 | /* skip the device block if device type is invalid */ |
| 485 | continue; |
| 486 | } |
Paulo Zanoni | 768f69c | 2013-09-11 18:02:47 -0300 | [diff] [blame] | 487 | if (p_child->old.slave_addr != SLAVE_ADDR1 && |
| 488 | p_child->old.slave_addr != SLAVE_ADDR2) { |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 489 | /* |
| 490 | * If the slave address is neither 0x70 nor 0x72, |
| 491 | * it is not a SDVO device. Skip it. |
| 492 | */ |
| 493 | continue; |
| 494 | } |
Paulo Zanoni | 768f69c | 2013-09-11 18:02:47 -0300 | [diff] [blame] | 495 | if (p_child->old.dvo_port != DEVICE_PORT_DVOB && |
| 496 | p_child->old.dvo_port != DEVICE_PORT_DVOC) { |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 497 | /* skip the incorrect SDVO port */ |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 498 | DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n"); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 499 | continue; |
| 500 | } |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 501 | DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on" |
| 502 | " %s port\n", |
Paulo Zanoni | 768f69c | 2013-09-11 18:02:47 -0300 | [diff] [blame] | 503 | p_child->old.slave_addr, |
| 504 | (p_child->old.dvo_port == DEVICE_PORT_DVOB) ? |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 505 | "SDVOB" : "SDVOC"); |
Paulo Zanoni | 768f69c | 2013-09-11 18:02:47 -0300 | [diff] [blame] | 506 | p_mapping = &(dev_priv->sdvo_mappings[p_child->old.dvo_port - 1]); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 507 | if (!p_mapping->initialized) { |
Paulo Zanoni | 768f69c | 2013-09-11 18:02:47 -0300 | [diff] [blame] | 508 | p_mapping->dvo_port = p_child->old.dvo_port; |
| 509 | p_mapping->slave_addr = p_child->old.slave_addr; |
| 510 | p_mapping->dvo_wiring = p_child->old.dvo_wiring; |
| 511 | p_mapping->ddc_pin = p_child->old.ddc_pin; |
| 512 | p_mapping->i2c_pin = p_child->old.i2c_pin; |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 513 | p_mapping->initialized = 1; |
Adam Jackson | 46eb303 | 2011-06-16 16:36:23 -0400 | [diff] [blame] | 514 | DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", |
Chris Wilson | e957d77 | 2010-09-24 12:52:03 +0100 | [diff] [blame] | 515 | p_mapping->dvo_port, |
| 516 | p_mapping->slave_addr, |
| 517 | p_mapping->dvo_wiring, |
| 518 | p_mapping->ddc_pin, |
Adam Jackson | 46eb303 | 2011-06-16 16:36:23 -0400 | [diff] [blame] | 519 | p_mapping->i2c_pin); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 520 | } else { |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 521 | DRM_DEBUG_KMS("Maybe one SDVO port is shared by " |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 522 | "two SDVO device.\n"); |
| 523 | } |
Paulo Zanoni | 768f69c | 2013-09-11 18:02:47 -0300 | [diff] [blame] | 524 | if (p_child->old.slave2_addr) { |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 525 | /* Maybe this is a SDVO device with multiple inputs */ |
| 526 | /* And the mapping info is not added */ |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 527 | DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this" |
| 528 | " is a SDVO device with multiple inputs.\n"); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 529 | } |
| 530 | count++; |
| 531 | } |
| 532 | |
| 533 | if (!count) { |
| 534 | /* No SDVO device info is found */ |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 535 | DRM_DEBUG_KMS("No SDVO device info is found in VBT\n"); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 536 | } |
| 537 | return; |
| 538 | } |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 539 | |
| 540 | static void |
| 541 | parse_driver_features(struct drm_i915_private *dev_priv, |
| 542 | struct bdb_header *bdb) |
| 543 | { |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 544 | struct bdb_driver_features *driver; |
| 545 | |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 546 | driver = find_section(bdb, BDB_DRIVER_FEATURES); |
Jesse Barnes | 652c393 | 2009-08-17 13:31:43 -0700 | [diff] [blame] | 547 | if (!driver) |
| 548 | return; |
| 549 | |
Daniel Vetter | 6fca55b | 2013-09-21 00:48:39 +0200 | [diff] [blame] | 550 | if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP) |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 551 | dev_priv->vbt.edp_support = 1; |
Jesse Barnes | 652c393 | 2009-08-17 13:31:43 -0700 | [diff] [blame] | 552 | |
Chris Wilson | 5ceb0f9 | 2010-09-24 10:24:28 +0100 | [diff] [blame] | 553 | if (driver->dual_frequency) |
Jesse Barnes | 652c393 | 2009-08-17 13:31:43 -0700 | [diff] [blame] | 554 | dev_priv->render_reclock_avail = true; |
Pradeep Bhat | 83a7280 | 2014-03-28 10:14:57 +0530 | [diff] [blame] | 555 | |
| 556 | DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); |
| 557 | /* |
| 558 | * If DRRS is not supported, drrs_type has to be set to 0. |
| 559 | * This is because, VBT is configured in such a way that |
| 560 | * static DRRS is 0 and DRRS not supported is represented by |
| 561 | * driver->drrs_enabled=false |
| 562 | */ |
| 563 | if (!driver->drrs_enabled) |
| 564 | dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 565 | } |
| 566 | |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 567 | static void |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 568 | parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb) |
| 569 | { |
| 570 | struct bdb_edp *edp; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 571 | struct edp_power_seq *edp_pps; |
| 572 | struct edp_link_params *edp_link_params; |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 573 | |
| 574 | edp = find_section(bdb, BDB_EDP); |
| 575 | if (!edp) { |
Daniel Vetter | 6fca55b | 2013-09-21 00:48:39 +0200 | [diff] [blame] | 576 | if (dev_priv->vbt.edp_support) |
Jani Nikula | 9a30a61 | 2012-11-12 14:33:45 +0200 | [diff] [blame] | 577 | DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n"); |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 578 | return; |
| 579 | } |
| 580 | |
| 581 | switch ((edp->color_depth >> (panel_type * 2)) & 3) { |
| 582 | case EDP_18BPP: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 583 | dev_priv->vbt.edp_bpp = 18; |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 584 | break; |
| 585 | case EDP_24BPP: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 586 | dev_priv->vbt.edp_bpp = 24; |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 587 | break; |
| 588 | case EDP_30BPP: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 589 | dev_priv->vbt.edp_bpp = 30; |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 590 | break; |
| 591 | } |
Chris Wilson | 5ceb0f9 | 2010-09-24 10:24:28 +0100 | [diff] [blame] | 592 | |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 593 | /* Get the eDP sequencing and link info */ |
| 594 | edp_pps = &edp->power_seqs[panel_type]; |
| 595 | edp_link_params = &edp->link_params[panel_type]; |
Chris Wilson | 5ceb0f9 | 2010-09-24 10:24:28 +0100 | [diff] [blame] | 596 | |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 597 | dev_priv->vbt.edp_pps = *edp_pps; |
Chris Wilson | 5ceb0f9 | 2010-09-24 10:24:28 +0100 | [diff] [blame] | 598 | |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 599 | switch (edp_link_params->rate) { |
| 600 | case EDP_RATE_1_62: |
| 601 | dev_priv->vbt.edp_rate = DP_LINK_BW_1_62; |
| 602 | break; |
| 603 | case EDP_RATE_2_7: |
| 604 | dev_priv->vbt.edp_rate = DP_LINK_BW_2_7; |
| 605 | break; |
| 606 | default: |
| 607 | DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n", |
| 608 | edp_link_params->rate); |
| 609 | break; |
| 610 | } |
| 611 | |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 612 | switch (edp_link_params->lanes) { |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 613 | case EDP_LANE_1: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 614 | dev_priv->vbt.edp_lanes = 1; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 615 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 616 | case EDP_LANE_2: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 617 | dev_priv->vbt.edp_lanes = 2; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 618 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 619 | case EDP_LANE_4: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 620 | dev_priv->vbt.edp_lanes = 4; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 621 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 622 | default: |
| 623 | DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n", |
| 624 | edp_link_params->lanes); |
| 625 | break; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 626 | } |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 627 | |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 628 | switch (edp_link_params->preemphasis) { |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 629 | case EDP_PREEMPHASIS_NONE: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 630 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_0; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 631 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 632 | case EDP_PREEMPHASIS_3_5dB: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 633 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 634 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 635 | case EDP_PREEMPHASIS_6dB: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 636 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_6; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 637 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 638 | case EDP_PREEMPHASIS_9_5dB: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 639 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 640 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 641 | default: |
| 642 | DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n", |
| 643 | edp_link_params->preemphasis); |
| 644 | break; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 645 | } |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 646 | |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 647 | switch (edp_link_params->vswing) { |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 648 | case EDP_VSWING_0_4V: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 649 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_400; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 650 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 651 | case EDP_VSWING_0_6V: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 652 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_600; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 653 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 654 | case EDP_VSWING_0_8V: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 655 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_800; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 656 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 657 | case EDP_VSWING_1_2V: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 658 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_1200; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 659 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 660 | default: |
| 661 | DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n", |
| 662 | edp_link_params->vswing); |
| 663 | break; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 664 | } |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 665 | } |
| 666 | |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 667 | static u8 *goto_next_sequence(u8 *data, int *size) |
| 668 | { |
| 669 | u16 len; |
| 670 | int tmp = *size; |
| 671 | |
| 672 | if (--tmp < 0) |
| 673 | return NULL; |
| 674 | |
| 675 | /* goto first element */ |
| 676 | data++; |
| 677 | while (1) { |
| 678 | switch (*data) { |
| 679 | case MIPI_SEQ_ELEM_SEND_PKT: |
| 680 | /* |
| 681 | * skip by this element payload size |
| 682 | * skip elem id, command flag and data type |
| 683 | */ |
Shobhit Kumar | b0256cd | 2014-04-15 13:54:07 +0530 | [diff] [blame] | 684 | tmp -= 5; |
| 685 | if (tmp < 0) |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 686 | return NULL; |
| 687 | |
| 688 | data += 3; |
| 689 | len = *((u16 *)data); |
| 690 | |
Shobhit Kumar | b0256cd | 2014-04-15 13:54:07 +0530 | [diff] [blame] | 691 | tmp -= len; |
| 692 | if (tmp < 0) |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 693 | return NULL; |
| 694 | |
| 695 | /* skip by len */ |
| 696 | data = data + 2 + len; |
| 697 | break; |
| 698 | case MIPI_SEQ_ELEM_DELAY: |
| 699 | /* skip by elem id, and delay is 4 bytes */ |
Shobhit Kumar | b0256cd | 2014-04-15 13:54:07 +0530 | [diff] [blame] | 700 | tmp -= 5; |
| 701 | if (tmp < 0) |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 702 | return NULL; |
| 703 | |
| 704 | data += 5; |
| 705 | break; |
| 706 | case MIPI_SEQ_ELEM_GPIO: |
Shobhit Kumar | b0256cd | 2014-04-15 13:54:07 +0530 | [diff] [blame] | 707 | tmp -= 3; |
| 708 | if (tmp < 0) |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 709 | return NULL; |
| 710 | |
| 711 | data += 3; |
| 712 | break; |
| 713 | default: |
| 714 | DRM_ERROR("Unknown element\n"); |
| 715 | return NULL; |
| 716 | } |
| 717 | |
| 718 | /* end of sequence ? */ |
| 719 | if (*data == 0) |
| 720 | break; |
| 721 | } |
| 722 | |
| 723 | /* goto next sequence or end of block byte */ |
| 724 | if (--tmp < 0) |
| 725 | return NULL; |
| 726 | |
| 727 | data++; |
| 728 | |
| 729 | /* update amount of data left for the sequence block to be parsed */ |
| 730 | *size = tmp; |
| 731 | return data; |
| 732 | } |
| 733 | |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 734 | static void |
Shobhit Kumar | d17c544 | 2013-08-27 15:12:25 +0300 | [diff] [blame] | 735 | parse_mipi(struct drm_i915_private *dev_priv, struct bdb_header *bdb) |
| 736 | { |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 737 | struct bdb_mipi_config *start; |
| 738 | struct bdb_mipi_sequence *sequence; |
| 739 | struct mipi_config *config; |
| 740 | struct mipi_pps_data *pps; |
| 741 | u8 *data, *seq_data; |
| 742 | int i, panel_id, seq_size; |
| 743 | u16 block_size; |
Shobhit Kumar | d17c544 | 2013-08-27 15:12:25 +0300 | [diff] [blame] | 744 | |
Shobhit Kumar | 3e6bd01 | 2014-05-27 19:33:59 +0530 | [diff] [blame] | 745 | /* parse MIPI blocks only if LFP type is MIPI */ |
| 746 | if (!dev_priv->vbt.has_mipi) |
| 747 | return; |
| 748 | |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 749 | /* Initialize this to undefined indicating no generic MIPI support */ |
| 750 | dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; |
| 751 | |
| 752 | /* Block #40 is already parsed and panel_fixed_mode is |
| 753 | * stored in dev_priv->lfp_lvds_vbt_mode |
| 754 | * resuse this when needed |
| 755 | */ |
| 756 | |
| 757 | /* Parse #52 for panel index used from panel_type already |
| 758 | * parsed |
| 759 | */ |
| 760 | start = find_section(bdb, BDB_MIPI_CONFIG); |
| 761 | if (!start) { |
| 762 | DRM_DEBUG_KMS("No MIPI config BDB found"); |
Shobhit Kumar | d17c544 | 2013-08-27 15:12:25 +0300 | [diff] [blame] | 763 | return; |
| 764 | } |
| 765 | |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 766 | DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n", |
| 767 | panel_type); |
| 768 | |
| 769 | /* |
| 770 | * get hold of the correct configuration block and pps data as per |
| 771 | * the panel_type as index |
| 772 | */ |
| 773 | config = &start->config[panel_type]; |
| 774 | pps = &start->pps[panel_type]; |
| 775 | |
| 776 | /* store as of now full data. Trim when we realise all is not needed */ |
| 777 | dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); |
| 778 | if (!dev_priv->vbt.dsi.config) |
| 779 | return; |
| 780 | |
| 781 | dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); |
| 782 | if (!dev_priv->vbt.dsi.pps) { |
| 783 | kfree(dev_priv->vbt.dsi.config); |
| 784 | return; |
| 785 | } |
| 786 | |
| 787 | /* We have mandatory mipi config blocks. Initialize as generic panel */ |
Shobhit Kumar | ea9a6ba | 2014-02-28 11:18:46 +0530 | [diff] [blame] | 788 | dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 789 | |
| 790 | /* Check if we have sequence block as well */ |
| 791 | sequence = find_section(bdb, BDB_MIPI_SEQUENCE); |
| 792 | if (!sequence) { |
| 793 | DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n"); |
| 794 | return; |
| 795 | } |
| 796 | |
| 797 | DRM_DEBUG_DRIVER("Found MIPI sequence block\n"); |
| 798 | |
| 799 | block_size = get_blocksize(sequence); |
| 800 | |
| 801 | /* |
| 802 | * parse the sequence block for individual sequences |
| 803 | */ |
| 804 | dev_priv->vbt.dsi.seq_version = sequence->version; |
| 805 | |
| 806 | seq_data = &sequence->data[0]; |
| 807 | |
| 808 | /* |
| 809 | * sequence block is variable length and hence we need to parse and |
| 810 | * get the sequence data for specific panel id |
| 811 | */ |
| 812 | for (i = 0; i < MAX_MIPI_CONFIGURATIONS; i++) { |
| 813 | panel_id = *seq_data; |
| 814 | seq_size = *((u16 *) (seq_data + 1)); |
| 815 | if (panel_id == panel_type) |
| 816 | break; |
| 817 | |
| 818 | /* skip the sequence including seq header of 3 bytes */ |
| 819 | seq_data = seq_data + 3 + seq_size; |
| 820 | if ((seq_data - &sequence->data[0]) > block_size) { |
| 821 | DRM_ERROR("Sequence start is beyond sequence block size, corrupted sequence block\n"); |
| 822 | return; |
| 823 | } |
| 824 | } |
| 825 | |
| 826 | if (i == MAX_MIPI_CONFIGURATIONS) { |
| 827 | DRM_ERROR("Sequence block detected but no valid configuration\n"); |
| 828 | return; |
| 829 | } |
| 830 | |
| 831 | /* check if found sequence is completely within the sequence block |
| 832 | * just being paranoid */ |
| 833 | if (seq_size > block_size) { |
| 834 | DRM_ERROR("Corrupted sequence/size, bailing out\n"); |
| 835 | return; |
| 836 | } |
| 837 | |
| 838 | /* skip the panel id(1 byte) and seq size(2 bytes) */ |
| 839 | dev_priv->vbt.dsi.data = kmemdup(seq_data + 3, seq_size, GFP_KERNEL); |
| 840 | if (!dev_priv->vbt.dsi.data) |
| 841 | return; |
| 842 | |
| 843 | /* |
| 844 | * loop into the sequence data and split into multiple sequneces |
| 845 | * There are only 5 types of sequences as of now |
| 846 | */ |
| 847 | data = dev_priv->vbt.dsi.data; |
| 848 | dev_priv->vbt.dsi.size = seq_size; |
| 849 | |
| 850 | /* two consecutive 0x00 indicate end of all sequences */ |
| 851 | while (1) { |
| 852 | int seq_id = *data; |
| 853 | if (MIPI_SEQ_MAX > seq_id && seq_id > MIPI_SEQ_UNDEFINED) { |
| 854 | dev_priv->vbt.dsi.sequence[seq_id] = data; |
| 855 | DRM_DEBUG_DRIVER("Found mipi sequence - %d\n", seq_id); |
| 856 | } else { |
| 857 | DRM_ERROR("undefined sequence\n"); |
| 858 | goto err; |
| 859 | } |
| 860 | |
| 861 | /* partial parsing to skip elements */ |
| 862 | data = goto_next_sequence(data, &seq_size); |
| 863 | |
| 864 | if (data == NULL) { |
| 865 | DRM_ERROR("Sequence elements going beyond block itself. Sequence block parsing failed\n"); |
| 866 | goto err; |
| 867 | } |
| 868 | |
| 869 | if (*data == 0) |
| 870 | break; /* end of sequence reached */ |
| 871 | } |
| 872 | |
| 873 | DRM_DEBUG_DRIVER("MIPI related vbt parsing complete\n"); |
| 874 | return; |
| 875 | err: |
| 876 | kfree(dev_priv->vbt.dsi.data); |
| 877 | dev_priv->vbt.dsi.data = NULL; |
| 878 | |
| 879 | /* error during parsing so set all pointers to null |
| 880 | * because of partial parsing */ |
Rafael Barbalho | ed3b667 | 2014-07-24 15:16:12 +0100 | [diff] [blame] | 881 | memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence)); |
Shobhit Kumar | d17c544 | 2013-08-27 15:12:25 +0300 | [diff] [blame] | 882 | } |
| 883 | |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 884 | static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, |
| 885 | struct bdb_header *bdb) |
| 886 | { |
| 887 | union child_device_config *it, *child = NULL; |
| 888 | struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; |
| 889 | uint8_t hdmi_level_shift; |
| 890 | int i, j; |
Paulo Zanoni | 554d6af | 2013-09-12 17:10:11 -0300 | [diff] [blame] | 891 | bool is_dvi, is_hdmi, is_dp, is_edp, is_crt; |
Paulo Zanoni | 6bf19e7 | 2013-09-12 17:07:55 -0300 | [diff] [blame] | 892 | uint8_t aux_channel; |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 893 | /* Each DDI port can have more than one value on the "DVO Port" field, |
| 894 | * so look for all the possible values for each port and abort if more |
| 895 | * than one is found. */ |
| 896 | int dvo_ports[][2] = { |
| 897 | {DVO_PORT_HDMIA, DVO_PORT_DPA}, |
| 898 | {DVO_PORT_HDMIB, DVO_PORT_DPB}, |
| 899 | {DVO_PORT_HDMIC, DVO_PORT_DPC}, |
| 900 | {DVO_PORT_HDMID, DVO_PORT_DPD}, |
| 901 | {DVO_PORT_CRT, -1 /* Port E can only be DVO_PORT_CRT */ }, |
| 902 | }; |
| 903 | |
| 904 | /* Find the child device to use, abort if more than one found. */ |
| 905 | for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { |
| 906 | it = dev_priv->vbt.child_dev + i; |
| 907 | |
| 908 | for (j = 0; j < 2; j++) { |
| 909 | if (dvo_ports[port][j] == -1) |
| 910 | break; |
| 911 | |
| 912 | if (it->common.dvo_port == dvo_ports[port][j]) { |
| 913 | if (child) { |
| 914 | DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n", |
| 915 | port_name(port)); |
| 916 | return; |
| 917 | } |
| 918 | child = it; |
| 919 | } |
| 920 | } |
| 921 | } |
| 922 | if (!child) |
| 923 | return; |
| 924 | |
Paulo Zanoni | 6bf19e7 | 2013-09-12 17:07:55 -0300 | [diff] [blame] | 925 | aux_channel = child->raw[25]; |
| 926 | |
Ville Syrjälä | 78eb06c | 2013-11-01 20:32:07 +0200 | [diff] [blame] | 927 | is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; |
| 928 | is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; |
| 929 | is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT; |
| 930 | is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; |
| 931 | is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR); |
Paulo Zanoni | 554d6af | 2013-09-12 17:10:11 -0300 | [diff] [blame] | 932 | |
Paulo Zanoni | 311a209 | 2013-09-12 17:12:18 -0300 | [diff] [blame] | 933 | info->supports_dvi = is_dvi; |
| 934 | info->supports_hdmi = is_hdmi; |
| 935 | info->supports_dp = is_dp; |
| 936 | |
Paulo Zanoni | 554d6af | 2013-09-12 17:10:11 -0300 | [diff] [blame] | 937 | DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n", |
| 938 | port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt); |
| 939 | |
| 940 | if (is_edp && is_dvi) |
| 941 | DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n", |
| 942 | port_name(port)); |
| 943 | if (is_crt && port != PORT_E) |
| 944 | DRM_DEBUG_KMS("Port %c is analog\n", port_name(port)); |
| 945 | if (is_crt && (is_dvi || is_dp)) |
| 946 | DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n", |
| 947 | port_name(port)); |
| 948 | if (is_dvi && (port == PORT_A || port == PORT_E)) |
| 949 | DRM_DEBUG_KMS("Port %c is TMDS compabile\n", port_name(port)); |
| 950 | if (!is_dvi && !is_dp && !is_crt) |
| 951 | DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n", |
| 952 | port_name(port)); |
| 953 | if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E)) |
| 954 | DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port)); |
Paulo Zanoni | 6bf19e7 | 2013-09-12 17:07:55 -0300 | [diff] [blame] | 955 | |
| 956 | if (is_dvi) { |
| 957 | if (child->common.ddc_pin == 0x05 && port != PORT_B) |
| 958 | DRM_DEBUG_KMS("Unexpected DDC pin for port B\n"); |
| 959 | if (child->common.ddc_pin == 0x04 && port != PORT_C) |
| 960 | DRM_DEBUG_KMS("Unexpected DDC pin for port C\n"); |
| 961 | if (child->common.ddc_pin == 0x06 && port != PORT_D) |
| 962 | DRM_DEBUG_KMS("Unexpected DDC pin for port D\n"); |
| 963 | } |
| 964 | |
| 965 | if (is_dp) { |
| 966 | if (aux_channel == 0x40 && port != PORT_A) |
| 967 | DRM_DEBUG_KMS("Unexpected AUX channel for port A\n"); |
| 968 | if (aux_channel == 0x10 && port != PORT_B) |
| 969 | DRM_DEBUG_KMS("Unexpected AUX channel for port B\n"); |
| 970 | if (aux_channel == 0x20 && port != PORT_C) |
| 971 | DRM_DEBUG_KMS("Unexpected AUX channel for port C\n"); |
| 972 | if (aux_channel == 0x30 && port != PORT_D) |
| 973 | DRM_DEBUG_KMS("Unexpected AUX channel for port D\n"); |
| 974 | } |
| 975 | |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 976 | if (bdb->version >= 158) { |
| 977 | /* The VBT HDMI level shift values match the table we have. */ |
| 978 | hdmi_level_shift = child->raw[7] & 0xF; |
Damien Lespiau | ce4dd49 | 2014-08-01 11:07:54 +0100 | [diff] [blame^] | 979 | DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n", |
| 980 | port_name(port), |
| 981 | hdmi_level_shift); |
| 982 | info->hdmi_level_shift = hdmi_level_shift; |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 983 | } |
| 984 | } |
| 985 | |
| 986 | static void parse_ddi_ports(struct drm_i915_private *dev_priv, |
| 987 | struct bdb_header *bdb) |
| 988 | { |
| 989 | struct drm_device *dev = dev_priv->dev; |
| 990 | enum port port; |
| 991 | |
| 992 | if (!HAS_DDI(dev)) |
| 993 | return; |
| 994 | |
| 995 | if (!dev_priv->vbt.child_dev_num) |
| 996 | return; |
| 997 | |
| 998 | if (bdb->version < 155) |
| 999 | return; |
| 1000 | |
| 1001 | for (port = PORT_A; port < I915_MAX_PORTS; port++) |
| 1002 | parse_ddi_port(dev_priv, port, bdb); |
| 1003 | } |
| 1004 | |
Shobhit Kumar | d17c544 | 2013-08-27 15:12:25 +0300 | [diff] [blame] | 1005 | static void |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1006 | parse_device_mapping(struct drm_i915_private *dev_priv, |
| 1007 | struct bdb_header *bdb) |
| 1008 | { |
| 1009 | struct bdb_general_definitions *p_defs; |
Paulo Zanoni | 768f69c | 2013-09-11 18:02:47 -0300 | [diff] [blame] | 1010 | union child_device_config *p_child, *child_dev_ptr; |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1011 | int i, child_device_num, count; |
| 1012 | u16 block_size; |
| 1013 | |
| 1014 | p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); |
| 1015 | if (!p_defs) { |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1016 | DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n"); |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1017 | return; |
| 1018 | } |
| 1019 | /* judge whether the size of child device meets the requirements. |
| 1020 | * If the child device size obtained from general definition block |
| 1021 | * is different with sizeof(struct child_device_config), skip the |
| 1022 | * parsing of sdvo device info |
| 1023 | */ |
| 1024 | if (p_defs->child_dev_size != sizeof(*p_child)) { |
| 1025 | /* different child dev size . Ignore it */ |
| 1026 | DRM_DEBUG_KMS("different child size is found. Invalid.\n"); |
| 1027 | return; |
| 1028 | } |
| 1029 | /* get the block size of general definitions */ |
| 1030 | block_size = get_blocksize(p_defs); |
| 1031 | /* get the number of child device */ |
| 1032 | child_device_num = (block_size - sizeof(*p_defs)) / |
| 1033 | sizeof(*p_child); |
| 1034 | count = 0; |
| 1035 | /* get the number of child device that is present */ |
| 1036 | for (i = 0; i < child_device_num; i++) { |
| 1037 | p_child = &(p_defs->devices[i]); |
Paulo Zanoni | 768f69c | 2013-09-11 18:02:47 -0300 | [diff] [blame] | 1038 | if (!p_child->common.device_type) { |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1039 | /* skip the device block if device type is invalid */ |
| 1040 | continue; |
| 1041 | } |
| 1042 | count++; |
| 1043 | } |
| 1044 | if (!count) { |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 1045 | DRM_DEBUG_KMS("no child dev is parsed from VBT\n"); |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1046 | return; |
| 1047 | } |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1048 | dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL); |
| 1049 | if (!dev_priv->vbt.child_dev) { |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1050 | DRM_DEBUG_KMS("No memory space for child device\n"); |
| 1051 | return; |
| 1052 | } |
| 1053 | |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1054 | dev_priv->vbt.child_dev_num = count; |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1055 | count = 0; |
| 1056 | for (i = 0; i < child_device_num; i++) { |
| 1057 | p_child = &(p_defs->devices[i]); |
Paulo Zanoni | 768f69c | 2013-09-11 18:02:47 -0300 | [diff] [blame] | 1058 | if (!p_child->common.device_type) { |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1059 | /* skip the device block if device type is invalid */ |
| 1060 | continue; |
| 1061 | } |
Shobhit Kumar | 3e6bd01 | 2014-05-27 19:33:59 +0530 | [diff] [blame] | 1062 | |
| 1063 | if (p_child->common.dvo_port >= DVO_PORT_MIPIA |
| 1064 | && p_child->common.dvo_port <= DVO_PORT_MIPID |
| 1065 | &&p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT) { |
| 1066 | DRM_DEBUG_KMS("Found MIPI as LFP\n"); |
| 1067 | dev_priv->vbt.has_mipi = 1; |
| 1068 | dev_priv->vbt.dsi.port = p_child->common.dvo_port; |
| 1069 | } |
| 1070 | |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1071 | child_dev_ptr = dev_priv->vbt.child_dev + count; |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1072 | count++; |
| 1073 | memcpy((void *)child_dev_ptr, (void *)p_child, |
| 1074 | sizeof(*p_child)); |
| 1075 | } |
| 1076 | return; |
| 1077 | } |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1078 | |
Simon Que | 6a04002 | 2010-09-30 09:36:39 +0100 | [diff] [blame] | 1079 | static void |
| 1080 | init_vbt_defaults(struct drm_i915_private *dev_priv) |
| 1081 | { |
Bryan Freed | 9a4114f | 2011-01-12 13:38:39 -0800 | [diff] [blame] | 1082 | struct drm_device *dev = dev_priv->dev; |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 1083 | enum port port; |
Bryan Freed | 9a4114f | 2011-01-12 13:38:39 -0800 | [diff] [blame] | 1084 | |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1085 | dev_priv->vbt.crt_ddc_pin = GMBUS_PORT_VGADDC; |
Simon Que | 6a04002 | 2010-09-30 09:36:39 +0100 | [diff] [blame] | 1086 | |
Jani Nikula | 56c4b63 | 2014-06-17 15:47:05 +0300 | [diff] [blame] | 1087 | /* Default to having backlight */ |
| 1088 | dev_priv->vbt.backlight.present = true; |
| 1089 | |
Simon Que | 6a04002 | 2010-09-30 09:36:39 +0100 | [diff] [blame] | 1090 | /* LFP panel data */ |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1091 | dev_priv->vbt.lvds_dither = 1; |
| 1092 | dev_priv->vbt.lvds_vbt = 0; |
Simon Que | 6a04002 | 2010-09-30 09:36:39 +0100 | [diff] [blame] | 1093 | |
| 1094 | /* SDVO panel data */ |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1095 | dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; |
Simon Que | 6a04002 | 2010-09-30 09:36:39 +0100 | [diff] [blame] | 1096 | |
| 1097 | /* general features */ |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1098 | dev_priv->vbt.int_tv_support = 1; |
| 1099 | dev_priv->vbt.int_crt_support = 1; |
Bryan Freed | 9a4114f | 2011-01-12 13:38:39 -0800 | [diff] [blame] | 1100 | |
| 1101 | /* Default to using SSC */ |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1102 | dev_priv->vbt.lvds_use_ssc = 1; |
Duncan Laurie | f69e515 | 2013-11-13 17:59:43 -0800 | [diff] [blame] | 1103 | /* |
| 1104 | * Core/SandyBridge/IvyBridge use alternative (120MHz) reference |
| 1105 | * clock for LVDS. |
| 1106 | */ |
| 1107 | dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev, |
| 1108 | !HAS_PCH_SPLIT(dev)); |
Ville Syrjälä | e91e941 | 2013-12-09 18:54:16 +0200 | [diff] [blame] | 1109 | DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq); |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 1110 | |
| 1111 | for (port = PORT_A; port < I915_MAX_PORTS; port++) { |
Paulo Zanoni | 311a209 | 2013-09-12 17:12:18 -0300 | [diff] [blame] | 1112 | struct ddi_vbt_port_info *info = |
| 1113 | &dev_priv->vbt.ddi_port_info[port]; |
| 1114 | |
Damien Lespiau | ce4dd49 | 2014-08-01 11:07:54 +0100 | [diff] [blame^] | 1115 | info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN; |
Paulo Zanoni | 311a209 | 2013-09-12 17:12:18 -0300 | [diff] [blame] | 1116 | |
| 1117 | info->supports_dvi = (port != PORT_A && port != PORT_E); |
| 1118 | info->supports_hdmi = info->supports_dvi; |
| 1119 | info->supports_dp = (port != PORT_E); |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 1120 | } |
Simon Que | 6a04002 | 2010-09-30 09:36:39 +0100 | [diff] [blame] | 1121 | } |
| 1122 | |
Daniel Vetter | 25e341c | 2012-03-24 23:51:30 +0100 | [diff] [blame] | 1123 | static int __init intel_no_opregion_vbt_callback(const struct dmi_system_id *id) |
| 1124 | { |
| 1125 | DRM_DEBUG_KMS("Falling back to manually reading VBT from " |
| 1126 | "VBIOS ROM for %s\n", |
| 1127 | id->ident); |
| 1128 | return 1; |
| 1129 | } |
| 1130 | |
| 1131 | static const struct dmi_system_id intel_no_opregion_vbt[] = { |
| 1132 | { |
| 1133 | .callback = intel_no_opregion_vbt_callback, |
| 1134 | .ident = "ThinkCentre A57", |
| 1135 | .matches = { |
| 1136 | DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), |
| 1137 | DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"), |
| 1138 | }, |
| 1139 | }, |
| 1140 | { } |
| 1141 | }; |
| 1142 | |
Chris Wilson | 3dd4e84 | 2014-04-18 18:04:22 -0300 | [diff] [blame] | 1143 | static struct bdb_header *validate_vbt(char *base, size_t size, |
| 1144 | struct vbt_header *vbt, |
| 1145 | const char *source) |
| 1146 | { |
| 1147 | size_t offset; |
| 1148 | struct bdb_header *bdb; |
| 1149 | |
| 1150 | if (vbt == NULL) { |
| 1151 | DRM_DEBUG_DRIVER("VBT signature missing\n"); |
| 1152 | return NULL; |
| 1153 | } |
| 1154 | |
| 1155 | offset = (char *)vbt - base; |
| 1156 | if (offset + sizeof(struct vbt_header) > size) { |
| 1157 | DRM_DEBUG_DRIVER("VBT header incomplete\n"); |
| 1158 | return NULL; |
| 1159 | } |
| 1160 | |
| 1161 | if (memcmp(vbt->signature, "$VBT", 4)) { |
| 1162 | DRM_DEBUG_DRIVER("VBT invalid signature\n"); |
| 1163 | return NULL; |
| 1164 | } |
| 1165 | |
| 1166 | offset += vbt->bdb_offset; |
| 1167 | if (offset + sizeof(struct bdb_header) > size) { |
| 1168 | DRM_DEBUG_DRIVER("BDB header incomplete\n"); |
| 1169 | return NULL; |
| 1170 | } |
| 1171 | |
| 1172 | bdb = (struct bdb_header *)(base + offset); |
| 1173 | if (offset + bdb->bdb_size > size) { |
| 1174 | DRM_DEBUG_DRIVER("BDB incomplete\n"); |
| 1175 | return NULL; |
| 1176 | } |
| 1177 | |
| 1178 | DRM_DEBUG_KMS("Using VBT from %s: %20s\n", |
| 1179 | source, vbt->signature); |
| 1180 | return bdb; |
| 1181 | } |
| 1182 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1183 | /** |
Bryan Freed | 6d139a8 | 2010-10-14 09:14:51 +0100 | [diff] [blame] | 1184 | * intel_parse_bios - find VBT and initialize settings from the BIOS |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1185 | * @dev: DRM device |
| 1186 | * |
| 1187 | * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers |
| 1188 | * to appropriate values. |
| 1189 | * |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1190 | * Returns 0 on success, nonzero on failure. |
| 1191 | */ |
Dan Carpenter | 0317c6c | 2012-06-27 12:10:30 +0300 | [diff] [blame] | 1192 | int |
Bryan Freed | 6d139a8 | 2010-10-14 09:14:51 +0100 | [diff] [blame] | 1193 | intel_parse_bios(struct drm_device *dev) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1194 | { |
| 1195 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1196 | struct pci_dev *pdev = dev->pdev; |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1197 | struct bdb_header *bdb = NULL; |
| 1198 | u8 __iomem *bios = NULL; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1199 | |
Ben Widawsky | ab5c608 | 2013-04-05 13:12:41 -0700 | [diff] [blame] | 1200 | if (HAS_PCH_NOP(dev)) |
| 1201 | return -ENODEV; |
| 1202 | |
Simon Que | 6a04002 | 2010-09-30 09:36:39 +0100 | [diff] [blame] | 1203 | init_vbt_defaults(dev_priv); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 1204 | |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1205 | /* XXX Should this validation be moved to intel_opregion.c? */ |
Chris Wilson | 3dd4e84 | 2014-04-18 18:04:22 -0300 | [diff] [blame] | 1206 | if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt) |
| 1207 | bdb = validate_vbt((char *)dev_priv->opregion.header, OPREGION_SIZE, |
| 1208 | (struct vbt_header *)dev_priv->opregion.vbt, |
| 1209 | "OpRegion"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1210 | |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1211 | if (bdb == NULL) { |
Chris Wilson | 3dd4e84 | 2014-04-18 18:04:22 -0300 | [diff] [blame] | 1212 | size_t i, size; |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1213 | |
| 1214 | bios = pci_map_rom(pdev, &size); |
| 1215 | if (!bios) |
| 1216 | return -1; |
| 1217 | |
| 1218 | /* Scour memory looking for the VBT signature */ |
| 1219 | for (i = 0; i + 4 < size; i++) { |
Chris Wilson | 3dd4e84 | 2014-04-18 18:04:22 -0300 | [diff] [blame] | 1220 | if (memcmp(bios + i, "$VBT", 4) == 0) { |
| 1221 | bdb = validate_vbt(bios, size, |
| 1222 | (struct vbt_header *)(bios + i), |
| 1223 | "PCI ROM"); |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1224 | break; |
| 1225 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1226 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1227 | |
Chris Wilson | 3dd4e84 | 2014-04-18 18:04:22 -0300 | [diff] [blame] | 1228 | if (!bdb) { |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1229 | pci_unmap_rom(pdev, bios); |
| 1230 | return -1; |
| 1231 | } |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1232 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1233 | |
| 1234 | /* Grab useful general definitions */ |
| 1235 | parse_general_features(dev_priv, bdb); |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 1236 | parse_general_definitions(dev_priv, bdb); |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 1237 | parse_lfp_panel_data(dev_priv, bdb); |
Jani Nikula | f00076d | 2013-12-14 20:38:29 -0200 | [diff] [blame] | 1238 | parse_lfp_backlight(dev_priv, bdb); |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 1239 | parse_sdvo_panel_data(dev_priv, bdb); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 1240 | parse_sdvo_device_mapping(dev_priv, bdb); |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1241 | parse_device_mapping(dev_priv, bdb); |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 1242 | parse_driver_features(dev_priv, bdb); |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 1243 | parse_edp(dev_priv, bdb); |
Shobhit Kumar | d17c544 | 2013-08-27 15:12:25 +0300 | [diff] [blame] | 1244 | parse_mipi(dev_priv, bdb); |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 1245 | parse_ddi_ports(dev_priv, bdb); |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 1246 | |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1247 | if (bios) |
| 1248 | pci_unmap_rom(pdev, bios); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1249 | |
| 1250 | return 0; |
| 1251 | } |
Bryan Freed | 6d139a8 | 2010-10-14 09:14:51 +0100 | [diff] [blame] | 1252 | |
| 1253 | /* Ensure that vital registers have been initialised, even if the BIOS |
| 1254 | * is absent or just failing to do its job. |
| 1255 | */ |
| 1256 | void intel_setup_bios(struct drm_device *dev) |
| 1257 | { |
| 1258 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1259 | |
| 1260 | /* Set the Panel Power On/Off timings if uninitialized. */ |
Damien Lespiau | 42d42e7 | 2012-10-31 19:23:16 +0000 | [diff] [blame] | 1261 | if (!HAS_PCH_SPLIT(dev) && |
| 1262 | I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) { |
Bryan Freed | 6d139a8 | 2010-10-14 09:14:51 +0100 | [diff] [blame] | 1263 | /* Set T2 to 40ms and T5 to 200ms */ |
| 1264 | I915_WRITE(PP_ON_DELAYS, 0x019007d0); |
| 1265 | |
| 1266 | /* Set T3 to 35ms and Tx to 200ms */ |
| 1267 | I915_WRITE(PP_OFF_DELAYS, 0x015e07d0); |
| 1268 | } |
| 1269 | } |