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Tony Lindgren0f0cfc62013-12-18 13:13:21 -08001/*
Dmitry Lifshitzd234e422014-01-12 15:22:45 +02002 * Common support for CompuLab CM-T3x30 CoMs
Tony Lindgren0f0cfc62013-12-18 13:13:21 -08003 */
4
Dmitry Lifshitzd234e422014-01-12 15:22:45 +02005#include "omap3-cm-t3x.dtsi"
Tony Lindgren0f0cfc62013-12-18 13:13:21 -08006
Dmitry Lifshitzd234e422014-01-12 15:22:45 +02007/ {
Tony Lindgren0f0cfc62013-12-18 13:13:21 -08008 cpus {
9 cpu@0 {
10 cpu0-supply = <&vcc>;
11 };
12 };
13
Tony Lindgren0f0cfc62013-12-18 13:13:21 -080014 vddvario: regulator-vddvario {
15 compatible = "regulator-fixed";
16 regulator-name = "vddvario";
17 regulator-always-on;
18 };
19
20 vdd33a: regulator-vdd33a {
21 compatible = "regulator-fixed";
22 regulator-name = "vdd33a";
23 regulator-always-on;
24 };
25};
26
Dmitry Lifshitzd234e422014-01-12 15:22:45 +020027&omap3_pmx_core {
28
29 smsc1_pins: pinmux_smsc1_pins {
30 pinctrl-single,pins = <
31 OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs5.gpmc_ncs5 */
32 OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 */
33 >;
34 };
35};
36
Tony Lindgren0f0cfc62013-12-18 13:13:21 -080037&gpmc {
38 ranges = <5 0 0x2c000000 0x01000000>;
39
40 smsc1: ethernet@5,0 {
41 compatible = "smsc,lan9221", "smsc,lan9115";
Dmitry Lifshitzd234e422014-01-12 15:22:45 +020042 pinctrl-names = "default";
43 pinctrl-0 = <&smsc1_pins>;
Tony Lindgren0f0cfc62013-12-18 13:13:21 -080044 interrupt-parent = <&gpio6>;
45 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
46 reg = <5 0 0xff>;
47 bank-width = <2>;
48 gpmc,mux-add-data;
49 gpmc,cs-on-ns = <0>;
50 gpmc,cs-rd-off-ns = <186>;
51 gpmc,cs-wr-off-ns = <186>;
52 gpmc,adv-on-ns = <12>;
53 gpmc,adv-rd-off-ns = <48>;
54 gpmc,adv-wr-off-ns = <48>;
55 gpmc,oe-on-ns = <54>;
56 gpmc,oe-off-ns = <168>;
57 gpmc,we-on-ns = <54>;
58 gpmc,we-off-ns = <168>;
59 gpmc,rd-cycle-ns = <186>;
60 gpmc,wr-cycle-ns = <186>;
61 gpmc,access-ns = <114>;
62 gpmc,page-burst-access-ns = <6>;
63 gpmc,bus-turnaround-ns = <12>;
64 gpmc,cycle2cycle-delay-ns = <18>;
65 gpmc,wr-data-mux-bus-ns = <90>;
66 gpmc,wr-access-ns = <186>;
67 gpmc,cycle2cycle-samecsen;
68 gpmc,cycle2cycle-diffcsen;
69 vddvario-supply = <&vddvario>;
70 vdd33a-supply = <&vdd33a>;
71 reg-io-width = <4>;
72 smsc,save-mac-address;
73 };
74};
75
76&i2c1 {
Tony Lindgren0f0cfc62013-12-18 13:13:21 -080077 twl: twl@48 {
78 reg = <0x48>;
79 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
80 interrupt-parent = <&intc>;
81 };
82};
83
84#include "twl4030.dtsi"
85#include "twl4030_omap3.dtsi"
86
Dmitry Lifshitzd234e422014-01-12 15:22:45 +020087&mmc1 {
88 vmmc-supply = <&vmmc1>;
Tony Lindgren0f0cfc62013-12-18 13:13:21 -080089};
90
91&twl_gpio {
92 ti,use-leds;
Dmitry Lifshitz0cc73cd2014-01-12 15:22:49 +020093 /* pullups: BIT(0) */
94 ti,pullups = <0x000001>;
Tony Lindgren0f0cfc62013-12-18 13:13:21 -080095};
Dmitry Lifshitzce5abbb2014-01-12 15:22:50 +020096
97&hsusb1_phy {
98 reset-gpios = <&twl_gpio 6 GPIO_ACTIVE_LOW>;
99};
100
101&hsusb2_phy {
102 reset-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>;
103};